CH592F/1F

Part: CH592F — WCH (Nanjing Qinheng Microelectronics)

Type: RISC-V BLE 5.4 Microcontroller

Description: QingKe 32-bit RISC-V4C MCU with 2 Mbps BLE, 512 KB Flash (448 KB CodeFlash + 32 KB DataFlash), 26 KB SRAM, full-speed USB host/device, a 12-bit ADC, a touch-key module and a 16*4 segment LCD driver, in a QFN28 package with a minimum supply voltage of 1.7 V.

Operating Conditions:

• Supply voltage: minimum 1.7 V (supports 3.3 V and 2.5 V power, and 1.8 V)
• Operating temperature: -40 to 85 °C
• Built-in DC-DC converter is optional

Absolute Maximum Ratings:

• Max supply voltage (VDD33): 4.2 V
• Max I/O supply voltage (VIO33): 4.2 V
• Max voltage on 5 V-tolerant I/O pins: 5.5 V
• Max voltage on other I/O pins: VIO33 + 0.4 V
• Storage temperature: -55 to 125 °C

Key Specs:

• Flash: 448 KB CodeFlash, 32 KB DataFlash, 24 KB BootLoader, 8 KB InfoFlash
• SRAM: 26 KB (24 KB + 2 KB sleep-retention)
• BLE: -95 dBm RX sensitivity, programmable +4.5 dBm TX power, 2 Mbps / 1 Mbps
• Bluetooth receive current: 7.5 mA (DC-DC off, 3.3 V); 3.5 mA (DC-DC on, 3.3 V)
• Idle mode current: 1.1 mA
• Halt mode current: 1.0 mA (PLL/HSE running); 180 μA (PLL/HSE stopped)
• Sleep mode current: 0.8 μA to 2.5 μA; shutdown mode current: 0.3 μA to 1.3 μA
• ADC: 12-bit, 8+1 channels on CH592F
• GPIO: 20 on CH592F

Features:

• QingKe RISC-V4C core with RV32IMAC instruction set, single-cycle multiply and hardware division
• BLE 5.4 compliant, with protocol stack and OTA upgrade support
• AES-128 encryption and unique chip ID
• USB 2.0 full-speed host/device with integrated PHY, 15 endpoints
• Touch-key detection (8 channels on CH592F)
• 4 timers, PWM outputs, 4 UARTs, SPI, I2C
• Segment LCD driver (16*4 on CH592F)
• Temperature sensor and RTC
• Built-in PLL and 32 kHz clock

Applications:

Package:

• QFN28 (CH592F)

• 2 modes that can be configured:
• Timing mode: A fixed cycle time (timing) can be selected for the software to generate interrupt notifications.
• Trigger mode: Match a target alarm clock time preset by the software to generate an interrupt notification.
• 3 groups of 16-bit counters that provide count of CK32K primitive cycle, 2s cycle and 1-day cycle.

Note: 1. Pin Type: I=TTL/CMOS level Schmitt input; O=CMOS level 3-state output;

A= Analog signal input or output; 5VT= Support 5V signal voltage input.

1. The alternate functions and mappings of pins are arranged in the table based on their priorities from high to low, and the GPIO function is with the lowest priority.
2. 2-wire simulation debug interface is configured by ISP tool. After the simulation debug interface is enabled, PB15 and PB14 are only used as TCK and TIO, and will not be used as GPIO or peripheral alternate function pins. After the simulation debug interface is disabled, PB15 and PB14 can be used as GPIO and

V1.7 6

CH592 Datasheet https://wch-ic.com

peripheral alternate function pins.

1. For the pins of those in other packages, please refer to the description of the pins with the same name in the table.

V1.7 7

CH592 Datasheet https://wch-ic.com

Test conditions: TA=25°C, VDD33=VIO33=3.3V, Fsys=16MHz 。

Table 20-2 Electrical characteristics

V1.7 145

CH592 Datasheet https://wch-ic.com

(Critical or exceeding the absolute maximum value will probably cause the chip to work improperly or even be damaged)

Table 20-1 Absolute maximum ratings