CH32V203C8T6
32-bit RISC-V MicrocontrollerThe CH32V203C8T6 is a 32-bit risc-v microcontroller from WCH. View the full CH32V203C8T6 datasheet below including pinout, electrical characteristics, absolute maximum ratings.
Manufacturer
WCH
Category
32-bit RISC-V Microcontroller
Overview
Part: CH32V203C8T6 — WCH (WCH.cn)
Type: 32-bit RISC-V Microcontroller
Description: Industrial-grade 32-bit RISC-V microcontroller with a QingKe V4B core, operating at up to 144 MHz, featuring up to 224 KB CodeFlash and 64 KB SRAM, dual USB interfaces, CAN, and rich peripherals.
Operating Conditions:
- Supply voltage: 2.4–3.6 V
- Operating temperature: -40 to +85 °C
- CPU clock speed: Max 144 MHz
Absolute Maximum Ratings:
- Max supply voltage: 3.6 V (VDD, VI/O, VDDA)
Key Specs:
- Core: QingKe 32-bit RISC-V V4B
- Max CPU Frequency: 144 MHz
- Program Memory (CodeFlash): Up to 224 KB
- Volatile Data Storage (SRAM): Up to 64 KB
- ADC: 2 units, 12-bit, up to 16 external channels
- Communication Interfaces: 4x USART, 2x I²C, 2x SPI, 2x USB (Host/Device), 1x CAN
- GPIO Ports: Up to 51
- Operating Voltage (VDD): 2.4–3.6 V
- Operating Temperature: -40 to +85 °C
Features:
- Fast programmable interrupt controller + hardware interrupt stack
- Single cycle multiplication, hardware division, hardware FPU
- Built-in factory-trimmed 8MHz RC oscillator and 40 KHz RC oscillator
- Power on/down reset, programmable voltage detector
- 16-channels Touch-Key detection
- 1 16-bit advanced-control timer, 3 16-bit general-purpose timers, 1 32-bit general-purpose timer (CH32V203RBx)
- 2 watchdog timers (independent and window)
- CRC unit, 96-bit unique ID
- 2-wire serial debug interface (SDI)
Applications:
Package:
- TSSOP20
- QFN20
- QFN28
- QSOP28
- LQFP32
- LQFP48
- QFN48
- LQFP64M
Pin Configuration
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | VBAT | P | VBAT |
| 2 | PC13-TAMPER-RTC(2) | I/O | PC13(3) (alt: TAMPER-RTC) |
| 3 | PC14-OSC32_IN(2) | I/O/A | PC14(3) (alt: OSC32_IN) |
| 4 | PC15-OSC32_OUT(2) | I/O/A | PC15(3) (alt: OSC32_OUT) |
| 5 | OSC_IN | I/A | OSC_IN |
| 6 | OSC_OUT | O/A | OSC_OUT |
| 7 | NRST | I | NRST |
| 8 | PC0 | I/O/A | PC0 (alt: ADC_IN10) |
| 9 | PC1 | I/O/A | PC1 (alt: ADC_IN11) |
| 10 | PC2 | I/O/A | PC2 (alt: ADC_IN12) |
| 11 | PC3 | I/O/A | PC3 (alt: ADC_IN13) |
| 12 | VSSA | P | VSSA |
| 13 | VDDA | P | VDDA |
| 14 | PA0-WKUP | I/O/A | PA0 (alt: WKUP, USART2_CTS, ADC_IN0, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM2_CH1_ETR_2) |
| 15 | PA1 | I/O/A | PA1 (alt: USART2_RTS, ADC_IN1, TIM2_CH2, TIM5_CH2, TIM2_CH2_2) |
| 16 | PA2 | I/O/A | PA2 (alt: USART2_TX, ADC_IN2, TIM2_CH3_1) |
| 17 | PA3 | I/O/A | PA3 (alt: USART2_RX, ADC_IN3, TIM2_CH4, OPA1_OUT0, TIM5_CH4, TIM2_CH4_1) |
| 18 | VSS_4 | P | VSS_4 |
| 19 | VDD_IO_4 | P | VDD_IO_4 |
| 20 | PA4 | I/O/A | PA4 (alt: SPI1_NSS, USART2_CK, ADC_IN4, OPA2_OUT1) |
| 21 | PA5 | I/O/A | PA5 (alt: SPI1_SCK, ADC_IN5, OPA2_CH1N, USART1_CTS_2, USART1_CK_3) |
| 22 | PA6 | I/O/A | PA6 (alt: SPI1_MISO, ADC_IN6, TIM3_CH1, OPA1_CH1N, TIM1_BKIN_1, USART1_TX_3) |
| 23 | PA7 | I/O/A | PA7 (alt: SPI1_MOSI, ADC_IN7, TIM3_CH2, OPA2_CH1P, TIM1_CH1N_1, USART1_RX_3) |
| 24 | PC4 | I/O/A | PC4 (alt: ADC_IN14, USART1_CTS_3) |
| 25 | PC5 | I/O/A | PC5 (alt: ADC_IN15, USART1_RTS_3) |
| 26 | PB0 | I/O/A | PB0 (alt: ADC_IN8, TIM3_CH3, OPA1_CH1P, TIM1_CH2N_1, TIM3_CH2_2, UART4_TX_1) |
| 27 | PB1 | I/O/A | PB1 (alt: ADC_IN9, TIM3_CH4, OPA1_OUT1, TIM1_CH3N_1, TIM3_CH4_2, UART4_RX_1) |
| 28 | PB2(5) | I/O | PB2 (alt: BOOT1(5)) |
| 29 | PB10 | I/O/A | PB10 (alt: I2C2_SCL, USART3_TX, OPA2_CH0N, TIM2_CH3_2, TIM2_CH3_3) |
| 30 | PB11 | I/O/A | PB11 (alt: I2C2_SDA, USART3_RX, OPA1_CH0N, TIM2_CH4_2, TIM2_CH4_3) |
| 31 | VSS_1 | P | VSS_1 |
| 32 | VDD_I/O_1 | P | VDD_I/O_1 |
| 33 | PB12 | I/O/A | PB12 (alt: SPI2_NSS, I2C2_SMBA, USART3_CK, TIM1_BKIN) |
| 34 | PB13 | I/O/A | PB13 (alt: SPI2_SCK, USART3_CTS, TIM1_CH1N, USART3_CTS_1) |
| 35 | PB14 | I/O/A | PB14 (alt: SPI2_MISO, TIM1_CH2N, USART3_RTS, OPA2_CH0P, USART3_RTS_1) |
| 36 | PB15 | I/O/A | PB15 (alt: SPI2_MOSI, TIM1_CH3N, OPA1_CH0P, USART1_TX_2) |
| 37 | PC6 | I/O/A | PC6 (alt: ETH_RXP, TIM3_CH1_3) |
| 38 | PC7 | I/O/A | PC7 (alt: ETH_RXN, TIM3_CH2_3) |
| 39 | PC8 | I/O/A | PC8 (alt: ETH_TXP, TIM3_CH3_3) |
| 40 | PC9 | I/O/A | PC9 (alt: ETH_TXN, TIM3_CH4_3) |
| 41 | PA8 | I/O | PA8 (alt: USART1_CK, TIM1_CH1, MCO, USART1_CK_1, USART1_RX_2, TIM1_CH1_1) |
| 42 | PA9 | I/O | PA9 (alt: USART1_TX, TIM1_CH2, USART1_RTS_2, TIM1_CH2_1) |
| 43 | PA10 | I/O | PA10 (alt: USART1_RX, TIM1_CH3, USART1_CK_2, TIM1_CH3_1) |
| 44 | PA11 | I/O/A | PA11 (alt: USART1_CTS, USBDM, CAN1_RX, TIM1_CH4, USART1_CTS_1, TIM1_CH4_1) |
| 45 | PA12 | I/O/A | PA12 (alt: USART1_RTS, USBDP, CAN1_TX, TIM1_ETR, USART1_RTS_1, TIM1_ETR_1) |
| 46 | PA13 | I/O | SWDIO (alt: PA13) |
| 47 | NC | - | NC |
| 48 | NC | - | NC |
| 49 | PA14 | I/O | SWCLK (alt: PA14) |
| 50 | PA15 | I/O | PA15 (alt: TIM2_CH1_ETR_1, TIM2_CH1_ETR_3) |
Electrical Characteristics
Figure 4-1 Typical circuit for conventional power supply
Absolute Maximum Ratings
Stresses at or above the absolute maximum ratings listed in the table below may cause permanent damage to the device.
Table 4-1 Absolute maximum ratings
| Symbol | Description | Min. | Max. | Unit |
|---|---|---|---|---|
| T A | Ambient temperature during operation | -40 | 85 | °C |
| T S | Ambient temperature during storage | -40 | 125 | °C |
| V DD -V SS | External main supply voltage (includingV DDA and V DD ) | -0.3 | 4.0 | V |
| V I/O -V SS | I/O domain supply voltage | -0.3 | 4.0 | V |
| V IN | Input voltage on the FT (5V tolerance) pin | V SS -0.3 | 5.5 | V |
| V IN | Input voltage on other pins | V SS -0.3 | V DD +0.3 | |
| \ | △ V DD_x \ | Variations between different main power supply pins | ||
| \ | △ V I/O_x \ | Variations between different I/O power supply pins | ||
| \ | △ V SS_x \ | Variations between different ground pins |
33
| V ESD(HBM) | Electrostatic discharge voltage (human body model, non-contact) | 4K | V | |
|---|---|---|---|---|
| V ESD(HBM) | USB pins (PA11, PA12) | 3K | V | |
| I VDD | Total current intoV DD /V DDA /V I/O power lines (source) | 150 | mA | |
| I Vss | Total current out ofV SS ground lines (sink) | 150 | mA | |
| I I/O | Sink current on any I/O and control pin | 25 | mA | |
| I I/O | Output current on any I/O and control pin | -25 | mA | |
| I INJ(PIN) | Injected current on NRST pin | +/-5 | mA | |
| I INJ(PIN) | Injected current on HSE's OSC_IN pin and LSE's OSC_IN pin | +/-5 | mA | |
| I INJ(PIN) | Injected current on other pins | +/-5 | mA | |
| ∑ I INJ(PIN) | Total injected current on all I/Os and control pins | +/-25 | mA |
Ordering Information
| MPN | Package | Temperature Range | Packing |
|---|
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| CH32V203 | WCH | — |
| CH32V203C6 | WCH | — |
| CH32V203C8 | WCH | — |
| CH32V203C8U6 | WCH | — |
| CH32V203F6 | WCH | — |
| CH32V203F8 | WCH | — |
| CH32V203G6 | WCH | — |
| CH32V203G8 | WCH | — |
| CH32V203K6 | WCH | — |
| CH32V203K8 | WCH | — |
| CH32V203RB | WCH | — |
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