BQ25890RTWR
The BQ25890RTWR is an electronic component from Texas Instruments. View the full BQ25890RTWR datasheet below including key specifications, pinout, electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Battery Management
Package
24-WFQFN Exposed Pad
Lifecycle
Active
Key Specifications
| Parameter | Value |
|---|---|
| Battery Chemistry | Lithium Ion/Polymer |
| Charge Current (Max) | 5A |
| Contact Plating | Gold |
| Fault Protection | Over Current, Over Temperature |
| Height | 800 µm |
| Interface | I2C, USB |
| Lead Free | Lead Free |
| Length | 4 mm |
| Lifecycle Status | Production (Last Updated: 2 days ago) |
| Manufacturer Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Max Operating Temperature | 85 °C |
| Min Operating Temperature | -40 °C |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Number of Cells | 1 |
| Number of Cells | 1 |
| Number of Pins | 24 |
| Operating Supply Voltage | 14 V |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Output Current | 5 A |
| Output Voltage | 4.6 V |
| Package / Case | 24-WFQFN Exposed Pad |
| Packaging | MouseReel |
| RoHS | Compliant |
| Schedule B | 8542390000, 8542390000|8542390000|8542390000|8542390000|8542390000 |
| Standard Pack Qty | 3000 |
| Supplier Device Package | 24-WQFN (4x4) |
| Thickness | 750 µm |
| Input Voltage (Max) | 14V |
| Width | 4 mm |
Overview
The device is a highly integrated 5-A siwtch-mode battery charger for single cell Li-Ion and Li-polymer battery. It is highly integrated with the input reverse-blocking FET (RBFET, Q1), high-side siwtching FET (HSFET, Q2) , low-side switching FET (LSFET, Q3), and battery FET (BATFET, Q4). The device also integrates the boostrap diode for the high-side gate drive.
Pin Configuration
BQ25890RTWR – 24-WFQFN Exposed Pad
| Pin Number | Pin Name | Type | Description |
|---|---|---|---|
| 1 | VBUS | P | VBUS Input |
| 2 | D+ | I/O | USB D+ Signal |
| 3 | D− | I/O | USB D− Signal |
| 4 | STAT | O | Charge Status Output |
| 5 | SCL | I/O | I²C Clock |
| 6 | SDA | I/O | I²C Data |
| 7 | INT | O | Interrupt Output |
| 8 | OTG | O | OTG Mode Control |
| 9 | CE | I | Charge Enable Input |
| 10 | ILIM | I | Input Current Limit |
| 11 | TS | I | Thermistor Sense |
| 12 | QON | I | Quick Charge Enable |
| 13 | BAT | P | Battery Positive |
| 14 | BAT | P | Battery Positive |
| 15 | SYS | P | System Power Output |
| 16 | SYS | P | System Power Output |
| 17 | PGND | P | Power Ground |
| 18 | PGND | P | Power Ground |
| 19 | SW | P | Switching Node |
| 20 | BST | P | Boost Output |
| 21 | RBST | I | Boost Feedback |
| 22 | REEN | I | Reverse Boost Enable |
| 23 | PMID | I | Mid-Point Voltage Sense |
| 24 | DSEL | I | Device Selection |
| EP | Exposed Pad | P | Power Ground (Thermal) |
Notes
- BQ25890RTWR is the exact variant shown in the first pin diagram (top image). The second image shows BQ25892, which is a different variant with different pin assignments (e.g., pin 2 is PSEL, pin 3 is PG instead of D+/D−).
- Pins 13–18 and 19–24 are grouped by function: BAT (battery), SYS (system), PGND (power ground), and switching/boost control.
- The exposed pad (EP) is connected to power ground for thermal dissipation.
- Multiple pins for BAT, SYS, and PGND indicate low-impedance connections required for high-current operation.
Electrical Characteristics
VVBUS_UVLOZ < VVBUS < VACOV and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS |
| I BAT | V BAT = 4.2 V, V (VBUS) < V (UVLO) , leakage between BAT and VBUS | 5 | μA | |||
| Battery discharge current (BAT, SW, SYS) in buck mode | High-Z mode, no VBUS, BATFET disabled (REG09[5]=1), battery monitor disabled, T J < 85°C | 12 | 23 | μA | ||
| High-Z mode, no VBUS, BATFET enabled (REG09[5]=0), battery monitor disabled, T J < 85°C | 32 | 60 | μA | |||
| I (VBUS_HIZ) | Input supply current (VBUS) in buck mode when High-Z mode | V (VBUS) = 5 V, High-Z mode, no battery, battery monitor disabled | 15 | 35 | μA | |
| is enabled | V (VBUS) = 12 V, High-Z mode, no battery, battery monitor disabled | 25 | 50 | μA | ||
| I (VBUS) | V BUS > V (UVLO) , V BUS > V BAT , converter not switching | 1.5 | 3 | mA | ||
| Input supply current (V BUS ) in buck mode | V BUS > V (UVLO) , V BUS > V BAT , converter switching, V BAT = 3.2 V, I SYS = 0A | 3 | mA | |||
| Battery discharge current in boost mode | V BUS > V (UVLO) , V BUS > V BAT , converter switching, V BAT = 3.8 V, I SYS = 0 A | 3 | mA | |||
| VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP | VBUS/BAT POWER UP |
| V (VBUS_OP) | VBUS operating range | 3.9 | 14 | V | ||
| V (VBUS_UVLOZ) | VBUS for active I 2 C, no battery | 3.6 | V | |||
| V (SLEEP) | Sleep mode falling threshold | 25 | 65 | 120 | mV | |
| V (SLEEPZ) | Sleep mode rising threshold | 130 | 250 | 370 | mV | |
| VBUS over-voltage rising threshold | 14 | 14.6 | V | |||
| V (ACOV) | VBUS over-voltage falling threshold | 13.5 | 14 | V | ||
| V BAT(UVLOZ) | Battery for active I2C, no VBUS | 2.3 | V | |||
| V BAT(DPL) | Battery depletion falling threshold | 2.15 | 2.5 | V | ||
| V BAT(DPLZ) | Battery depletion rising threshold | 2.35 | 2.7 | V | ||
| V (VBUSMIN) | Bad adapter detection threshold | 3.8 | V | |||
| I (BADSRC) | Bad adapter detection current source | 30 | mA | |||
| POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT |
| V SYS | Typical system regulation voltage | I (SYS) = 0 A, V BAT > V SYS(MIN) , BATFET Disabled (REG09[5]=1) | V | BAT + 50 mV | V | |
| I (SYS) = 0 A, V BAT < V SYS(MIN) , BATFET Disabled (REG09[5]=1) | V SYS(MIN) 150 | + mV | V | |||
| V SYS(MIN) | Minimum DC system voltage output | V BAT < V SYS(MIN) , SYS_MIN = 3.5 V (REG03[3:1]=101), I SYS = 0 A | 3.50 | 3.65 | V | |
| V SYS(MAX) | Maximum DC system voltage output | V BAT = 4.35 V, SYS_MIN = 3.5V (REG03[3:1]=101), I SYS = 0 A | 4.40 | 4.42 | V | |
| R | Top reverse blocking MOSFET(RBFET) on-resistance | T J = -40°C to +85°C | 27 | 38 | m Ω | |
| ON(RBFET) | between VBUS and PMID | T J = -40°C to +125°C | 27 | 44 | m Ω |
VVBUS_UVLOZ < VVBUS < VACOV and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Top switching MOSFET (HSFET) on-resistance between PMID | T J = -40°C to +85°C | 27 | 39 | m Ω | ||
| R ON(HSFET) | and SW | T J = -40°C to +125°C | 27 | 47 | m Ω | |
| R | Bottom switching MOSFET (LSFET) on-resistance between | T J = -40°C to +85°C | 16 | 24 | m Ω | |
| ON(LSFET) | SW and GND | T J = -40°C to +125°C | 16 | 28 | m Ω | |
| V (FWD) | BATFET forward voltage in supplement mode | BAT discharge current 10 mA | 30 | mV | ||
| V BAT(GD) | Battery good comparator rising threshold | V BAT rising | 3.4 | 3.55 | 3.7 | V |
| V BAT(GD_HYST) | Battery good comparator falling threshold | V BAT falling | 100 | mV | ||
| BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER |
| V BAT(REG_RANGE) | Typical charge voltage range | 3.840 | 4.608 | V | ||
| V BAT(REG_STEP) | Typical charge voltage step | 16 | mV | |||
| V BAT(REG) | Charge voltage resolution accuracy | V BAT = 4.208 V (REG06[7:2]=010111) or V BAT = 4.352 V (REG06[7:2]=100000) T J = -40°C to +85°C | -0.5% | 0.5% | ||
| I (CHG_REG_RANGE) | Typical fast charge current regulation range | 0 | 5056 | mA | ||
| I (CHG_REG_STEP) | Typical fast charge current regulation step | V BAT = 3.1 V or 3.8 V, I CHG = 128 mA T J = -40°C to +85°C | -20% | 64 | 20% | mA |
| I (CHG_REG_ACC) | Fast charge current regulation accuracy | V BAT = 3.1 V or 3.8 V, I CHG = 256 mA T J = -40°C to +85°C V BAT = 3.1 V or 3.8 V, I CHG =1792 mA T J = -40°C to +85°C | -10% -5% | 10% 5% | ||
| Battery LOWV falling threshold | Fast charge to precharge, BATLOWV (REG06[1]) = 1 | 2.6 | 2.8 | 2.9 | V | |
| V BAT(LOWV) | Battery LOWV rising threshold | Precharge to fast charge, BATLOWV (REG06[1])=1 (Typical 200-mV hysteresis) | 2.8 | 3 | 3.1 | V |
| I (PRECHG_RANGE) | Precharge current range | 64 | 1024 | mA | ||
| I (PRECHG_STEP) | Typical precharge current step | 64 | mA | |||
| I (PRECHG_ACC) | Precharge current accuracy | V BAT =2.6 V, I PRECHG = 256 mA | -10% | +10% | ||
| I (TERM_RANGE) | Termination current range | 64 | 1024 | mA | ||
| I (TERM_STEP) | Typical termination current step | 64 | mA | |||
| I | Termination current accuracy | I TERM = 256 mA, I CHG <= 1344 mA T J = -20°C to +85°C | -12% | 12% | ||
| (TERM_ACC) | I TERM = 256 mA, I CHG > 1344 mA T J = -20°C to +85°C | -20% | 20% | |||
| V (SHORT) V (SHORT_HYST) | Battery short voltage Battery short voltage hysteresis | VBAT falling | 2 | V | ||
| I (SHORT) | Battery short current | VBAT rising VBAT < 2.2 V V BAT falling, VRECHG (REG06[0]=0) = 0 | 200 100 100 | mV mA mV | ||
| V (RECHG) | Recharge threshold below V BATREG | V BAT falling, VRECHG (REG06[0]=0) = 1 | 200 | mV | ||
| I BAT(LOAD) | Battery discharge load current | V BAT = 4.2 V | 15 | mA | ||
| I SYS(LOAD) | System discharge load current | V SYS = 4.2 V | 30 | mA | ||
| SYS-BAT MOSFET (BATFET) on-resistance | T J = 25°C | 11 | 13 | m Ω | ||
| R ON(BATFET) | T J = -40°C to +125°C | 11 | 19 | m Ω | ||
| INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION |
| V IN(DPM_RANGE) | Typical Input voltage regulation range | 3.9 | 15.3 | V | ||
| V IN(DPM_STEP) | Typical Input voltage regulation step | 100 | mV | |||
| V IN(DPM_ACC) | Input voltage regulation accuracy | VINDPM = 4.4 V, 9 V | 3% | 3% | ||
| I IN(DPM_RANGE) | Typical Input current regulation range | 100 | 3250 | mA | ||
| I IN(DPM_STEP) | Typical Input current regulation step | 50 | mA | |||
| I IN(DPM100_ACC) | Input current 100-mA regulation accuracy V BAT = 5 V, current pulled from SW | IINLIM (REG00[5:0]) =100 mA | 85 | 90 | 100 | mA |
| USB150, IINLIM (REG00[5:0]) = 150 mA | 125 | 135 | 150 | mA | ||
| I IN(DPM_ACC) | Input current regulation accuracy V = 5 V, current pulled from SW | USB500, IINLIM (REG00[5:0]) = 500 mA USB900, IINLIM (REG00[5:0]) = 900 mA | 440 750 | 470 825 | 500 900 | mA mA |
| Adapter 1.5 A, IINLIM (REG00[5:0]) = 1500 mA | 1300 | 1400 | 1500 | mA | ||
| I IN(START) | Input current regulation during system start up | V SYS = 2.2 V, IINLIM (REG00[5:0])> = 200 mA | 200 | mA |
VVBUS_UVLOZ < VVBUS < VACOV and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| K ILIM | INMAX = K ILIM /R | Input current regulation by ILIM pin = | 320 | 355 | 390 | A x Ω |
| I ILIM 1.5 A D+/D- DETECTION (bq25890) | I ILIM 1.5 A D+/D- DETECTION (bq25890) | I ILIM 1.5 A D+/D- DETECTION (bq25890) | I ILIM 1.5 A D+/D- DETECTION (bq25890) | I ILIM 1.5 A D+/D- DETECTION (bq25890) | I ILIM 1.5 A D+/D- DETECTION (bq25890) | I ILIM 1.5 A D+/D- DETECTION (bq25890) |
| V (0P6_VSRC) | D+/D- voltage source (0.6 V) | 0.5 | 0.6 | 0.7 | V | |
| V (3P3_VSRC) | D+ voltage source (3.3V) | For HVDCP detection | 3.2 | 3.3 | 3.4 | V |
| V (3p45_VSRC) | D+/D- voltage source (3.45 V) | 3.3 | 3.45 | 3.6 | V | |
| I (10UA_ISRC) | D+ connection check current source | 7 | 10 | 14 | μA | |
| I (100UA_ISINK) | D+/D- current sink (100 μA) | 50 | 100 | 150 | μA | |
| I (DPDM_LKG) | D+/D- leakage current | D-, switch open | -1 | 1 | μA | |
| D+, switch open | -1 | 1 | μA | |||
| I (1P6MA_ISINK) | D+/D- current sink (1.6 mA) | 1.45 | 1.60 | 1.75 | μA | |
| V (0P4_VTH) | D+/D- low comparator threshold | 250 | 400 | mV | ||
| V (0P8_VTH) | D+ low comparator threshold | 0.8 | V | |||
| V (2P7HI_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 1, 3, or 4) | Internal only | 2.85 | 3.1 | V | |
| V (2P7LO_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 1, 3, or 4) | Internal only | 2.35 | 2.55 | V | |
| V (2P7_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 1, 3, or 4) | 2.55 | 2.85 | V | ||
| V (2P0HI_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 1, 3) | Internal only | 2.15 | 2.35 | V | |
| V (2P0LO_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 1, 3) | Internal only | 1.6 | 1.85 | V | |
| V (2P0_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 1, 3) | 1.85 | 2.15 | V | ||
| V (1P2HI_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 2) | Internal only | 1.35 | 1.60 | V | |
| V (1P2LO_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 2) | Internal only | 0.85 | 1.05 | V | |
| V (1P2_VTH) | D+/D- comparator threshold for non-standard adapter detection (Divider 2) | 1.05 | 1.35 | V | ||
| R (D-_DWN) | D- pulldown for connection check | 14.25 | 24.8 | k Ω | ||
| V (6P5_VTH) | VBUS comparator threshold | Internal only | 6.3 | 6.7 | V | |
| BAT OVER-VOLTAGE/CURRENT PROTECTION | BAT OVER-VOLTAGE/CURRENT PROTECTION | BAT OVER-VOLTAGE/CURRENT PROTECTION | BAT OVER-VOLTAGE/CURRENT PROTECTION | BAT OVER-VOLTAGE/CURRENT PROTECTION | BAT OVER-VOLTAGE/CURRENT PROTECTION | BAT OVER-VOLTAGE/CURRENT PROTECTION |
| V BAT(OVP) | Battery over-voltage threshold | V BAT rising, as percentage of V BAT(REG) | 104% | |||
| V BAT(OVP_HYST) | Battery over-voltage hysteresis | V BAT falling, as percentage of V BAT(REG) | 2% | |||
| I BAT(FET_OCP) | System over-current threshold | 9 | A | |||
| THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN |
| T REG | Junction temperature regulation accuracy | REG08[1:0] = 11 | 120 | °C | ||
| T SHUT | Thermal shutdown rising temperature | Temperature rising | 160 | °C | ||
| T SHUT(HYS) | Thermal shutdown hysteresis | Temperature falling | 30 | °C | ||
| JEITA THERMISTOR COMPARATOR (BUCK MODE) | JEITA THERMISTOR COMPARATOR (BUCK MODE) | JEITA THERMISTOR COMPARATOR (BUCK MODE) | JEITA THERMISTOR COMPARATOR (BUCK MODE) | JEITA THERMISTOR COMPARATOR (BUCK MODE) | JEITA THERMISTOR COMPARATOR (BUCK MODE) | JEITA THERMISTOR COMPARATOR (BUCK MODE) |
| V (T1) | T1 (0°C) threshold, charge suspended T1 below this temperature. | As percentage to V (REGN) | 72.75% | 73.25% | 73.75% | |
| V (T1_HYS) | Charge back to ICHG/2 (REG04[6:0]) and VREG (REG06[7:2]) above this temperature. | As percentage to V (REGN) | 1.4% | |||
| V (T2) | T2 (10°C) threshold, charge back to ICHG/2 (REG04[6:0]) and VREG (REG06[7:2]) below this temperature. | As percentage to V (REGN) | 67.75% | 68.25% | 68.75% | |
| V (T2_HYS) | Charge back to ICHG (REG04[6:0]) and VREG (REG06[7:2]) above this temperature. | As percentage to V (REGN) | 1.4% | |||
| V (T3) | T3 (45°C) threshold, charge back to ICHG (REG04[6:0]) and VREG-200 mV (REG06[7:2]) above this temperature. | As percentage to V (REGN) | 44.25v | 44.75% | 45.25% | |
| V (T3_HYS) | Charge back to ICHG (REG04[6:0]) and VREG (REG06[7:2]) below this temperature. | As percentage to V (REGN) | 1% | |||
| V (T5) | T5 (60°C) threshold, charge suspended above this temperature. | As percentage to V (REGN) | 33.875% | 34.375% | 34.875% | |
| V (T5_HYS) | Charge back to ICHG (REG04[6:0]) and VREG-200 mV (REG06[7:2]) below this temperature. | As percentage to V (REGN) | 1.25% | |||
| COLD/HOT THERMISTOR COMPARATOR (BOOST MODE) | COLD/HOT THERMISTOR COMPARATOR (BOOST MODE) | COLD/HOT THERMISTOR COMPARATOR (BOOST MODE) | COLD/HOT THERMISTOR COMPARATOR (BOOST MODE) | COLD/HOT THERMISTOR COMPARATOR (BOOST MODE) | COLD/HOT THERMISTOR COMPARATOR (BOOST MODE) | COLD/HOT THERMISTOR COMPARATOR (BOOST MODE) |
| V (BCOLD0) | Cold temperature threshold, TS pin voltage rising threshold | As percentage to V REGN , REG01[5] = (Approx. -10°C w/ 103AT) | 76.5% | 77% | 77.5% |
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| V (BCOLD0_HYS) | Cold temperature threshold, TS pin voltage falling threshold | As percentage to V REGN REG01[5] = 0 | 1% | |||
| V (BCOLD1) | Cold temperature threshold 1, TS pin voltage rising threshold | As percentage to V REGN REG01[5] = 1 (Approximately -20°C w/ 103AT) | 79.5% | 80% | 80.5% | |
| V (BCOLD1_HYS) | Cold temperature threshold 1, TS pin voltage falling threshold | As percentage to V REGN REG01[5] = 1 | 1% | |||
| V (BHOT0) | Hot temperature threshold, TS pin voltage falling threshold | As percentage to V REGN REG01[7:6] = 01 (Approx. 55°C w/ 103AT) | 37.25% | 37.75% | 38.25% | |
| V (BHOT0_HYS) | Hot temperature threshold, TS pin voltage rising threshold | As percentage to V REGN REG01[7:6] = 01 | 3% | |||
| V (BHOT1) | Hot temperature threshold 1, TS pin voltage falling threshold | As percentage to V REGN REG01[7:6] = 00 (Approx. 60°C w/ 103AT) | 33.875% | 34.375% | 34.875% | |
| V (BHOT1_HYS) | Hot temperature threshold 1, TS pin voltage rising threshold | As percentage to V REGN REG01[7:6] = 00 | 3% | |||
| V (BHOT2) | Hot temperature threshold 2, TS pin voltage falling threshold | As percentage to V REGN REG01[7:6] = 10 (Approx. 65°C w/ 103AT) | 30.75% | 31.25% | 31.75% | |
| V (BHOT2_HYS) | Hot temperature threshold 2, TS pin voltage rising threshold | As percentage to V REGN REG01[7:6] =10 | 3% | |||
| PWM | ||||||
| F SW | PWM switching frequency, and digital clock | Oscillator frequency | 1.32 | 1.68 | MHz | |
| D MAX | Maximum PWM duty cycle | 97% | ||||
| BOOST MODE OPERATION | BOOST MODE OPERATION | |||||
| V (OTG_REG_RANGE) | Typical boost mode regulation voltage range | 4.55 | 5.55 | V | ||
| V (OTG_REG_STEP) | Typical boost mode regulation voltage step | 64 | mV | |||
| V (OTG_REG_ACC) | Boost mode regulation voltage accuracy | I(VBUS) = 0 A, BOOSTV=4.998V (REG0A[7:4] = 0111) | -3% | 3% | ||
| V (OTG_BAT) | Battery voltage exiting boost mode | BAT falling | 2.6 | 2.9 | V | |
| I (OTG) | Typical boost mode output current range | 0.5 | 2.45 | A | ||
| I (OTG_OCP_ACC) | Boost mode RBFET over-current protection accuracy | BOOST_LIM =1.2 A (REG0A[2:0]=010) | 1.2 | 1.65 | A | |
| V (OTG_OVP) | Boost mode over-voltage threshold | Rising threshold | 5.8 | 6 | V |
VVBUS_UVLOZ < VVBUS < VACOV and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| REGN LDO | REGN LDO | |||||
| V (REGN) | REGN LDO output voltage | V (VBUS) = 9 V, I (REGN) = 40 mA | 5.6 | 6 | 6.4 | V |
| V (VBUS) = 5 V, I (REGN) = 20 mA | 4.7 | 4.8 | V | |||
| I (REGN) | REGN LDO current limit | V (VBUS) = 9 V, V (REGN) = 3.8 V | 50 | mA | ||
| ANALOG-TO-DIGITAL CONVERTER (ADC) | ANALOG-TO-DIGITAL CONVERTER (ADC) | |||||
| RES | Resolution | Rising threshold | 7 | bits | ||
| V BAT(RANGE) | Typical battery voltage range | V (VBUS) > V BAT + V (SLEEP) or OTG mode is enabled | 2.304 | 4.848 | V | |
| V (VBUS) < V BAT + V (SLEEP) and OTG mode is disabled | V SYS_MIN | 4.848 | V | |||
| V (BAT_RES) | Typical battery voltage resolution | 20 | mV | |||
| V (SYS_RANGE) | Typical system voltage range | V (VBUS) > V BAT + V (SLEEP) or OTG mode is enabled | 2.304 | 4.848 | V | |
| V (SYS_RANGE) | V (VBUS) < V BAT + V (SLEEP) and OTG mode is disabled | V SYS_MIN | 4.848 | V | ||
| V (SYS_RES) | Typical system voltage resolution | 20 | mV | |||
| V (VBUS_RANGE) | Typical V VBUS voltage range | V (VBUS) > V BAT + V (SLEEP) or OTG mode is enabled | 2.6 | 15.3 | V | |
| V (VBUS_RES) | Typical V VBUS voltage resolution | 100 | mV | |||
| I BAT(RANGE) | Typical battery charge current range | V (VBUS) > V BAT + V (SLEEP) and V BAT > V BAT(SHORT) | 0 | 6.4 | A | |
| I BAT(RES) | Typical battery charge current resolution | 50 | mA | |||
| V (TS_RANGE) | Typical TS voltage range | 21% | 80% | |||
| V (TS_RES) | Typical TS voltage resolution | 0.47% | ||||
| LOGIC I/O PIN (OTG, CE, PSEL, QON) | LOGIC I/O PIN (OTG, CE, PSEL, QON) | |||||
| V IH | Input high threshold level | 1.3 | ||||
| V IL | Input low threshold level | 0.4 | V | |||
| I IN(BIAS) | High Level Leakage Current | Pull-up rail 1.8 V | 1 | μA | ||
| V | Battery only mode | BAT | V | |||
| (QON) | Internal /QON pull-up | V (VBUS) = 9 V V (VBUS) = 5 V | 5.8 4.3 | V V | ||
| R (QON) | Internal /QON pull-up resistance | 200 | k Ω | |||
| LOGIC I/O PIN (INT, STAT, PG, DSEL) | LOGIC I/O PIN (INT, STAT, PG, DSEL) | |||||
| V OL | Output low threshold level | Sink current = 5 mA, sink current | 0.4 | V | ||
| I OUT_BIAS | High level leakage current | Pull-up rail 1.8 V | 1 | μA | ||
| I 2 C INTERFACE (SCL, SDA) | I 2 C INTERFACE (SCL, SDA) | |||||
| V IH | Input high threshold level, SCL and SDA | Pull-up rail 1.8 V | 1.3 | |||
| V IL | Input low threshold level | Pull-up rail 1.8 V | 0.4 | V | ||
| V OL | Output low threshold level | Sink current = 5 mA, sink current | 0.4 | V | ||
| I BIAS | High level leakage current | Pull-up rail 1.8 V | 1 | μA |
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
| MIN | MAX | VALUE | ||
|---|---|---|---|---|
| Voltage range (with respect to GND) | VBUS (converter not switching) | -2 | 22 | V |
| Voltage range (with respect to GND) | PMID (converter not switching) | -0.3 | 22 | V |
| Voltage range (with respect to GND) | STAT | -0.3 | 20 | V |
| Voltage range (with respect to GND) | PG (bq25892) | -0.3 | 7 | V |
| Voltage range (with respect to GND) | DSEL (bq25890) | -0.3 | 20 | V |
| Voltage range (with respect to GND) | BTST | -0.3 | 20 | V |
| Voltage range (with respect to GND) | SW | -2 | 16 | V |
| Voltage range (with respect to GND) | SW (peak for 10 ns duration) | -3 | 16 | V |
| Voltage range (with respect to GND) | BAT, SYS (converter not switching) | -0.3 | 6 | V |
| Voltage range (with respect to GND) | SDA, SCL, INT, OTG, REGN, TS, CE, QON | -0.3 | 7 | V |
| Voltage range (with respect to GND) | PSEL (bq25892) | -0.3 | 7 | V |
| Voltage range (with respect to GND) | D+, D- (bq25890) | -0.3 | 7 | V |
| Voltage range (with respect to GND) | BTST TO SW | -0.3 | 7 | V |
| Voltage range (with respect to GND) | PGND to GND | -0.3 | 0.3 | V |
| Voltage range (with respect to GND) | ILIM | -0.3 | 5 | V |
| Output sink current | INT, STAT | 6 | mA | |
| PG (bq25892) | 6 | mA | ||
| DSEL (bq25890) | 6 | mA | ||
| Junction temperature | -40 | 150 | °C | |
| Storage temperature range, T stg | -65 | 150 | °C |
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | UNIT | ||
|---|---|---|---|---|
| V IN | Input voltage | 3.9 | 14 | V |
| I IN | Input current (VBUS) | A | ||
| I SYS | Output current (SW) | A | ||
| V BAT | Battery voltage | V | ||
| I BAT | Fast charging current | A | ||
| I BAT | Discharging current with internal MOSFET | Up to 6 | A | |
| I BAT | Discharging current with internal MOSFET | (Up to 1 sec | A | |
| T A | Operating free-air temperature range | -40 | 85 | °C |
Thermal Information
| THERMAL METRIC | (1) | bq25890 bq25892 RTW (WQFN) 24-PINS | UNIT |
|---|---|---|---|
| R θ JA | Junction-to-ambient thermal resistance | 31.8 | °C/W |
| R θ JC((op) | Junction-to-case (top) thermal resistance | 27.9 | °C/W |
| R θ JB | Junction-to-board thermal resistance | 8.7 | °C/W |
| ψ JT | Junction-to-top characterization parameter | 0.3 | °C/W |
| ψ JB | Junction-to-board characterization parameter | 8.7 | °C/W |
| R θ JC(bot) | Junction-to-case (bottom) thermal resistance | 2 | °C/W |
Typical Application
A typical application consists of the device configured as an I 2 C controlled power path management device and a single cell battery charger for Li-Ion and Li-polymer batteries used in a wide range of smartphones and other portable devices. It integrates an input reverse-block FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and BATFET (Q4) between the system and battery. The device also integrates a bootstrap diode for the high-side gate drive.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| BQ25890 | Texas Instruments | — |
| BQ25890/2 | Texas Instruments | — |
| BQ25890RTWT | Texas Instruments | — |
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