BQ25628ERYKR
Synchronous Buck Battery ChargerThe BQ25628ERYKR is a synchronous buck battery charger from Texas Instruments. View the full BQ25628ERYKR datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Synchronous Buck Battery Charger
Package
18-PowerWFQFN
Lifecycle
Active
Key Specifications
| Parameter | Value |
|---|---|
| Battery Chemistry | Lithium Ion/Polymer |
| Battery Pack Voltage | 4.8V (Max) |
| Battery Pack Voltage | 4.8V (Max) |
| Charge Current (Max) | 2A |
| Current - Charging | Constant - Programmable |
| Current - Charging | Constant - Programmable |
| Fault Protection | Over Current, Over Temperature, Over Voltage, Short Circuit |
| Fault Protection | Over Current, Over Temperature, Over Voltage, Short Circuit |
| Interface | I2C |
| Mounting Type | Surface Mount |
| Number of Cells | 1 |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Package / Case | 18-PowerWFQFN |
| Packaging | MouseReel |
| Programmable Features | Current, Timer, Voltage |
| Programmable Features | Current, Timer, Voltage |
| Standard Pack Qty | 3000 |
| Supplier Device Package | 18-WQFN-HR (3x2.5) |
| Supplier Device Package | 18-WQFN-HR (3x2.5) |
| Input Voltage (Max) | 18V |
Overview
Part: BQ25628E — Texas Instruments
Type: Synchronous Buck Battery Charger with NVDC Power Path Management
Description: The BQ25628E is a highly-integrated 2-A switchmode battery charge management and system power path management device for single cell Li-ion and Li-polymer batteries, supporting a 3.9V to 18V input operating voltage range.
Operating Conditions:
- Supply voltage: 3.9–18 V
- Operating temperature: -40 to +85 °C
- Fast charging current: up to 2 A
- Junction temperature: -40 to +125 °C
Absolute Maximum Ratings:
- Max supply voltage (VBUS, converter not switching): 26 V
- Max continuous current (RMS discharge current): 6 A
- Max junction temperature: 150 °C
- Max storage temperature: 150 °C
Key Specs:
- Quiescent battery current (battery only mode, ADC disabled): 1.5 μA (typ) at VBAT = 4V, No VBUS, TJ < 60 °C
- Quiescent battery current (shutdown mode): 0.1 μA (typ) at VBAT = 4V, No VBUS, TJ < 60 °C
- Quiescent battery current (ship mode): 0.15 μA (typ) at VBAT = 4V, No VBUS, TJ < 60 °C
- Charge voltage regulation accuracy: ±0.4%
- Charge current regulation accuracy: ±5%
- Input current regulation accuracy: ±5%
- Switching frequency: 1.5 MHz
- BATFET on-resistance: 15 mΩ
Features:
- High-efficiency, 1.5MHz, synchronous switching mode buck charger
- Narrow VDC (NVDC) power path management
- Flexible autonomous or I2C-controlled modes
- Integrated 12-bit ADC for voltage, current, temperature monitoring
- Flexible JEITA profile for safe charging over temperature
- BATFET control to support shutdown, ship mode and full system reset
- Input voltage regulation (VINDPM) and input current regulation (IINDPM)
- Various safety features: thermal regulation, thermal shutdown, input/system/battery overvoltage protection, battery/converter overcurrent protection, charging safety timer
- IEC 62368-1 CB Certification
Applications:
- Consumer Wearables, Smartwatch
- Portable Speakers, TWS Earphone
- Hearing Aid or TWS Charging Case
Package:
- RYK (WQFN 18) - 2.50mm × 3.00mm
Features
- High-efficiency, 1.5MHz, synchronous switching mode buck charger for single cell battery
- ->90% efficiency down to 25mA output current from 5V input
- -Charge termination from 5mA to 310mA, 5mA steps
- -Flexible JEITA profile for safe charging over temperature
- BATFET control to support shutdown, ship mode and full system reset
- -1.5μA quiescent current in battery only mode
- -0.15μA battery leakage current in ship mode
- -0.1μA battery leakage current in shutdown
- Supports a wide range of input sources
- -3.9V to 18V wide input operating voltage range with 26V absolute maximum input voltage
- -Maximizes source power with input voltage regulation (VINDPM) and input current regulation (IINDPM)
- -VINDPM threshold automatically tracks battery voltage
- Efficient battery operation with 15mΩ BATFET
- Narrow VDC (NVDC) power path management
- -System instant-on with depleted or no battery
- -Battery supplement when adapter is fully loaded
- Flexible autonomous or I 2 C-controlled modes
- Integrated 12-bit ADC for voltage, current, temperature monitoring
- High Accuracy
- -±0.4% charge voltage regulation
- -±5% charge current regulation
- -±5% input current regulation
- Safety
- -Thermal regulation and thermal shutdown
- -Input, system, and battery overvoltage protection
- -Battery, and converter overcurrent protection
- -Charging safety timer
- Safety Related Certifications
- -IEC 62368-1 CB Certification
Applications
- Consumer Wearables, Smartwatch
- Portable Speakers, TWS Earphone
- Hearing Aid or TWS Charging Case
Pin Configuration
Figure 6-1. BQ25628E Pinout, 18-Pin WQFN Top View
Table 6-1. Pin Functions
| NAME | NO. | TYPE (1) | DESCRIPTION |
|---|---|---|---|
| BTST | 1 | P | High Side Switching MOSFET Gate Driver Power Supply - Connect a 10 V or higher rating, 47-nF ceramic capacitor between SW and BTST as the bootstrap capacitor for driving high side switching MOSFET (Q2). |
| REGN | 2 | P | The Charger Internal Linear Regulator Output - Internally, REGN is connected to the anode of the boost-strap diode. Connect a 10 V or higher rating, 4.7-μF ceramic capacitor from REGN to power ground, The capacitor should be placed close to the IC. The REGN LDO output is used for the internal MOSFETs gate driving voltage. |
| PG | 3 | DO | Open Drain Active Low Power Good Indicator - Connect to the pull up rail via 10-kΩ resistor. LOW indicates an input source of V VBUS_UVLO < VBUS < V VBUS_OVP . Failing poor source detection or triggering the sleep comparator ( VBUS < VBAT + V SLEEP ) also causes PG to transition HIGH. |
| ILIM | 4 | AIO | Input Current Limit Setting Input Pin - ILIM pin sets the input current limit as I INREG = K ILIM / R ILIM , where R ILIM is connected from ILIM pin to GND. The input current is limited to the lower of the two values set by ILIM pin and IINDPM register bits. The ILIM pin can also be used to monitor input current. The input current is proportional to the voltage on ILIM pin and can be calculated by I IN = (K ILIM x V ILIM ) / (R ILIM x 0.8). The ILIM pin function is disabled when EN_EXTILIM bit is set to 0. |
| TS_BIAS | 5 | P | Bias for the TS Resistor Voltage Divider - Provides the bias voltage for the TS resistor voltage divider. |
| TS | 6 | AI | Temperature Qualification Voltage Input - Connect a negative temperature coefficient thermistor. Program temperature window with a resistor divider from TS pin bias reference to TS, then to GND. Charge suspends when TS pin voltage is out of range. Recommend a 103AT-2 10-kΩ thermistor. |
| QON | 7 | DI | BATFET Enable or System Power Reset Control Input - If the charger is in ship mode, a logic low on this pin with t SM_EXIT duration forces the device to exit ship mode. If the charger is not in ship mode, a logic low on this pin with t QON_RST initiates a full system power reset if either V VBUS < V VBUS_UVLO or BATFET_CTRL_WVBUS = 1. QON has no effect during shutdown mode. The pin contains an internal pull-up to maintain default high logic. |
| BAT | 8 | P | The Battery Charging Power Connection - Connect to the positive terminal of the battery pack. The internal BATFET is connected between SYS and BAT. |
| SYS | 9 | P | The Charger Output Voltage to System - The Buck converter output connection point to the system. The internal BATFET is connected between SYS and BAT. |
| STAT | 10 | DO | Open Drain Charge Status Output - It indicates various charger operations. Connect to the pull up rail via 10-kΩ resistor. LOW indicates charging in progress. HIGH indicates charging completed or charging disabled. When any fault condition occurs, STAT pin blinks at 1Hz. Setting DIS_STAT = 1 disables the STAT pin function, causing the pin to be pulled HIGH. Leave floating if unused. |
Electrical Characteristics
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS |
| I Q_BAT | Quiescent battery current (BAT, SYS, SW) when the charger is in the battery only mode, BATFET is enabled, ADC is disabled | VBAT = 4V, No VBUS, BATFET is enabled, I2C enabled, ADC disabled, system is powered by battery. -40 °C < T J < 60 °C | 1.5 | 3 | μA | |
| I Q_BAT_ADC | Quiescent battery current (BAT, SYS, SW) when the charger is in the battery only mode, BATFET is enabled, ADC is enabled | VBAT = 4V, No VBUS, BATFET is enabled, I2C enabled, ADC enabled, system is powered by battery. -40 °C < T J < 60 °C | 260 | μA | ||
| I Q_BAT_SD | Quiescent battery current (BAT) when the charger is in shutdown mode, BATFET is disabled, ADC is disabled | VBAT = 4V, No VBUS, BATFET is disabled, I2C disabled, in shutdown mode, ADC disabled, T J < 60 °C | 0.1 | 0.2 | μA | |
| I Q_BAT_SHIP | Quiescent battery current (BAT) when the charger is in ship mode, BATFET is disabled, ADC is disabled | VBAT = 4V, No VBUS, BATFET is disabled, I2C disabled, in ship mode, ADC disabled, T J < 60 °C | 0.15 | 0.5 | μA | |
| I Q_VBUS | Quiescent input current (VBUS) | VBUS = 5V, VBAT = 4V, charge disabled, converter switching, ISYS = 0A, PFM enabled | 450 | μA | ||
| I Q_VBUS_HIZ | Quiescent input current (VBUS) in HIZ | VBUS = 5V, VBAT = 4V, HIZ mode, ADC disabled | 5 | 20 | μA | |
| I Q_VBUS_HIZ | Quiescent input current (VBUS) in HIZ | VBUS = 15V, VBAT = 4V, HIZ mode, ADC disabled | 20 | 35 | μA | |
| VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY |
| V VBUS_OP | VBUS operating range | 3.9 | 18 | V | ||
| V VBUS_UVLO | VBUS falling to turn off I2C, no battery | VBUS falling | 3.0 | 3.15 | 3.3 | V |
| V VBUS_UVLOZ | VBUS rising for active I2C, no battery | VBUS rising | 3.2 | 3.35 | 3.5 | V |
| V VBUS_OVP | VBUS overvoltage rising threshold | VBUS rising, VBUS_OVP = 0 | 6.1 | 6.4 | 6.7 | V |
| V VBUS_OVPZ | VBUS overvoltage falling hreshold | VBUS rising, VBUS_OVP = 0 | 5.8 | 6.0 | 6.2 | V |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| V VBUS_OVP | VBUS overvoltage rising threshold | VBUS rising, VBUS_OVP = 1 | 18.2 | 18.5 | 18.8 | V |
| V VBUS_OVPZ | VBUS overvoltage falling threshold | VBUS falling, VBUS_OVP = 1 | 17.4 | 17.7 | 18.0 | V |
| V SLEEP | Enter Sleep mode threshold | (VBUS - VBAT), VBUS falling | 9 | 45 | 85 | mV |
| V SLEEPZ | Exit Sleep mode threshold | (VBUS - VBAT), VBUS rising | 115 | 220 | 340 | mV |
| V BAT_UVLOZ | BAT voltage for active I2C, turn on BATFET, no VBUS | VBAT rising | 2.3 | 2.4 | 2.5 | V |
| V BAT_UVLO | BAT voltage to turnoff I2C, turn off BATFET, no VBUS | VBAT falling, VBAT_UVLO = 0 = 1 | 2.1 | 2.2 | 2.3 | V |
| VBAT falling, VBAT_UVLO | 1.7 | 1.8 | 1.9 | V | ||
| V POORSRC | Bad adapter detection threshold | VBUS falling | 3.6 | 3.7 | 3.75 | V |
| I POORSRC | Bad adapter detection current source | 10 | mA | |||
| POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT |
| V SYS_REG_ACC | Typical system voltage regulation | ISYS = 0A, VBAT > VSYSMIN, Charge Disabled. Offset above VBAT ISYS = 0A, V BAT < VSYSMIN, Charge | 50 230 | mV mV | ||
| V | register range | Disabled. Offset above VSYSMIN | 3.84 | |||
| SYSMIN_RNG | VSYSMIN | 2.56 | V | |||
| V SYSMIN_REG_STEP | VSYSMIN register step size | 80 | mV | |||
| V SYSMIN_REG_ACC | Minimum DC system voltage output | ISYS = 0A, V BAT < VSYSMIN = B00h (3.52V), Charge Disabled | 3.52 | 3.75 | V | |
| V SYS_SHORT | VSYS short voltage falling threshold to enter forced PFM | 0.9 | V | |||
| V SYS_SHORTZ | VSYS short voltage rising threshold to exit forced PFM | 1.1 | V | |||
| BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER |
| V REG_RANGE | Typical charge voltage regulation range | 3.50 | 4.80 | V | ||
| V REG_STEP | Typical charge voltage step | 10 | mV | |||
| V REG_ACC | Charge voltage accuracy | T J = 25°C | -0.3 | 0.3 | % | |
| T J = -10°C - 85°C | -0.4 | 0.4 | % | |||
| I CHG_RANGE | Typical charge current regulation range | 0.04 | 2.00 | A | ||
| I CHG_STEP | Typical charge current regulation step | 40 | mA | |||
| I CHG_ACC | Charge current accuracy | VBAT = 3.1V or 3.8V, ICHG = 1040mA, T J = -10°C - 85°C | -5.5 | 5.5 | % | |
| I CHG_ACC | Charge current accuracy | VBAT = 3.1V or 3.8V, ICHG = 320mA, T J = -10°C - 85°C | -5.5 | 5.5 | % | |
| I CHG_ACC | Charge current accuracy | VBAT = 3.1V or 3.8V, ICHG = 240mA, T J = -10°C - 85°C | -10 | 10 | % | |
| I CHG_ACC | Charge current accuracy | VBAT = 3.1V or 3.8V, ICHG = 80mA, T J = -10°C - 85°C | 60 | 80 | 100 | mA |
| I PRECHG_RANGE | Typical pre-charge current range | 10 | 310 | mA | ||
| I PRECHG_STEP | Typical pre-charge current step | 10 | mA |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VBAT = 2.5V, IPRECHG = 250mA, T J = -10°C - 85°C | -12 | 12 | % | |||
| I PRECHG_ACC | Pre-charge current accuracy when V BAT below V SYSMIN setting | VBAT = 2.5V, IPRECHG = 100mA, T J = -10°C - 85°C | -15 | 15 | % | |
| VBAT = 2.5V, IPRECHG = 50mA, T J = - 10°C - 85°C | -25 | 25 | % | |||
| I TERM_RANGE | Typical termination current range | 5 | 310 | mA | ||
| I TERM_STEP | Typical termination current step | 5 | mA | |||
| ITERM = 10mA, T J = -10°C - 85°C | -80 | 80 | % | |||
| I TERM_ACC | Termination current accuracy | ITERM = 50mA, T J = -10°C - 85°C | -17 | 17 | % | |
| ITERM = 100mA, T J = -10°C - 85°C | -10 | 10 | % | |||
| V BAT_SHORTZ | Battery short voltage rising threshold to start pre-charge | VBAT rising | 2.25 | V | ||
| V BAT_SHORT | Battery short voltage falling threshold to stop pre-charge | VBAT falling, VBAT_UVLO=0 | 2.05 | V | ||
| V BAT_SHORT | Battery short voltage falling threshold to stop pre-charge | VBAT falling, VBAT_UVLO=1 | 1.85 | V | ||
| I BAT_SHORT | Battery short trickle charging current | VBAT < V BAT_SHORTZ , ITRICKLE = 0 | 5 | 10 | 17 | mA |
| VBAT < V BAT_SHORTZ , ITRICKLE = 1 | 28 | 40 | 52 | mA | ||
| V BAT_LOWVZ | Battery voltage rising threshold | Transition from pre-charge to fast charge | 2.9 | 3 | 3.1 | V |
| V BAT_LOWV | Battery voltage falling threshold | Transition from fast charge to pre-charge | 2.7 | 2.8 | 2.9 | V |
| V RECHG | Battery recharge threshold below | VBAT falling, VRECHG = 0 | 100 | mV | ||
| V REG | VBAT falling, VRECHG = 1 | 200 | mV | |||
| I PMID_LOAD | PMID discharge load current | 20 | 30 | mA | ||
| I BAT_LOAD | Battery discharge load current | 20 | 30 | mA | ||
| I SYS_LOAD | System discharge load current | 20 | 30 | mA | ||
| BATFET | ||||||
| R BATFET | MOSFET on resistance from SYS to BAT | 15 | 25 | mΩ | ||
| BATTERY PROTECTIONS | BATTERY PROTECTIONS | |||||
| V BAT_OVP | Battery overvoltage rising threshold | As percentage of VREG | 103 | 104 | 105 | % |
| V BAT_OVPZ | Battery overvoltage falling threshold | As percentage of VREG | 101 | 102 | 103 | % |
| I BATFET_OCP | BATFET over-current rising threshold | 6 | A | |||
| Battery discharging peak current | IBAT_PK = 10 | 6 | A | |||
| I BAT_PK | rising threshold | IBAT_PK = 11 | 12 | A | ||
| INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | |||||
| V INDPM_RANGE | Typical input voltage regulation range | 3.8 | 16.8 | V | ||
| V INDPM_STEP | Typical input voltage regulation step | 40 | mV | |||
| VINDPM=4.6V | -4 | 4 | % | |||
| V INDPM_ACC | Input voltage regulation accuracy | VINDPM=8V | -3 | 3 | % | |
| V INDPM_ACC | VINDPM=16V | -2 | 2 | % | ||
| V INDPM_BAT_TRACK | Battery tracking VINDPM accuracy | VBAT = 3.9V, VINDPM_BAT_TRACK=1, VINDPM = 4V | 4.15 | 4.3 | 4.45 | V |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| I INDPM_RANGE | Typical input current regulation range | 0.1 | 3.2 | A | ||
| I INDPM_STEP | Typical input current regulation step | 20 | mA | |||
| IINDPM = 500mA, VBUS=5V | 450 | 475 | 500 | mA | ||
| I INDPM_ACC | Input current regulation accuracy | IINDPM = 900mA, VBUS=5V | 810 | 855 | 900 | mA |
| IINDPM = 1500mA, VBUS=5V | 1350 | 1425 | 1500 | mA | ||
| K ILIM | ILIM Pin Scale Factor, IINREG = K ILIM / R ILIM | INREG = 1.6 A | 2250 | 2500 | 2750 | AΩ |
| THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN |
| T REG | Junction temperature regulation | TREG = 1 | 120 | °C | ||
| accuracy | TREG = 0 | 60 | °C | |||
| T SHUT | Thermal Shutdown Rising Threshold | Temperature Increasing | 140 | °C | ||
| T SHUT_HYS | Thermal Shutdown Falling Hysteresis | Temperature Decreasing by T SHUT_HYS | 30 | °C | ||
| THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) |
| V TS_COLD | TS pin rising voltage threshold for TH1 comparator to transition from TS_COOL to | As Percentage to TS pin bias reference (-5°C w/ 103AT), TS_TH1_TH2_TH3 = 100, 101, 110 | 75.0 | 75.5 | 76.0 | % |
| V TS_COLD | TS_COLD. Charge suspended above this voltage. | As Percentage to TS pin bias reference (0°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 001, 010, 011, 111 | 72.8 | 73.3 | 73.8 | % |
| V TS_COLDZ | TS pin falling voltage threshold for TH1 comparator to transition from TS_COLD to TS_COOL. TS_COOL charge | As Percentage to TS pin bias reference (-2.5°C w/ 103AT), TS_TH1_TH2_TH3 = 100, 101, 110 | 73.9 | 74.4 | 74.9 | % |
| V TS_COLDZ | settings resume below this voltage. | As Percentage to TS pin bias reference (2.5°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 001, 010, 011, 111 | 71.7 | 72.2 | 72.7 | % |
| V TS_COOL | for TH2 comparator to transition from TS_PRECOOL to TS_COOL. TS_COOL charging settings used above this voltage. | As Percentage to TS pin bias reference (5°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 100 | 70.6 | 71.1 | 71.6 | % |
| V TS_COOL | TS pin rising voltage threshold | As Percentage to TS pin bias reference (10°C w/ 103AT), TS_TH1_TH2_TH3 = 001, 101, 110, 111 | 67.9 | 68.4 | 68.9 | % |
| V TS_COOL | As Percentage to TS pin bias reference (15°C w/ 103AT), TS_TH1_TH2_TH3 = 010 | 65.0 | 65.5 | 66.0 | % | |
| V TS_COOL | As Percentage to TS pin bias reference (20°C w/ 103AT), TS_TH1_TH2_TH3 = 011 | 61.9 | 62.4 | 62.9 | % | |
| V TS_COOLZ | TS pin falling voltage threshold for TH2 comparator to | As Percentage to TS pin bias reference (7.5°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 100 | 69.3 | 69.8 | 70.3 | % |
| V TS_COOLZ | transition from TS_COOL to | As Percentage to TS pin bias reference (12.5°C w/ 103AT), TS_TH1_TH2_TH3 = 001, 101, 110, 111 | 66.6 | 67.1 | 67.6 | % |
| V TS_COOLZ | TS_PRECOOL. TS_PRECOOL charging settings resume below this voltage. | As Percentage to TS pin bias reference (17.5°C w/ 103AT), TS_TH1_TH2_TH3 = 010 | 63.7 | 64.2 | 64.7 | % |
| V TS_COOLZ | As Percentage to TS pin bias reference (22.5°C w/ 103AT), TS_TH1_TH2_TH3 = 011 | 60.6 | 61.1 | 61.6 | % |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| V TS_PRECOOL | TS pin rising voltage threshold for TH3 comparator to transition from TS_NORMAL to TS_PRECOOL. TS_PRECOOL | As Percentage to TS pin bias reference (15°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 001, 100, 101 | 65 | 65.5 | 66 | % |
| V TS_PRECOOL | charge settings used above this voltage. | As Percentage to TS pin bias reference (20°C w/ 103AT), TS_TH1_TH2_TH3 = 010, 011, 110, 111 | 61.9 | 62.4 | 62.9 | % |
| V TS_PRECOOLZ | TS pin falling voltage threshold for TH3 comparator to transition from TS_PRECOOL to TS_NORMAL. Normal charging | As Percentage to TS pin bias reference (17.5°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 001, 100, 101 | 63.7 | 64.2 | 64.7 | % |
| V TS_PRECOOLZ | resumes below this voltage. | As Percentage to TS pin bias reference (22.5°C w/ 103AT), TS_TH1_TH2_TH3 = 010, 011, 110, 111 | 60.6 | 61.1 | 61.6 | % |
| V TS_PREWARM | TS pin falling voltage threshold for TH4 comparator to transition from TS_NORMAL to TS_PREWARM. TS_PREWARM | As Percentage to TS pin bias reference (35°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 001, 010, 100, 101 | 51.5 | 52 | 52.5 | % |
| V TS_PREWARM | charging settings used below this voltage. | As Percentage to TS pin bias reference (40°C w/ 103AT), TS_TH4_TH5_TH6 = 011, 110, 111 | 47.9 | 48.4 | 48.9 | % |
| V TS_PREWARMZ | TS pin rising voltage threshold for TH4 comparator to transition from TS_PREWARM to TS_NORMAL. Normal charging | As Percentage to TS pin bias reference (32.5°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 001, 010, 100, 101 | 53.3 | 53.8 | 54.3 | % |
| V TS_PREWARMZ | resumes above this voltage. | As Percentage to TS pin bias reference (37.5°C w/ 103AT), TS_TH4_TH5_TH6 = 011, 110, 111 | 49.2 | 49.7 | 50.2 | % |
| V TS_WARM | TS pin falling voltage threshold for TH5 comparator to transition from TS_PREWARM to TS_WARM. TS_WARM charging settings used below this voltage. | As Percentage to TS pin bias reference (40°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 100 | 47.9 | 48.4 | 48.9 | % |
| V TS_WARM | As Percentage to TS pin bias reference (45°C w/ 103AT), TS_TH4_TH5_TH6 = 001, 101, 110 | 44.3 | 44.8 | 45.3 | % | |
| V TS_WARM | As Percentage to TS pin bias reference (50°C w/ 103AT), TS_TH4_TH5_TH6 = 010, 111 | 40.7 | 41.2 | 41.7 | % | |
| V TS_WARM | As Percentage to TS pin bias reference (55°C w/ 103AT), TS_TH4_TH5_TH6 = 011 | 37.2 | 37.7 | 38.2 | % | |
| V TS_WARMZ | TS pin rising voltage threshold for TH5 comparator to transition from TS_WARM to TS_PREWARM. TS_PREWARM charging settings resume above this voltage. | As Percentage to TS pin bias reference (37.5°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 100 | 49.2 | 49.7 | 50.2 | % |
| V TS_WARMZ | As Percentage to TS pin bias reference (42.5°C w/ 103AT), TS_TH4_TH5_TH6 = 001, 101, 110 | 45.6 | 46.1 | 46.6 | % | |
| V TS_WARMZ | As Percentage to TS pin bias reference (47.5°C w/ 103AT), TS_TH4_TH5_TH6 = 010, 111 | 42 | 42.5 | 43 | % | |
| V TS_WARMZ | As Percentage to TS pin bias reference (52.5°C w/ 103AT), TS_TH4_TH5_TH6 = 011 | 38.5 | 39 | 39.5 | % | |
| V TS_HOT | TS pin falling voltage threshold for TH6 comparator to transition from TS_WARM to | As Percentage to TS pin bias reference (50°C w/ 103AT), TS_TH4_TH5_TH6 = 100 or 101 | 40.7 | 41.2 | 41.7 | % |
| V TS_HOT | TS_HOT. Charging is suspended below this voltage. | As Percentage to TS pin bias reference (60°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 001, 010, 011, 110 or 111 | 33.9 | 34.4 | 34.9 | % |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| VBUS_UVLOZ | VBUS VBUS_OVP J PARAMETER | J TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| V TS_HOTZ | TS pin rising voltage threshold for TH6 comparator to transition from TS_HOT to TS_WARM. TS_WARM charging | As Percentage to TS pin bias reference (47.5°C w/ 103AT), TS_TH4_TH5_TH6 = 100 or 101 | 42.0 | 42.5 | 43.0 | % |
| V TS_HOTZ | settings resume above this voltage. | As Percentage to TS pin bias reference (57.5°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 001, 010, 011, 110 or 111 | 35.2 | 35.7 | 36.2 | % |
| SWITCHING CONVERTER | SWITCHING CONVERTER | |||||
| F SW | PWM switching frequency | Oscillator frequency | 1.35 | 1.5 | 1.65 | MHz |
| MOSFET TURN-ON RESISTANCE | MOSFET TURN-ON RESISTANCE | |||||
| R Q1_ON | VBUS to PMID on resistance | T j = -40°C-85°C | 26 | 34 | mΩ | |
| R Q2_ON | Buck high-side switching MOSFET turn on resistance between PMID and SW | T j = -40°C-85°C | 55 | 78 | mΩ | |
| R Q3_ON | Buck low-side switching MOSFET turn on resistance between SW and PGND | T j = -40°C-85°C | 60 | 90 | mΩ | |
| REGN LDO | REGN LDO | |||||
| V REGN | REGN LDO output voltage | V VBUS = 5V, I REGN = 20mA | 4.4 | 4.6 | V | |
| V REGN | REGN LDO output voltage | V VBUS = 9V, I REGN = 20mA | 4.8 | 5.0 | 5.2 | V |
| V REGNZ_OK | REGN not good falling threshold | Converter switching | 3.2 | V | ||
| V REGNZ_OK | REGN not good falling threshold | Converter not switching | 2.3 | V | ||
| I REGN_LIM | REGN LDO current limit | V VBUS = 5V, VREGN = 4.3V | 20 | mA | ||
| I TS_BIAS_FAULT | Rising threshold to transition from TSBIAS good condition to fault condition | REGN=5V; ISINK applied on TS_BIAS pin | 2.5 | 4.5 | 8 | mA |
| I TS_BIAS_FAULTZ | Falling threshold to transition from TSBIAS fault condition to good condition | REGN=5V; ISINK applied on TS_BIAS pin | 2 | 3.85 | 7 | mA |
| ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE |
| t ADC_CONV | Conversion-time, Each | ADC_SAMPLE = 00 | 30 | ms | ||
| t ADC_CONV | Conversion-time, Each | ADC_SAMPLE = 01 | 15 | ms | ||
| t ADC_CONV | Measurement | ADC_SAMPLE = 10 | 7.5 | ms | ||
| t ADC_CONV | Conversion-time, Each | ADC_SAMPLE = 11 | 3.75 | ms | ||
| ADC RES | Effective Resolution | ADC_SAMPLE = 00 | 11 | 12 | bits | |
| ADC RES | Effective Resolution | ADC_SAMPLE = 01 | 10 | 11 | bits | |
| ADC RES | Effective Resolution | ADC_SAMPLE = 10 | 9 | 10 | bits | |
| ADC RES | Effective Resolution | ADC_SAMPLE = 11 | 8 | 9 | bits | |
| ADC MEASUREMENT RANGE AND LSB | ADC MEASUREMENT RANGE AND LSB | |||||
| IBUS_ADC | ADC Bus Current Reading | Range | -4 | 4 | A | |
| IBUS_ADC | ADC Bus Current Reading | LSB | 2 | mA | ||
| VBUS_ADC | ADC VBUS Voltage Reading | Range | 0 | 18.00 | V | |
| VBUS_ADC | ADC VBUS Voltage Reading | LSB | 3.97 | mV | ||
| VPMID_ADC | ADC PMID Voltage Reading | Range | 0 | 18.00 | V | |
| VPMID_ADC | ADC PMID Voltage Reading | LSB | 3.97 | mV | ||
| VBAT_ADC | ADC BAT Voltage Reading | Range | 0 | 5.572 | V | |
| VBAT_ADC | ADC BAT Voltage Reading | LSB | 1.99 | mV | ||
| VSYS_ADC | ADC SYS Voltage Reading | Range | 0 | 5.572 | V | |
| VSYS_ADC | LSB | 1.99 | mV |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| IBAT_ADC | ADC BAT Current Reading | Range | -7.5 | 4.0 | A | |
| IBAT_ADC | ADC BAT Current Reading | LSB | 4 | mA | ||
| TS_ADC | ADC TS Voltage Reading | Range as a percent of REGN (-40 °C to 85 °C for 103AT) | 20.9 | 83.2 | % | |
| TS_ADC | ADC TS Voltage Reading | LSB | 0.0961 | % | ||
| TDIE_ADC | ADC Die Temperature Reading | Range | -40 | 140 | °C | |
| TDIE_ADC | ADC Die Temperature Reading | LSB | 0.5 | °C | ||
| I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) |
| V IH | Input high threshold level, SDA and SCL | 0.78 | V | |||
| V IL | Input low threshold level, SDA and SCL | 0.42 | V | |||
| V OL_SDA | Output low threshold level | Sink current = 5mA, 1.2V VDD | 0.3 | V | ||
| I BIAS | High-level leakage current | Pull up rail 1.8V | 1 | μA | ||
| C BUS | Capacitive load for each bus line | 400 | pF | |||
| LOGIC OUTPUT PIN (INT, STAT) | LOGIC OUTPUT PIN (INT, STAT) | LOGIC OUTPUT PIN (INT, STAT) | LOGIC OUTPUT PIN (INT, STAT) | LOGIC OUTPUT PIN (INT, STAT) | LOGIC OUTPUT PIN (INT, STAT) | LOGIC OUTPUT PIN (INT, STAT) |
| V OL | Output low threshold level | Sink current = 5mA | 0.3 | V | ||
| I OUT_BIAS | High-level leakage current | Pull up rail 1.8V | 1 | μA | ||
| LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) |
| V IH_CE | Input high threshold level, /CE | 0.78 | V | |||
| V IL_CE | Input low threshold level, /CE | 0.4 | V | |||
| I IN_BIAS_CE | High-level leakage current, /CE | Pull up rail 1.8V | 1 | μA | ||
| V IH_QON | Input high threshold level, /QON | 1.3 | V | |||
| V IL_QON | Input low threshold level, /QON | 0.4 | V | |||
| V QON | Internal /QON pull up | /QON is pulled up internally. | 5.0 | V | ||
| R QON | Internal /QON pull up resistance | 250 | kΩ |
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Voltage range (with respect to GND) | VBUS (converter not switching) | -2 | 26 | V |
| Voltage range (with respect to GND) | PMID (converter not switching) | -0.3 | 26 | V |
| Voltage range (with respect to GND) | BAT, SYS (converter not switching) | -0.3 | 6 | V |
| Voltage range (with respect to GND) | SW | -2 (50ns) | 21 | V |
| Voltage range (with respect to GND) | BTST (when converter switching) | -0.3 | 27 | V |
| Voltage range (with respect to GND) | CE, STAT, SCL, SDA, INT, REGN, QON | -0.3 | 6 | V |
| Voltage range (with respect to GND) | ILIM, PG, TS, TS_BIAS | -0.3 | 6 | V |
| Output Sink Current | INT, STAT, PG | 6 | mA | |
| Differential Voltage | BTST-SW | -0.3 | 6 | V |
| Differential Voltage | PMID-VBUS | -0.3 | 6 | V |
| Differential Voltage | SYS-BAT | -0.3 | 6 | V |
| T J | Junction temperature | -40 | 150 | °C |
| T stg | Storage temperature | -55 | 150 | °C |
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| V VBUS | Input voltage | 3.9 | 18 | V | |
| V BAT | Battery voltage | 4.8 | V | ||
| I VBUS | Input current | 3.2 | A | ||
| I SW | Output current (SW) | 3.5 | A | ||
| I BAT | Fast charging current | 2 | A | ||
| I BAT | RMS discharge current (continuously) | 6 | A | ||
| I BAT | Peak discharge current (up to 50ms) | 10 | A | ||
| I REGN | Maximum REGN Current | 20 | mA | ||
| T A | Ambient temperature | -40 | 85 | °C | |
| T J | Junction temperature | -40 | 125 | °C | |
| L SW | Inductor for the switching regulator | 0.68 | 2.2 | μH | |
| C VBUS | VBUS capacitor (without de-rating) | 1 | μF | ||
| C PMID | PMID capacitor (without de-rating) | 10 | μF | ||
| C SYS | SYS capacitor (without de-rating) | 20 | 500 | μF |
Thermal Information
| THERMAL METRIC (1) | BQ25628E RYK (QFN) 18 pins | UNIT | |
|---|---|---|---|
| R θJA | Junction-to-ambient thermal resistance | 60.1 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | 42.1 | °C/W |
| R θJB | Junction-to-board thermal resistance | 13 | °C/W |
| Ψ JT | Junction-to-top characterization parameter | 1.3 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | 12.8 | °C/W |
Typical Application
A typical application consists of the device configured as an I 2 C controlled power path management device and a single cell battery charger for Li-Ion and Li-polymer batteries used in a wide range of smartphone and other portable devices. It integrates an input reverse-block FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and battery FET (BATFET Q4) between the system and battery. The device also integrates a bootstrap diode for the high-side gate drive.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| BQ25628 | Texas Instruments | WQFN-18 |
| BQ25628E | Texas Instruments | — |
| BQ25628ERYKR.A | Texas Instruments | — |
| BQ25629 | Texas Instruments | WQFN-18 (RYK) |
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