BQ25628/629
Synchronous Buck ChargerThe BQ25628/629 is a synchronous buck charger from Texas Instruments. View the full BQ25628/629 datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Synchronous Buck Charger
Overview
Part: BQ25628 / BQ25629 — Texas Instruments
Type: I2C Controlled 1-Cell, 2A, Maximum 18V Input, Buck Battery Charger with NVDC Power Path Management and OTG Output
Description: Highly-integrated 2A switch-mode battery charge management and system power path management devices for single cell Li-ion and Li-polymer batteries, supporting 3.9V to 18V input, with >90% efficiency and 1.5μA quiescent current in battery only mode.
Operating Conditions:
- Supply voltage: 3.9–18 V
- Operating temperature: -40 to 85 °C (Ambient), -40 to 125 °C (Junction)
- Fast charging current: 2 A
- Output current (SW): 3.5 A
Absolute Maximum Ratings:
- Max supply voltage (VBUS): 26 V
- Max junction temperature: 150 °C
- Max storage temperature: 150 °C
Key Specs:
- Charge current regulation: ±5%
- Charge voltage regulation: ±0.4%
- Input current regulation: ±5%
- Quiescent current (battery only mode): 1.5 μA
- Battery leakage current (ship mode): 0.15 μA
- Switching frequency: 1.5 MHz
- BATFET on-resistance: 15 mΩ
- Boost mode output voltage range: 3.84V to 5.2V (80mV per step)
Features:
- High-efficiency synchronous switching mode buck charger
- Narrow VDC (NVDC) power path management
- Supports Boost Mode operation for accessory power
- Flexible autonomous or I2C-controlled modes
- Integrated 12-bit ADC for monitoring
- Various safety features including thermal regulation, overvoltage, and overcurrent protection
- IEC 62368-1 CB Certification
Applications:
- Consumer Wearables, Smartwatch
- Portable Speakers, TWS Earphone
- Hearing Aid or TWS Charging Case
Package:
- RYK (WQFN 18) - 2.50mm × 3.00mm
Features
- High-efficiency, 1.5MHz, synchronous switching mode buck charger for single cell battery
- ->90% efficiency down to 25mA output current from 5V input
- -Charge termination from 5mA to 310mA, 5mA steps
- -Flexible JEITA profile for safe charging over temperature
- BATFET control to support shutdown, ship mode and full system reset
- -1.5μA quiescent current in battery only mode
- -0.15μA battery leakage current in ship mode
- -0.1μA battery leakage current in shutdown
- Supports Boost Mode operation to power accesory
- -Boost Mode supporting 3.84V to 5.2V output
- ->90% boost efficiency down to 100mA boost current for 5V PMID
- Supports a wide range of input sources
- -3.9V to 18V wide input operating voltage range with 26V absolute maximum input voltage
- -Maximizes source power with input voltage regulation (VINDPM) and input current regulation (IINDPM)
- -VINDPM automatically tracks battery voltage
- Efficient battery operation with 15mΩ BATFET
- Narrow VDC (NVDC) power path management
- -System instant-on with depleted or no battery
- -Battery supplement when adapter is fully loaded
- Flexible autonomous or I 2 C-controlled modes
- Integrated 12-bit ADC for voltage, current, temperature monitoring
- High Accuracy
- -±0.4% charge voltage regulation
- -±5% charge current regulation
- -±5% input current regulation
- Safety
- -Thermal regulation and thermal shutdown
- -Input, system, and battery overvoltage protection
- -Battery, and converter overcurrent protection
- -Charging safety timer
- Safety-Related Cerftifications:
- -IEC 62368-1 CB Certification
Applications
- Consumer Wearables, Smartwatch
- Portable Speakers, TWS Earphone
- Hearing Aid or TWS Charging Case
Pin Configuration
Figure 6-1. BQ25628 Pinout, 18-Pin WQFN Top View
Figure 6-2. BQ25629 Pinout, 18-Pin WQFN Top View
Table 6-1. Pin Functions
| NAME | NAME | NO. | (1) | DESCRIPTION |
|---|---|---|---|---|
| BQ25628 | BQ25629 | TYPE | ||
| BTST | BTST | 1 | P | High Side Switching MOSFET Gate Driver Power Supply - Connect a 10 V or higher rating, 47-nF ceramic capacitor between SW and BTST as the bootstrap capacitor for driving high side switching MOSFET (Q2). |
| REGN | REGN | 2 | P | The Charger Internal Linear Regulator Output - Internally, REGN is connected to the anode of the boost-strap diode. Connect a 10 V or higher rating, 4.7-μF ceramic capacitor from REGN to power ground, The capacitor should be placed close to the IC. The REGN LDO output is used for the internal MOSFETs gate driving voltage and for biasing the external TS pin thermistor in BQ25629. |
Electrical Characteristics
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS | QUIESCENT CURRENTS |
| I Q_BAT | Quiescent battery current (BAT, SYS, SW) when the charger is in the battery only mode, BATFET is enabled, ADC is disabled | VBAT = 4V, No VBUS, BATFET is enabled, I2C enabled, ADC disabled, system is powered by battery. -40 °C < T J < 60 °C | 1.5 | 3 | μA | |
| I Q_BAT_ADC | Quiescent battery current (BAT, SYS, SW) when the charger is in the battery only mode, BATFET is enabled, ADC is enabled | VBAT = 4V, No VBUS, BATFET is enabled, I2C enabled, ADC enabled, system is powered by battery. -40 °C < T J < 60 °C | 260 | μA | ||
| I Q_BAT_SD | Quiescent battery current (BAT) when the charger is in shutdown mode, BATFET is disabled, ADC is disabled | VBAT = 4V, No VBUS, BATFET is disabled, I2C disabled, in shutdown mode, ADC disabled, T J < 60 °C | 0.1 | 0.2 | μA | |
| I Q_BAT_SHIP | Quiescent battery current (BAT) when the charger is in ship mode, BATFET is disabled, ADC is disabled | VBAT = 4V, No VBUS, BATFET is disabled, I2C disabled, in ship mode, ADC disabled, T J < 60 °C | 0.15 | 0.5 | μA | |
| I Q_VBUS | Quiescent input current (VBUS) | VBUS = 5V, VBAT = 4V, charge disabled, converter switching, ISYS = 0A, PFM enabled | 450 | μA | ||
| I Q_VBUS_HIZ | Quiescent input current (VBUS) in HIZ | VBUS = 5V, VBAT = 4V, HIZ mode, ADC disabled | 5 | 20 | μA | |
| I Q_VBUS_HIZ | Quiescent input current (VBUS) in HIZ | VBUS = 15V, VBAT = 4V, HIZ mode, ADC disabled | 20 | 35 | μA | |
| I Q_BOOST | Quiescent battery current (BAT, SYS, SW) in boost mode | VBAT = 4.2V, VPMID = 5V, Boost mode enabled, converter switching, PFM enabled, I VPMID = 0A | 220 | μA | ||
| I Q_BYP_OTG | Quiescent battery current (BAT, SYS) in bypass OTG mode | VBAT = 4V, bypass OTG mode enabled, IPMID = 0A | 500 | 850 | μA | |
| VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY | VBUS / VBAT SUPPLY |
| V VBUS_OP | VBUS operating range | 3.9 | 18 | V | ||
| V VBUS_UVLO | VBUS falling to turn off I2C, no battery | VBUS falling | 3.0 | 3.15 | 3.3 | V |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| V VBUS_UVLOZ | VBUS rising for active I2C, no battery | VBUS rising | 3.2 | 3.35 | 3.5 | V |
| V VBUS_OVP | VBUS overvoltage rising threshold | VBUS rising, VBUS_OVP = 0 | 6.1 | 6.4 | 6.7 | V |
| V VBUS_OVPZ | VBUS overvoltage falling hreshold | VBUS rising, VBUS_OVP = 0 | 5.8 | 6.0 | 6.2 | V |
| V VBUS_OVP | VBUS overvoltage rising threshold | VBUS rising, VBUS_OVP = 1 | 18.2 | 18.5 | 18.8 | V |
| V VBUS_OVPZ | VBUS overvoltage falling threshold | VBUS falling, VBUS_OVP = 1 | 17.4 | 17.7 | 18.0 | V |
| V PMID_OVP | Forward mode PMID OVP to drive PMID_GD low | V PMID rising | 5.5 | 5.75 | 6.0 | V |
| V PMID_OVPZ | Forward mode PMID voltage threshold to exit OVP and drive PMID_GD high | V PMID falling | 5.25 | 5.5 | 5.75 | V |
| V SLEEP | Enter Sleep mode threshold | (VBUS - VBAT), VBUS falling | 9 | 45 | 85 | mV |
| V SLEEPZ | Exit Sleep mode threshold | (VBUS - VBAT), VBUS rising | 115 | 220 | 340 | mV |
| V BAT_UVLOZ | BAT voltage for active I2C, turn on BATFET, no VBUS | VBAT rising | 2.3 | 2.4 | 2.5 | V |
| BAT voltage to turnoff I2C, turn off | VBAT falling, VBAT_UVLO = 0 | 2.1 | 2.2 | 2.3 | V | |
| V BAT_UVLO | BATFET, no VBUS | VBAT falling, VBAT_UVLO = 1 | 1.7 | 1.8 | 1.9 | V |
| V BAT_OTG | BAT voltage rising threshold to enable OTG mode | VBAT rising, VBAT_OTG_MIN = 0 VBAT rising, VBAT_OTG_MIN = 1 | 2.9 2.5 | 3.0 2.6 | 3.1 2.7 | V V |
| BAT voltage falling threshold to | VBAT falling, VBAT_OTG_MIN = 0 | 2.7 | 2.8 | 2.9 | V | |
| V BAT_OTGZ | disable OTG mode | VBAT falling, VBAT_OTG_MIN = 1 | 2.3 | 2.4 | 2.5 | V |
| V POORSRC | Bad adapter detection threshold | VBUS falling | 3.6 | 3.7 | 3.75 | V |
| I POORSRC | Bad adapter detection current source | 10 | mA | |||
| POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT | POWER-PATH MANAGEMENT |
| V SYS_REG_ACC | Typical system voltage regulation | ISYS = 0A, VBAT > VSYSMIN, Charge Disabled. Offset above VBAT | 50 | mV | ||
| Typical system voltage regulation | ISYS = 0A, V BAT < VSYSMIN, Charge Disabled. Offset above VSYSMIN | 230 | mV | |||
| V SYSMIN_RNG | VSYSMIN register range | 2.56 | 3.84 | V | ||
| V SYSMIN_REG_STEP | VSYSMIN register step size | 80 | mV | |||
| V SYSMIN_REG_ACC | Minimum DC system voltage output | ISYS = 0A, V BAT < VSYSMIN = B00h (3.52V), Charge Disabled | 3.52 | 3.75 | V | |
| V SYS_SHORT | VSYS short voltage falling threshold to enter forced PFM | 0.9 | V | |||
| V SYS_SHORTZ | VSYS short voltage rising threshold to exit forced PFM | 1.1 | V | |||
| BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER | BATTERY CHARGER |
| V REG_RANGE | Typical charge voltage regulation range | 3.50 | 4.80 | V | ||
| V REG_STEP | Typical charge voltage step | 10 | mV | |||
| V | T J = 25°C | -0.3 | 0.3 | % | ||
| REG_ACC I CHG_RANGE | Charge voltage accuracy Typical charge current regulation range | T J = -10°C - 85°C | -0.4 0.04 | 0.4 2.00 | % A | |
| I CHG_STEP | Typical charge current regulation step | 40 | mA |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| I CHG_ACC | Charge current accuracy | VBAT = 3.1V or 3.8V, ICHG = 1040mA, T J = -10°C - 85°C | -5.5 | 5.5 | % | |
| I CHG_ACC | Charge current accuracy | VBAT = 3.1V or 3.8V, ICHG = 320mA, T J = -10°C - 85°C | -5.5 | 5.5 | % | |
| I CHG_ACC | Charge current accuracy | VBAT = 3.1V or 3.8V, ICHG = 240mA, T J = -10°C - 85°C | -10 | 10 | % | |
| I CHG_ACC | Charge current accuracy | VBAT = 3.1V or 3.8V, ICHG = 80mA, T J = -10°C - 85°C | 60 | 80 | 100 | mA |
| I PRECHG_RANGE | Typical pre-charge current range | 10 | 310 | mA | ||
| I PRECHG_STEP | Typical pre-charge current step | 10 | mA | |||
| I PRECHG_ACC | VBAT = 2.5V, IPRECHG = 250mA, T J = -10°C - 85°C | -12 | 12 | % | ||
| Pre-charge current accuracy when V BAT below V SYSMIN setting | VBAT = 2.5V, IPRECHG = 100mA, T J = -10°C - 85°C | -15 | 15 | % | ||
| Pre-charge current accuracy when V BAT below V SYSMIN setting | VBAT = 2.5V, IPRECHG = 50mA, T J = - 10°C - 85°C | -25 | 25 | % | ||
| I TERM_RANGE | Typical termination current range | 5 | 310 | mA | ||
| I TERM_STEP | Typical termination current step | 5 | mA | |||
| ITERM = 10mA, T J = -10°C - 85°C | -80 | 80 | % | |||
| I TERM_ACC | Termination current accuracy | ITERM = 50mA, T J = -10°C - 85°C | -17 | 17 | % | |
| I TERM_ACC | Termination current accuracy | ITERM = 100mA, T J = -10°C - 85°C | -10 | 10 | % | |
| V BAT_SHORTZ | Battery short voltage rising threshold to start pre-charge | VBAT rising | 2.25 | V | ||
| V BAT_SHORT | Battery short voltage falling threshold to stop pre-charge | VBAT falling, VBAT_UVLO=0 | 2.05 | V | ||
| V BAT_SHORT | Battery short voltage falling threshold to stop pre-charge | VBAT falling, VBAT_UVLO=1 | 1.85 | V | ||
| Battery short trickle charging | VBAT < V BAT_SHORTZ , ITRICKLE = 0 | 5 | 10 | 17 | mA | |
| I BAT_SHORT | current | VBAT < V BAT_SHORTZ , ITRICKLE = 1 | 28 | 40 | 52 | mA |
| V BAT_LOWVZ | Battery voltage rising threshold | Transition from pre-charge to fast charge | 2.9 | 3.0 | 3.1 | V |
| V BAT_LOWV | Battery voltage falling threshold | Transition from fast charge to pre-charge | 2.7 | 2.8 | 2.9 | V |
| Battery recharge threshold below | VBAT falling, VRECHG = 0 | 100 | mV | |||
| V RECHG | V REG | VBAT falling, VRECHG = 1 | 200 | mV | ||
| I PMID_LOAD | PMID discharge load current | 20 | 30 | mA | ||
| I BAT_LOAD | Battery discharge load current | 20 | 30 | mA | ||
| I SYS_LOAD | System discharge load current | 20 | 30 | mA | ||
| BATFET | ||||||
| R BATFET | MOSFET on resistance from SYS to BAT | 15 | 25 | mΩ | ||
| BATTERY PROTECTIONS | BATTERY PROTECTIONS | BATTERY PROTECTIONS | BATTERY PROTECTIONS | BATTERY PROTECTIONS | BATTERY PROTECTIONS | BATTERY PROTECTIONS |
| V BAT_OVP | Battery overvoltage rising threshold | As percentage of VREG | 103 | 104 | 105 | % |
| V BAT_OVPZ | Battery overvoltage falling threshold | As percentage of VREG | 101 | 102 | 103 | % |
| I BATFET_OCP | BATFET over-current rising threshold | 6 | A | |||
| Battery discharging peak current | IBAT_PK = 10 | 6 | A | |||
| I BAT_PK | rising threshold | IBAT_PK = 11 | 12 | A |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION | INPUT VOLTAGE / CURRENT REGULATION |
| V INDPM_RANGE | Typical input voltage regulation range | 3.8 | 16.8 | V | ||
| V INDPM_STEP | Typical input voltage regulation step | 40 | mV | |||
| V INDPM_ACC | Input voltage regulation accuracy | VINDPM=4.6V | -4 | 4 | % | |
| VINDPM=8V | -3 | 3 | % | |||
| VINDPM=16V | -2 | 2 | % | |||
| V INDPM_BAT_TRACK | Battery tracking VINDPM accuracy | VBAT = 3.9V, VINDPM_BAT_TRACK=1, VINDPM = 4V | 4.15 | 4.3 | 4.45 | V |
| I INDPM_RANGE | Typical input current regulation range | 0.1 | 3.2 | A | ||
| I INDPM_STEP | Typical input current regulation step | 20 | mA | |||
| I INDPM_ACC | IINDPM = 500mA, VBUS=5V | 450 | 475 | 500 | mA | |
| Input current regulation accuracy | IINDPM = 900mA, VBUS=5V | 810 | 855 | 900 | mA | |
| IINDPM = 1500mA, VBUS=5V | 1350 | 1425 | 1500 | mA | ||
| I VBUS_OCP | Forwrad mode VBUS overcurrent to drive PMID_GD low as a percentage of IINDPM | As a percentage of IINDPM | 108 | % | ||
| K ILIM | ILIM Pin Scale Factor, IINREG = K ILIM / R ILIM | INREG = 1.6 A | 2250 | 2500 | 2750 | AΩ |
| D+ / D- DETECTION | D+ / D- DETECTION | D+ / D- DETECTION | D+ / D- DETECTION | D+ / D- DETECTION | D+ / D- DETECTION | D+ / D- DETECTION |
| V D+D-_0p6V_SRC | D+/D- voltage source (600 mV) | 1 mA load on D+/D- | 400 | 600 | 800 | mV |
| I D+D-_LKG | Leakage current into D+/D- | HiZ mode | -1 | 1 | μA | |
| V D+D-_2p8 | D+/D- comparator threshold for non-standard adapter | 2.55 | 2.85 | V | ||
| V D+D-_2p0 | D+/D- comparator threshold for non-standard adapter | 1.85 | 2.15 | V | ||
| THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN | THERMAL REGULATION AND THERMAL SHUTDOWN |
| T REG | Junction temperature regulation | TREG = 1 | 120 | °C | ||
| accuracy | TREG = 0 | 60 | °C | |||
| T SHUT | Thermal Shutdown Rising Threshold | Temperature Increasing | 140 | °C | ||
| T SHUT_HYS | Thermal Shutdown Falling Hysteresis | Temperature Decreasing by T SHUT_HYS | 30 | °C | ||
| THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) | THERMISTOR COMPARATORS (CHARGE MODE) |
| V TS_COLD | TS pin rising voltage threshold for TH1 comparator to transition from TS_COOL to TS_COLD. Charge suspended | As Percentage to TS pin bias reference (-5°C w/ 103AT), TS_TH1_TH2_TH3 = 100, 101, 110 | 75.0 | 75.5 | 76.0 | % |
| V TS_COLD | above this voltage. | As Percentage to TS pin bias reference (0°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 001, 010, 011, 111 | 72.8 | 73.3 | 73.8 | % |
| V TS_COLDZ | TS pin falling voltage threshold for TH1 comparator to transition from TS_COLD to | As Percentage to TS pin bias reference (-2.5°C w/ 103AT), TS_TH1_TH2_TH3 = 100, 101, 110 | 73.9 | 74.4 | 74.9 | % |
| V TS_COLDZ | TS_COOL. TS_COOL charge settings resume below this voltage. | As Percentage to TS pin bias reference (2.5°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 001, 010, 011, 111 | 71.7 | 72.2 | 72.7 | % |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| V TS_COOL | TS pin rising voltage threshold for TH2 comparator to transition from TS_PRECOOL to TS_COOL. TS_COOL charging settings used above this voltage. | As Percentage to TS pin bias reference (5°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 100 | 70.6 | 71.1 | 71.6 | % |
| V TS_COOL | TS pin rising voltage threshold for TH2 comparator to transition from TS_PRECOOL to TS_COOL. TS_COOL charging settings used above this voltage. | As Percentage to TS pin bias reference (10°C w/ 103AT), TS_TH1_TH2_TH3 = 001, 101, 110, 111 | 67.9 | 68.4 | 68.9 | % |
| V TS_COOL | TS pin rising voltage threshold for TH2 comparator to transition from TS_PRECOOL to TS_COOL. TS_COOL charging settings used above this voltage. | As Percentage to TS pin bias reference (15°C w/ 103AT), TS_TH1_TH2_TH3 = 010 | 65 | 65.5 | 66 | % |
| V TS_COOL | TS pin rising voltage threshold for TH2 comparator to transition from TS_PRECOOL to TS_COOL. TS_COOL charging settings used above this voltage. | As Percentage to TS pin bias reference (20°C w/ 103AT), TS_TH1_TH2_TH3 = 011 | 61.9 | 62.4 | 62.9 | % |
| V TS_COOLZ | TS pin falling voltage threshold for TH2 comparator to transition from TS_COOL to TS_PRECOOL. TS_PRECOOL charging settings resume below this voltage. | As Percentage to TS pin bias reference (7.5°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 100 | 69.3 | 69.8 | 70.3 | % |
| V TS_COOLZ | TS pin falling voltage threshold for TH2 comparator to transition from TS_COOL to TS_PRECOOL. TS_PRECOOL charging settings resume below this voltage. | As Percentage to TS pin bias reference (12.5°C w/ 103AT), TS_TH1_TH2_TH3 = 001, 101, 110, 111 | 66.6 | 67.1 | 67.6 | % |
| V TS_COOLZ | TS pin falling voltage threshold for TH2 comparator to transition from TS_COOL to TS_PRECOOL. TS_PRECOOL charging settings resume below this voltage. | As Percentage to TS pin bias reference (17.5°C w/ 103AT), TS_TH1_TH2_TH3 = 010 | 63.7 | 64.2 | 64.7 | % |
| V TS_COOLZ | TS pin falling voltage threshold for TH2 comparator to transition from TS_COOL to TS_PRECOOL. TS_PRECOOL charging settings resume below this voltage. | As Percentage to TS pin bias reference (22.5°C w/ 103AT), TS_TH1_TH2_TH3 = 011 | 60.6 | 61.1 | 61.6 | % |
| V TS_PRECOOL | TS pin rising voltage threshold for TH3 comparator to transition from TS_NORMAL to TS_PRECOOL. TS_PRECOOL charge settings used above this voltage. | As Percentage to TS pin bias reference (15°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 001, 100, 101 | 65 | 65.5 | 66 | % |
| V TS_PRECOOL | TS pin rising voltage threshold for TH3 comparator to transition from TS_NORMAL to TS_PRECOOL. TS_PRECOOL charge settings used above this voltage. | As Percentage to TS pin bias reference (20°C w/ 103AT), TS_TH1_TH2_TH3 = 010, 011, 110, 111 | 61.9 | 62.4 | 62.9 | % |
| V TS_PRECOOLZ | TS pin falling voltage threshold for TH3 comparator to transition from TS_PRECOOL to TS_NORMAL. Normal charging resumes below this voltage. | As Percentage to TS pin bias reference (17.5°C w/ 103AT), TS_TH1_TH2_TH3 = 000, 001, 100, 101 | 63.7 | 64.2 | 64.7 | % |
| V TS_PRECOOLZ | TS pin falling voltage threshold for TH3 comparator to transition from TS_PRECOOL to TS_NORMAL. Normal charging resumes below this voltage. | As Percentage to TS pin bias reference (22.5°C w/ 103AT), TS_TH1_TH2_TH3 = 010, 011, 110, 111 | 60.6 | 61.1 | 61.6 | % |
| V TS_PREWARM | TS pin falling voltage threshold for TH4 comparator to transition from TS_NORMAL to TS_PREWARM. TS_PREWARM charging settings used below this voltage. | As Percentage to TS pin bias reference (35°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 001, 010, 100, 101 | 51.5 | 52 | 52.5 | % |
| V TS_PREWARM | TS pin falling voltage threshold for TH4 comparator to transition from TS_NORMAL to TS_PREWARM. TS_PREWARM charging settings used below this voltage. | As Percentage to TS pin bias reference (40°C w/ 103AT), TS_TH4_TH5_TH6 = 011, 110, 111 | 47.9 | 48.4 | 48.9 | % |
| V TS_PREWARMZ | TS pin rising voltage threshold for TH4 comparator to transition from TS_PREWARM to TS_NORMAL. Normal charging resumes above this voltage. | As Percentage to TS pin bias reference (32.5°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 001, 010, 100, 101 | 53.3 | 53.8 | 54.3 | % |
| V TS_PREWARMZ | TS pin rising voltage threshold for TH4 comparator to transition from TS_PREWARM to TS_NORMAL. Normal charging resumes above this voltage. | As Percentage to TS pin bias reference (37.5°C w/ 103AT), TS_TH4_TH5_TH6 = 011, 110, 111 | 49.2 | 49.7 | 50.2 | % |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| V TS_WARM | TS pin falling voltage threshold for TH5 comparator to transition from TS_PREWARM to TS_WARM. TS_WARM charging settings used below this voltage. | As Percentage to TS pin bias reference (40°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 100 | 47.9 | 48.4 | 48.9 | % |
| V TS_WARM | TS pin falling voltage threshold for TH5 comparator to transition from TS_PREWARM to TS_WARM. TS_WARM charging settings used below this voltage. | As Percentage to TS pin bias reference (45°C w/ 103AT), TS_TH4_TH5_TH6 = 001, 101, 110 | 44.3 | 44.8 | 45.3 | % |
| V TS_WARM | TS pin falling voltage threshold for TH5 comparator to transition from TS_PREWARM to TS_WARM. TS_WARM charging settings used below this voltage. | As Percentage to TS pin bias reference (50°C w/ 103AT), TS_TH4_TH5_TH6 = 010, 111 | 40.7 | 41.2 | 41.7 | % |
| V TS_WARM | TS pin falling voltage threshold for TH5 comparator to transition from TS_PREWARM to TS_WARM. TS_WARM charging settings used below this voltage. | As Percentage to TS pin bias reference (55°C w/ 103AT), TS_TH4_TH5_TH6 = 011 | 37.2 | 37.7 | 38.2 | % |
| V TS_WARMZ | TS pin rising voltage threshold for TH5 comparator to transition from TS_WARM to TS_PREWARM. TS_PREWARM charging settings resume above this voltage. | As Percentage to TS pin bias reference (37.5°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 100 | 49.2 | 49.7 | 50.2 | % |
| V TS_WARMZ | TS pin rising voltage threshold for TH5 comparator to transition from TS_WARM to TS_PREWARM. TS_PREWARM charging settings resume above this voltage. | As Percentage to TS pin bias reference (42.5°C w/ 103AT), TS_TH4_TH5_TH6 = 001, 101, 110 | 45.6 | 46.1 | 46.6 | % |
| V TS_WARMZ | TS pin rising voltage threshold for TH5 comparator to transition from TS_WARM to TS_PREWARM. TS_PREWARM charging settings resume above this voltage. | As Percentage to TS pin bias reference (47.5°C w/ 103AT), TS_TH4_TH5_TH6 = 010, 111 | 42.0 | 42.5 | 43.0 | % |
| V TS_WARMZ | TS pin rising voltage threshold for TH5 comparator to transition from TS_WARM to TS_PREWARM. TS_PREWARM charging settings resume above this voltage. | As Percentage to TS pin bias reference (52.5°C w/ 103AT), TS_TH4_TH5_TH6 = 011 | 38.5 | 39 | 39.5 | % |
| V TS_HOT | TS pin falling voltage threshold for TH6 comparator to transition from TS_WARM to TS_HOT. Charging is suspended below this voltage. | As Percentage to TS pin bias reference (50°C w/ 103AT), TS_TH4_TH5_TH6 = 100 or 101 | 40.7 | 41.2 | 41.7 | % |
| V TS_HOT | TS pin falling voltage threshold for TH6 comparator to transition from TS_WARM to TS_HOT. Charging is suspended below this voltage. | As Percentage to TS pin bias reference (60°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 001, 010, 011, 110 or 111 | 33.9 | 34.4 | 34.9 | % |
| V TS_HOTZ | TS pin rising voltage threshold for TH6 comparator to transition from TS_HOT to TS_WARM. TS_WARM charging settings resume above this voltage. | As Percentage to TS pin bias reference (47.5°C w/ 103AT), TS_TH4_TH5_TH6 = 100 or 101 | 42.0 | 42.5 | 43.0 | % |
| V TS_HOTZ | TS pin rising voltage threshold for TH6 comparator to transition from TS_HOT to TS_WARM. TS_WARM charging settings resume above this voltage. | As Percentage to TS pin bias reference (57.5°C w/ 103AT), TS_TH4_TH5_TH6 = 000, 001, 010, 011, 110 or 111 | 35.2 | 35.7 | 36.2 | % |
| THERMISTOR COMPARATORS (OTG MODE) | THERMISTOR COMPARATORS (OTG MODE) | THERMISTOR COMPARATORS (OTG MODE) | THERMISTOR COMPARATORS (OTG MODE) | THERMISTOR COMPARATORS (OTG MODE) | THERMISTOR COMPARATORS (OTG MODE) | THERMISTOR COMPARATORS (OTG MODE) |
| V TS_ OTG_ COLD | TS pin rising voltage threshold to transition from TS_OTG_NORMAL to TS_OTG_COLD. OTG suspended above this voltage. | As Percentage to TS pin bias reference (-20°C w/ 103AT), TS_TH_OTG_COLD = 0 | 79.5 | 80.0 | 80.5 | % |
| V TS_ OTG_ COLD | TS pin rising voltage threshold to transition from TS_OTG_NORMAL to TS_OTG_COLD. OTG suspended above this voltage. | As Percentage to TS pin bias reference (-10°C w/ 103AT), TS_TH_OTG_COLD = 1 | 76.6 | 77.1 | 77.6 | % |
| V TS_OTG_COLDZ | TS pin falling voltage threshold to transition from TS_OTG_COLD to TS_OTG_NORMAL. OTG resumes below this voltage. | As Percentage to TS pin bias reference (-15°C w/ 103AT), TS_TH_OTG_COLD = 0 | 78.2 | 78.7 | 79.2 | % |
| V TS_OTG_COLDZ | TS pin falling voltage threshold to transition from TS_OTG_COLD to TS_OTG_NORMAL. OTG resumes below this voltage. | As Percentage to TS pin bias reference (-5°C w/ 103AT), TS_TH_OTG_COLD = 1 | 75.0 | 75.5 | 76.5 | % |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| V TS_OTG_HOT | TS pin falling voltage threshold to transition from TS_OTG_NORMAL to TS_OTG_HOT. OTG | As Percentage to TS pin bias reference (55°C w/ 103AT), TS_OTG_HOT = 00 | 37.2 | 37.7 | 38.2 | % |
| V TS_OTG_HOT | suspended | As Percentage to TS pin bias reference (60°C w/ 103AT), TS_OTG_HOT = 01 | 33.9 | 34.4 | 34.9 | % |
| V TS_OTG_HOT | below this voltage. | As Percentage to TS pin bias reference (65°C w/ 103AT), TS_OTG_HOT = 10 | 30.8 | 31.3 | 31.8 | % |
| V TS_OTG_HOTZ | TS pin rising voltage threshold to transition from TS_OTG_HOT to TS_OTG_NORMAL. OTG resumes above this threshold. | As Percentage to TS pin bias reference (52.5°C w/ 103AT), TS_OTG_HOT = 00 | 38.5 | 39 | 39.5 | % |
| V TS_OTG_HOTZ | TS pin rising voltage threshold to transition from TS_OTG_HOT to TS_OTG_NORMAL. OTG resumes above this threshold. | As Percentage to TS pin bias reference (57.5°C w/ 103AT), TS_OTG_HOT = 01 | 35.2 | 35.7 | 36.2 | % |
| V TS_OTG_HOTZ | TS pin rising voltage threshold to transition from TS_OTG_HOT to TS_OTG_NORMAL. OTG resumes above this threshold. | As Percentage to TS pin bias reference (62.5°C w/ 103AT), TS_OTG_HOT = 10 | 32 | 32.5 | 33 | % |
| SWITCHING CONVERTER | SWITCHING CONVERTER | |||||
| F SW | PWM switching frequency | Oscillator frequency | 1.35 | 1.5 | 1.65 | MHz |
| MOSFET TURN-ON RESISTANCE | MOSFET TURN-ON RESISTANCE | |||||
| R Q1_ON | VBUS to PMID on resistance | T j = -40°C-85°C | 26 | 34 | mΩ | |
| R Q2_ON | Buck high-side switching MOSFET turn on resistance between PMID and SW | T j = -40°C-85°C | 55 | 78 | mΩ | |
| R Q3_ON | Buck low-side switching MOSFET turn on resistance between SW and PGND | T j = -40°C-85°C | 60 | 90 | mΩ | |
| OTG MODE CONVERTER | OTG MODE CONVERTER | |||||
| V BOOST_RANGE | Typical boost mode voltage regulation range | 3.8 | 5.2 | V | ||
| V BOOST_STEP | Typical boost mode voltage regulation step | 80 | mV | |||
| V BOOST_ACC | Boost mode voltage regulation accuracy | IVBUS = 0A, VOTG = 5V | -3 | 3 | % | |
| V OTG_UVP | OTG mode undervoltage falling threshold at PMID | 3.4 | V | |||
| V OTG_VBUS_OVP | OTG mode overvoltage rising threshold at VBUS | 5.5 | 5.75 | 6 | V | |
| V BYPASS_PMID_OVP | Bypass OTG Mode overvoltage rising threshold at PMID | As a percentage of VSYS | 105 | 107 | 109 | % |
| V BOOST_PMID_OVP | Boost OTG mode overvoltage rising threshold at PMID | As percentage of VOTG regulation | 105 | 107 | 109 | % |
| I BYPASS_RCP | Bypass OTG Mode reverse current (from PMID to BAT) threshold | 415 | 500 | 550 | mA | |
| REGN LDO | REGN LDO | |||||
| V REGN | REGN LDO output voltage | V VBUS = 5V, I REGN = 20mA | 4.4 | 4.6 | V | |
| V REGN | REGN LDO output voltage | V VBUS = 9V, I REGN = 20mA | 4.8 | 5 | 5.2 | V |
| V | REGN not good falling threshold | Converter switching | 3.2 | V | ||
| REGNZ_OK | Converter not switching | 2.3 | V | |||
| I REGN_LIM | REGN LDO current limit | V VBUS = 5V, VREGN = 4.3V | 20 | mA | ||
| I TS_BIAS_FAULT | Rising threshold to transition from TSBIAS good condition to fault condition | REGN=5V; ISINK applied on TS_BIAS pin | 2.5 | 4.5 | 8 | mA |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| VBUS_UVLOZ | VBUS VBUS_OVP J PARAMETER | J TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| I TS_BIAS_FAULTZ | Falling threshold to transition from TSBIAS fault condition to good condition | REGN=5V; ISINK applied on TS_BIAS pin | 2 | 3.85 | 7 | mA |
| ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE ADC_SAMPLE = 00 | ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE 30 | ADC MEASUREMENT ACCURACY AND PERFORMANCE | ADC MEASUREMENT ACCURACY AND PERFORMANCE ms |
| Conversion-time, Each | ADC_SAMPLE = 01 | 15 | ms | |||
| t ADC_CONV | Measurement | ADC_SAMPLE = 10 ADC_SAMPLE = 11 | 7.5 3.75 | ms ms | ||
| ADC_SAMPLE = 00 | 11 | 12 | bits | |||
| ADC_SAMPLE = 01 | 10 | 11 | bits | |||
| ADC RES | Effective Resolution | ADC_SAMPLE = 10 | 9 | 10 | bits | |
| ADC_SAMPLE = 11 | 8 | 9 | bits | |||
| ADC MEASUREMENT RANGE AND LSB | ADC MEASUREMENT RANGE AND LSB | ADC MEASUREMENT RANGE AND LSB | ADC MEASUREMENT RANGE AND LSB | ADC MEASUREMENT RANGE AND LSB | ADC MEASUREMENT RANGE AND LSB | ADC MEASUREMENT RANGE AND LSB |
| Range | -4 | 4 | A | |||
| IBUS_ADC | ADC Bus Current Reading | LSB | 2 | mA | ||
| Range | 0 | 18.00 | V | |||
| VBUS_ADC | ADC VBUS Voltage Reading | LSB | 3.97 | mV | ||
| ADC PMID Voltage Reading | Range | 0 | 18.00 | V | ||
| VPMID_ADC | LSB | 3.97 | mV | |||
| VBAT_ADC | ADC BAT Voltage Reading | Range LSB | 0 | 1.99 | 5.572 | V mV |
| VSYS_ADC | ADC SYS Voltage Reading | Range LSB | 0 | 1.99 | 5.572 | V mV |
| IBAT_ADC | ADC BAT Current Reading | Range LSB | -7.5 | 4 | 4.0 | A mA |
| TS_ADC | ADC TS Voltage Reading | Range as a percent of REGN (-40 °C to 85 °C for 103AT) | 20.9 | 83.2 | % | |
| ADC TS Voltage Reading | LSB | 0.0961 | % | |||
| Range | -40 | 0.5 | °C | |||
| TDIE_ADC | ADC Die Temperature Reading | LSB | 140 | °C | ||
| I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) | I2C INTERFACE (SCL, SDA) |
| V IH | Input high threshold level, SDA and SCL | 0.78 | V | |||
| V IL | Input low threshold level, SDA and SCL | 0.42 | V | |||
| V OL_SDA | Output low threshold level | Sink current = 5mA, 1.2V VDD | 0.3 | V | ||
| I BIAS | High-level leakage current | Pull up rail 1.8V | 1 | μA | ||
| C BUS | Capacitive load for each bus line | 400 | pF | |||
| LOGIC OUTPUT PIN (INT, STAT, PMID_GD) | LOGIC OUTPUT PIN (INT, STAT, PMID_GD) | LOGIC OUTPUT PIN (INT, STAT, PMID_GD) | LOGIC OUTPUT PIN (INT, STAT, PMID_GD) | LOGIC OUTPUT PIN (INT, STAT, PMID_GD) | LOGIC OUTPUT PIN (INT, STAT, PMID_GD) | LOGIC OUTPUT PIN (INT, STAT, PMID_GD) |
| V OL | Output low threshold level | Sink current = 5mA | 0.3 | V | ||
| I OUT_BIAS | High-level leakage current | Pull up rail 1.8V | 1 | μA | ||
| LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) | LOGIC INPUT PIN (CE, QON) |
| V IH_CE | Input high threshold level, /CE | 0.78 | V | |||
| V IL_CE | Input low threshold level, /CE | 0.4 | V | |||
| I IN_BIAS_CE | High-level leakage current, /CE | Pull up rail 1.8V | 1 | μA | ||
| V IH_QON | Input high threshold level, /QON | 1.3 | V |
VVBUS_UVLOZ < VVBUS < VVBUS_OVP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
| PARAMETER | PARAMETER | TEST CONDITIONS | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| V IL_QON | Input low threshold level, /QON | 0.4 | V | ||
| V QON | Internal /QON pull up | /QON is pulled up internally. | 5 | V | |
| R QON | Internal /QON pull up resistance | 250 | kΩ |
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Voltage range (with respect to GND) | VBUS (converter not switching) | -2 | 26 | V |
| Voltage range (with respect to GND) | PMID (converter not switching) | -0.3 | 26 | V |
| Voltage range (with respect to GND) | BAT, SYS (converter not switching) | -0.3 | 6 | V |
| Voltage range (with respect to GND) | SW | -2 (50ns) | 21 | V |
| Voltage range (with respect to GND) | BTST (when converter switching) | -0.3 | 27 | V |
| Voltage range (with respect to GND) | CE, STAT, SCL, SDA, INT, REGN, QON | -0.3 | 6 | V |
| Voltage range (with respect to GND) | D+, D-, ILIM, TS, TS_BIAS , PMID_GD | -0.3 | 6 | V |
| Output Sink Current | INT, STAT, PMID_GD | 6 | mA | |
| Differential Voltage | BTST-SW | -0.3 | 6 | V |
| Differential Voltage | PMID-VBUS | -0.3 | 6 | V |
| Differential Voltage | SYS-BAT | -0.3 | 6 | V |
| T J | Junction temperature | -40 | 150 | °C |
| T stg | Storage temperature | -55 | 150 | °C |
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| V VBUS | Input voltage | 3.9 | 18 | V | |
| V BAT | Battery voltage | 4.8 | V | ||
| I VBUS | Input current | 3.2 | A | ||
| I SW | Output current (SW) | 3.5 | A | ||
| I BAT | Fast charging current | 2 | A | ||
| I BAT | RMS discharge current (continuously) | 6 | A | ||
| I BAT | Peak discharge current (up to 50ms) | 10 | A | ||
| I REGN | Maximum REGN Current | 20 | mA | ||
| T A | Ambient temperature | -40 | 85 | °C | |
| T J | Junction temperature | -40 | 125 | °C | |
| L SW | Inductor for the switching regulator | 0.68 | 2.2 | μH | |
| C VBUS | VBUS capacitor (without de-rating) | 1 | μF | ||
| C PMID | PMID capacitor (without de-rating) | 10 | μF | ||
| C SYS | SYS capacitor (without de-rating) | 20 | 500 | μF |
Thermal Information
| THERMAL METRIC (1) | BQ25628, BQ25629 RYK (QFN) 18 pins | UNIT | |
|---|---|---|---|
| R θJA | Junction-to-ambient thermal resistance | 60.1 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | 42.1 | °C/W |
| R θJB | Junction-to-board thermal resistance | 13 | °C/W |
| Ψ JT | Junction-to-top characterization parameter | 1.3 | °C/W |
| Ψ JB | Junction-to-board characterization parameter | 12.8 | °C/W |
Typical Application
A typical application consists of the device configured as an I 2 C controlled power path management device and a single cell battery charger for Li-Ion and Li-polymer batteries used in a wide range of smartphone and other portable devices. It integrates an input reverse-block FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and battery FET (BATFET Q4) between the system and battery. The device also integrates a bootstrap diode for the high-side gate drive.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| BQ25628 | Texas Instruments | WQFN-18 |
| BQ25628RYKR | Texas Instruments | 18-PowerWFQFN |
| BQ25628RYKR.A | Texas Instruments | — |
| BQ25629 | Texas Instruments | WQFN-18 (RYK) |
| BQ2562X | Texas Instruments | — |
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