BQ24195RGET
bq24195 I<sup>2</sup>C Controlled 2.5-A /4.5-A Single Cell USB/Adapter Charger with 5.1 V at 1 A /5.1 V at 2.1 A Synchronous Boost Operation
Overview
Part: bq24195, bq24195L
Type: I2C Controlled Single Cell USB/Adapter Charger with Synchronous Boost Operation and Power Path Management
Key Specs:
- Fast Charging Current: 2.5-A (bq24195L), 4.5-A (bq24195)
- Charge Efficiency: 92% at 2 A, 90
Features
-
High Efficiency Switch Mode Charger
- 2.5-A (bg24195L) or 4.5-A (bg24195) Fast Charging
- 92% Charge Efficiency at 2 A, 90% at 4 A
-
Synchronous Boost Converter in Battery Boost
- 5.1 V at 1 A (bq24195L) or 5.1 V at 2.1 A (bq24195)
- 94% 5.1-V Boost Efficiency at 1 A, 91% at 2.1 A
-
Highest Battery Discharge Efficiency with 12-mΩ Battery Discharge MOSFET up to 9-A Discharge Current
-
Single Input USB-compliant/Adapter Charger
- USB Host or Charging Port D+/D- Detection Compatible to USB Battery Charger Spec 1.2
- Input Voltage and Current Limit Supports USB2.0 and USB3.0
- Input Current Limit: 100 mA, 150 mA, 500 mA, 900 mA, 1.2 A, 1.5 A, 2 A and 3 A
-
3.9-V to 17-V Input Operating Voltage Range
- Support All Kinds of Adapter with Input Voltage DPM Regulation
-
Narrow VDC (NVDC) Power Path Management
- Instant-on Works with No Battery or Deeply Discharged Battery
- Ideal Diode Operation in Battery Supplement Mode
-
1.5-MHz Switching Frequency for Low Profile
-
Autonomous Battery Charging with or without Host Management
- Battery Charge Enable
- Battery Charge Preconditioning
- Charge Termination and Recharge
-
High Accuracy (0°C to 125°C)
- ±0.5% Charge Voltage Regulation
- ±7% Charge Current Regulation
- ±7.5% Input Current Regulation
- ±2% Output Regulation in Boost Mode
-
High Integration
- Power Path Management
- Synchronous Switching MOSFETs
-
Integrated Current Sensing
-
Bootstrap Diode
-
Internal Loop Compensation
-
Safety
- Battery Temperature Sensing and Charging Safety Timer
- Thermal Regulation and Thermal Shutdown
- Input System Over-Voltage Protection
- MOSFET Over-Current Protection
-
Charge Status Outputs for LED or Host Processor
-
Low Battery Leakage Current and Support Shipping Mode
-
4.00 mm x 4.00 mm QFN-24 Package
Applications
- Power Bank for Smartphone, Tablet
- Tablet PC and Smart Phone
- Portable Audio Speaker
- Portable Media Players
- Internet Devices
Pin Configuration
Pin Functions
- NAME
- VBUS
- D+
- D-
- STAT
- SCL
- SDA
- INT
- OTG
- CE
- ILIM
- TS1
- TS2
- BAT
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Copyright © 2012–2014, Texas Instruments Incorporated
Pin Functions (continued)
| PI | N | TVDE | PERCENTION |
|---|---|---|---|
| NAME | NUMBER | TYPE | DESCRIPTION |
| SYS | SYS 15,16 P min | System connection point. The internal BATFET is connected between BAT and SYS. When the battery falls below the minimum system voltage, switch-mode converter keeps SYS above the minimum system voltage. (Refer to Application Information Section for inductor and capacitor selection.) | |
| PGND | 17,18 | P | Power ground connection for high-current power converter node. Internally, PGND is connected to the source of the n-channel LSFET. On PCB layout, connect directly to ground connection of input and output capacitors of the charger. A single point connection is recommended between power PGND and the analog GND near the IC PGND pin. |
| SW | SW 19,20 O Analog | Switching node connecting to output inductor. Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET. Connect the 0.047-μF bootstrap capacitor from SW to BTST. | |
| BTST | 21 | P | PWM high side driver positive supply. Internally, the BTST is connected to the anode of the boost-strap diode. Connect the 0.047-μF bootstrap capacitor from SW to BTST. |
| REGN | 22 | P | PWM low side driver positive supply output. Internally, REGN is connected to the cathode of the boost-strap diode. Connect a 4.7-μF (10-V rating) ceramic capacitor from REGN to analog GND. The capacitor should be placed close to the IC. REGN also serves as bias rail of TS1 and TS2 pins. |
| PMID | 23 | P | Battery Boost Mode Output Voltage. Connected to the drain of the reverse blocking MOSFET and the drain of HSFET. The minimum capacitance required on PMID to PGND is 20 μF (bq24195L) or 60 μF (bq24195) |
| Thermal Pad | _ | P | Exposed pad beneath the IC for heat dissipation. Always solder thermal pad to the board, and have vias on the thermal pad plane star-connecting to PGND and ground plane for high-current power converter. |
Electrical Characteristics
VVBUSUVLOZ < VVBUS < VACOV and VVBUS > VBAT + VSLEEP , TJ = -40°C to 125°C and TJ = 25°C for typical values unless other noted.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| QUIESCENT ( | CURRENTS | |||||
| V VBUS < V UVLO , VBAT = 4.2 V, leakage between BAT and VBUS | 5 | μΑ | ||||
| I BAT | Battery discharge current (BAT, SW, SYS) | High-Z Mode, or no VBUS, BATFET disabled (REG07[5] = 1), -40°C to 85°C | 12 | 20 | μΑ | |
| High-Z Mode, or no VBUS, REG07[5] = 0, -40°C to 85°C | 32 | 55 | μΑ | |||
| V VBUS = 5 V, High-Z mode | 15 | 30 | μΑ | |||
| V VBUS = 17 V, High-Z mode | 30 | 50 | μA | |||
| I VBUS | Input supply current (VBUS) | VVBUS > VUVLO , VVBUS > VBAT , converter not switching | 1.5 | 3 | mA | |
| ·VBUS | VVBUS > VUVLO , VVBUS > VBAT , converter switching, VBAT = 3.2 V , ISYS = 0 A | 4 | mA | |||
| VVBUS > VUVLO , VVBUS > VBAT , converter switching, VBAT = 3.8 V , ISYS = 0 A | 15 | mA | ||||
| I BOOST | Battery discharge current in boost mode | VBAT = 4.2 V, Boost mode, I PMID = 0 A, converter switching | 15 | mA | ||
| VBUS/BAT PO | OWER UP | |||||
| VVBUSOP | VBUS operating range | 3.9 | 17 | V | ||
| VVBUSUVLOZ | VBUS for active I 2 C, no battery | V VBUS rising | 3.6 | V | ||
| V SLEEP | Sleep mode falling threshold | V VBUS falling, V VBUS-VBAT | 35 | 80 | 120 | mV |
| V SLEEPZ | Sleep mode rising threshold | V VBUS rising, V VBUS-VBAT | 170 | 250 | 350 | mV |
| V ACOV | VBUS over-voltage rising threshold | V VBUS rising | 17.4 | 18 | V | |
| V ACOV_HYST | VBUS over-voltage falling hysteresis | V VBUS falling | 700 | mV | ||
| VBATUVLOZ | Battery for active I 2 C, no VBUS | V BAT rising | 2.3 | V | ||
| VBATDPL | Battery depletion threshold | V BAT falling | 2.4 | 2.6 | V |
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Copyright © 2012–2014, Texas Instruments Incorporated
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VBUS | -2 | 22 | V | |
| PMID | -0.3 | 22 | V | |
| STAT, | -0.3 | 20 | V | |
| BTST | -0.3 | 26 | V | |
| Voltage range (with respect to GND) | SW | -2 | 20 | V |
| respect to GND) | BTST -0.3 26 V SW -2 20 V BAT, SYS (converter not switching) -0.3 6 V SDA, SCL, INT, OTG, ILIM, REGN, TS1, TS2, CE, D+, D0.3 7 V BTST TO SW -0.3 -7 V | V | ||
| VBUS -2 22 PMID -0.3 22 STAT, -0.3 20 BTST -0.3 26 SW -2 20 BAT, SYS (converter not switching) -0.3 6 SDA, SCL, INT, OTG, ILIM, REGN, TS1, TS2, CE, D+, D- -0.3 7 | 7 | V | ||
| V | ||||
| PGND to GND | -2 22 V | V | ||
| Output sink current | INT, STAT | 6 | mA | |
| Junction temperature | –40°C | 150 | °C | |
| Storage temperature, T stg | -65 | 150 | °C |
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted.
7.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) | 1000 | |||
| V (ESD) | Electrostatic discharge | Charged device model (CDM), per JEDEC specification JESD22-C101 (2) | 250 | V |
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
| more operating communities | |
|---|---|
| V IN | Input voltage |
(1) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BTST or SW pins. A tight layout minimizes switching noise.
Product Folder Links: bq24195 bq24195L
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Recommended Operating Conditions
| more operating communities | |
|---|---|
| V IN | Input voltage |
(1) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BTST or SW pins. A tight layout minimizes switching noise.
Product Folder Links: bq24195 bq24195L
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Thermal Information
| THERMAL METRIC(1) | bq24195 | |
|---|---|---|
| THERMAL METRIC (1) | RGE (24 PIN) | |
| Rθ JA | Junction-to-ambient thermal resistance | 32.2 |
| Rθ JCtop | Junction-to-case (top) thermal resistance | 29.8 |
| Rθ JB | Junction-to-board thermal resistance | 9.1 |
| PsiJT | Junction-to-top characterization parameter | 0.3 |
| ΨЈB | Junction-to-board characterization parameter | 9.1 |
| Rθ JCbot | Junction-to-case (bottom) thermal resistance | 2.2 |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| BQ24195 | — | — |
| BQ24195/L | — | — |
| BQ24195L | — | — |
| BQ24195LRGER | VQFN-24-EP(4x4) | |
| BQ24195LRGER.A | — | — |
| BQ24195LRGET | — | — |
| BQ24195LRGET.A | — | — |
| BQ24195RGER | — | — |
| BQ24195RGER.A | — | — |
| BQ24195RGET.A | — | — |
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