AVRDA
MicrocontrollerThe AVRDA is a microcontroller from Microchip Technology. View the full AVRDA datasheet below including key specifications, absolute maximum ratings.
Manufacturer
Microchip Technology
Category
Microcontroller
Key Specifications
| Parameter | Value |
|---|---|
| Connectivity | I2C, SPI, UART/USART |
| Core Processor | AVR |
| Core Size | 8-Bit |
| Data Converters | A/D 18x12b; D/A 1x10b |
| DigiKey Programmable | Not Verified |
| EEPROM Size | 512 x 8 |
| Mounting Type | Surface Mount |
| Number of I/O | 41 |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Oscillator Type | Internal |
| Package / Case | 48-TQFP |
| Peripherals | Brown-out Detect/Reset, POR, PWM, WDT |
| Flash Memory Size | 128KB (128K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 16K x 8 B |
| Clock Speed | 24MHz |
| Supplier Device Package | 48-TQFP (7x7) |
| Supply Voltage | 1.8V ~ 5.5V |
Overview
Part: AVR128DA48-I/PT — Microchip Technology
Type: AVR Microcontroller
Description: 32-bit AVR CPU microcontroller running at up to 24 MHz, with 128 KB Flash, 16 KB SRAM, and 512B EEPROM, featuring an Event System, intelligent analog peripherals, and a Peripheral Touch Controller.
Operating Conditions:
- Supply voltage: 1.8V to 5.5V
- Operating temperature: -40°C to +85°C
- Max CPU frequency: 24 MHz
Key Specs:
- Flash Memory: 128 KB
- SRAM: 16 KB
- EEPROM: 512B
- Max CPU Frequency: 24 MHz
- USARTs: 5
- SPIs: 2
- TWI/I2C: 2
- ADC: 12-bit differential, 18 channels
- DAC: 10-bit, 1 output
- I/O Pins: 41
Features:
- AVR® CPU with hardware multiplier and two-level interrupt controller
- Event System for CPU independent and predictable inter-peripheral signaling
- Peripheral Touch Controller (PTC) with self-capacitance and mutual capacitance channels
- Multiple sleep modes: Idle, Standby, Power-Down
- Single-pin Unified Program and Debug Interface (UPDI)
- Configurable Custom Logic (CCL) with up to six programmable Look-up Tables (LUT)
Package:
- 48-pin VQFN 6x6 mm
- 48-pin TQFP 7x7 mm
Features
-
AVR ® CPU
-
-Running at up to 24 MHz
-
-Single-cycle I/O access
-
-Two-level interrupt controller
-
-Two-cycle hardware multiplier
-
-Supply voltage range: 1.8V to 5.5V
-
Memories
-
-128 KB In-System self-programmable Flash memory
-
-512B EEPROM
-
-16 KB SRAM
-
-32B of user row in nonvolatile memory that can keep data during chip-erase and be programmed while the device is locked
-
-Write/erase endurance
-
Flash 10,000 cycles
-
EEPROM 100,000 cycles
-
-Data retention: 40 years at 55°C
-
System
-
-Power-on Reset (POR) circuit
-
-Brown-out Detector (BOD)
-
-Clock options
-
High-Precision internal high-frequency Oscillator with selectable frequency up to 24 MHz (OSCHF)
-
-Auto-tuning for improved internal oscillator accuracy
-
Internal PLL up to 48 MHz for high-frequency operation of Timer/Counter type D (PLL)
-
32.768 kHz Ultra-Low Power internal oscillator (OSC32K)
-
32.768 kHz external crystal oscillator (XOSC32K)
-
External clock input
-
-Single-pin Unified Program and Debug Interface (UPDI)
-
-Three sleep modes
-
Idle with all peripherals running for immediate wake-up
-
Standby with a configurable operation of selected peripherals
-
Power-Down with full data retention
-
Peripherals
-
-Up to two 16-bit Timer/Counter type A (TCA) with a dedicated period register and three PWM channels
-
-Up to five 16-bit Timer/Counter type B (TCB) with input capture and simple PWM functionality
-
-One 12-bit Timer/Counter type D (TCD) optimized for power control
-
-One 16-bit Real-Time Counter (RTC) running from an external crystal or internal oscillator
-
-Up to six USART with fractional baud rate generator, auto-baud, and start-of-frame detection
-
-Two host/client Serial Peripheral Interface (SPI)
-
-Up to two Two-Wire Interface (TWI) with dual address match
-
Independent host and client operation (Dual mode)
-
Philips I 2 C compatible
-
Standard mode (Sm, 100 kHz)
-
Fast mode (Fm, 400 kHz)
-
Fast mode plus (Fm+, 1 MHz) (1)
-
-Event System for CPU independent and predictable inter-peripheral signaling
-
-Configurable Custom Logic (CCL) with up to six programmable Look-up Tables (LUT)
-
-One 12-bit differential 130 ksps Analog-to-Digital Converter (ADC)
-
-Three Analog Comparators (ACs) with window compare functions
-
-One 10-bit Digital-to-Analog Converter (DAC)
-
-Up to three Zero-Cross Detectors (ZCD)
-
-Multiple voltage references (VREF)
-
1.024V
-
2.048V
-
2.500V
-
4.096V
-
-Peripheral Touch Controller (PTC) with Driven Shield+ and Boost Mode technologies for capacitive touch buttons, sliders, wheels and 2D surface
-
Up to 46 self-capacitance and 529 mutual capacitance channels
-
-Automated Cyclic Redundancy Check (CRC) Flash memory scan
-
-Watchdog Timer (WDT) with Window mode, with a separate on-chip oscillator
-
-External interrupt on all general purpose pins
-
I/O and Packages:
-
-Up to 55 programmable I/O pins
-
-28-pin SPDIP, SSOP and SOIC
-
-32-pin VQFN 5x5 mm and TQFP 7x7 mm
-
-48-pin VQFN 6x6 mm and TQFP 7x7 mm
-
-64-pin VQFN 9x9 mm and TQFP 10x10 mm
-
Temperature Ranges:
-
-Industrial: -40°C to +85°C
-
-Extended: -40°C to +125°C
- I 2 C Fm+ is only supported for V DD above 2.7V.
Pin Configuration
This bit field controls the pin configuration of the Reset pin.
| Value | Name | Description |
|---|---|---|
| 0x0 | INPUT | PF6 configured as general input pin. |
| 0x1 | - | Reserved |
| 0x2 | RESET | External Reset enabled on PF6 |
| 0x3 | - | Reserved |
Absolute Maximum Ratings
Stresses beyond those listed in this section can cause permanent damage to the device. This is a stress rating only. Functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 37-1. Absolute Maximum Ratings
| Parameter | Condition | Rating | Unit |
|---|---|---|---|
| Ambient temperature under bias | Ambient temperature under bias | -40 to +125 | °C |
| Storage temperature | Storage temperature | -65 to +150 | °C |
| Voltage on pins with respect to GND | Voltage on pins with respect to GND | Voltage on pins with respect to GND | Voltage on pins with respect to GND |
| On the V DD pin | -0.3 to +6.5 | V | |
| On the RESET pin | -0.3 to (V DD + 0.3) | V | |
| On all other pins | -0.3 to (V DD + 0.3) | V | |
| Maximum current | Maximum current | Maximum current | Maximum current |
| On the GND pin (1) | -40°C ≤ T A ≤ +85°C | 350 | mA |
| On the GND pin (1) | +85°C < T A ≤ +125°C | 120 | mA |
| On the V DD pin (1) | -40°C ≤ T A ≤ +85°C | 350 | mA |
| On the V DD pin (1) | +85°C < T A ≤ +125°C | 120 | mA |
| On any standard I/O pin | ±50 | mA | |
| Clamp current, I K (V PIN < 0 or V PIN > V DD ) | Clamp current, I K (V PIN < 0 or V PIN > V DD ) | ±20 | mA |
| Total power dissipation (2) | Total power dissipation (2) | 800 | mW |
- The maximum current rating requires even load distribution across I/O pins. The maximum current rating may be limited by the device package power dissipation characterizations. See 37.9 Thermal Specifications to calculate device specifications.
- Power dissipation is calculated as follows: P DIS = VDD x {I DD - Σ I OH} + Σ {(V DD - V OH) x I OH} + Σ (VOI x IOL)
Thermal Information
Table 37-9. Thermal Specifications
| Symbol | Description | Typ. | Unit | Conditions |
|---|---|---|---|---|
| θ JA | Thermal Resistance Junction to Ambient | 60 | °C/W | 28-pin PDIP package (SP) |
| θ JA | Thermal Resistance Junction to Ambient | 47 | °C/W | 28-pin SOIC package (SO) |
| θ JA | Thermal Resistance Junction to Ambient | 67.1 | °C/W | 28-pin SSOP package (SS) |
| θ JA | Thermal Resistance Junction to Ambient | 36.1 | °C/W | 32-pin VQFN package (RXB) |
| θ JA | Thermal Resistance Junction to Ambient | 58.8 | °C/W | 32-pin TQFP package (PT) |
| θ JA | Thermal Resistance Junction to Ambient | 33.7 | °C/W | 48-pin VQFN package (6LX) |
| θ JA | Thermal Resistance Junction to Ambient | 55.6 | °C/W | 48-pin TQFP package (PT) |
| θ JA | Thermal Resistance Junction to Ambient | 30.2 | °C/W | 64-pin VQFN package (MR) |
| θ JA | Thermal Resistance Junction to Ambient | 38.7 | °C/W | 64-pin TQFP package (PT) |
| T JMAX | Maximum Junction Temperature | 150 | °C |
Package Information
For the most recent package drawings:
- Go to www.microchip.com/packaging.
- Go to the package type-specific page, for example, VQFN.
- Search for either Drawing Number or Style to find the most recent package drawings.
Table 40-1. Drawing Numbers
| Pin Count | Package Type | Drawing Number | Style |
|---|---|---|---|
| 28 | SPDIP | C04-00070 | SP |
| 28 | SOIC | C04-00052 | SO |
| 28 | SSOP | C04-00073 | SS |
| 32 | VQFN | C04-21395 | RXB |
| 32 | VQFN (1) | C04-21511 | QZB |
| 32 | TQFP | C04-00074 | PT |
| 48 | VQFN | C04-00494 | 6LX |
| 48 | VQFN (1) | C04-00504 | 6MX |
| 48 | TQFP | C04-00300 | PT |
| 64 | VQFN | C04-00149 | MR |
| 64 | VQFN (1) | C04-00483 | 5LX |
| 64 | TQFP | C04-00085 | PT |
- This package type has wettable flanks and will only be available for automotive (VAO) ordering codes.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| AVR128DA48-I/PT | Microchip Technology | 48-TQFP |
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