ATTINY1614/1616/1617

tinyAVR® 1-series

Overview

Part: ATtiny1614/1616/1617 (members of tinyAVR® 1-series)

Type: Microcontroller

Key Specs:

  • CPU Speed: Up to 20 MHz
  • Flash Memory: 16 KB
  • SRAM: 2 KB
  • EEPROM: 256 bytes
  • Flash Endurance: 10,000 cycles
  • EEPROM Endurance: 100,000 cycles
  • Data Retention: 40 years at 55°C
  • I/O Lines: Up to 22
  • Operating Temperature: -40°C to 105°C, -40°C to 125°C

Features:

  • AVR® CPU with hardware multiplier
  • Single-cycle I/O access
  • Two-level interrupt controller
  • In-system self-programmable Flash memory
  • Power-on Reset (POR) and Brown-out Detector (BOD)
  • Multiple clock options: 16/20 MHz internal RC, 32.768 kHz Ultra Low-Power (ULP) internal RC, 32.768 kHz external crystal, external clock input
  • Single-pin Unified Program and Debug Interface (UPDI)
  • Three sleep modes: Idle, Standby, Power-Down
  • One 16-bit Timer/Counter type A (TCA) with three compare channels
  • Two 16-bit Timer/Counter type B (TCB) with input capture
  • One 12-bit Timer/Counter type D (TCD) optimized for control applications
  • One 16-bit Real-Time Counter (RTC)
  • Watchdog Timer (WDT) with Window mode
  • One USART with fractional baud rate generator, auto-baud, and start-of-frame detection
  • One master/slave Serial Peripheral Interface (SPI)
  • One Two-Wire Interface (TWI) with dual address match (Philips I2C compatible: Standard mode, Fast mode, Fast mode plus)
  • Three Analog Comparators (AC) with low propagation delay
  • Two 10-bit 115 ksps Analog-to-Digital Converters (ADCs)
  • Three 8-bit Digital-to-Analog Converters (DACs) with one external channel
  • Multiple voltage references (0.55V, 1.1V, 1.5V, 2.5V, 4.3V)
  • Event System (EVSYS) for CPU independent and predictable inter-peripheral signaling
  • Configurable Custom Logic (CCL) with two programmable look-up tables
  • Automated CRC memory scan
  • Peripheral Touch Controller (PTC) supporting capacitive touch buttons, sliders, wheels, 2D surfaces, wake-up on touch, Driven Shield+
  • External interrupt on all general purpose pins

Applications:

  • null

Package:

  • 14-pin SOIC150
  • 20-pin SOIC300
  • 20-pin VQFN 3x3 mm
  • 24-pin VQFN 4x4 mm

Features

  • CPU

    • AVR® CPU
    • Running at up to 20 MHz
    • Single-cycle I/O access
    • Two-level interrupt controller
    • Two-cycle hardware multiplier

  • Memories

    • 16 KB In-system self-programmable Flash memory
    • 256 bytes EEPROM
    • 2 KB SRAM
    • Write/erase endurance:
      • Flash 10,000 cycles
      • EEPROM 100,000 cycles
    • Data retention:
      • 40 years at 55°C

  • System

    • Power-on Reset (POR)
    • Brown-out Detector (BOD)
    • Clock options:
      • 16/20 MHz low-power internal RC oscillator
      • 32.768 kHz Ultra Low-Power (ULP) internal RC oscillator
      • 32.768 kHz external crystal oscillator
      • External clock input
    • Single-pin Unified Program and Debug Interface (UPDI)
    • Three sleep modes:

  • Idle with all peripherals running for immediate wake-up

  • Standby

    • Configurable operation of selected peripherals

  • Power-Down with full data retention

  • Peripherals

    • One 16-bit Timer/Counter type A (TCA) with a dedicated period register and three compare channels
    • Two 16-bit Timer/Counter type B (TCB) with input capture
    • One 12-bit Timer/Counter type D (TCD) optimized for control applications
    • One 16-bit Real-Time Counter (RTC) running from an external crystal, external clock, or internal RC oscillator
    • Watchdog Timer (WDT) with Window mode, with a separate on-chip oscillator
    • One USART with fractional baud rate generator, auto-baud, and start-of-frame detection
    • One master/slave Serial Peripheral Interface (SPI)
    • One Two-Wire Interface (TWI) with dual address match
      • Philips I2C compatible
      • Standard mode (Sm, 100 kHz)
      • Fast mode (Fm, 400 kHz)
      • Fast mode plus (Fm+, 1 MHz)
    • Three Analog Comparators (AC) with a low propagation delay
    • Two 10-bit 115 ksps Analog-to-Digital Converters (ADCs)
    • Three 8-bit Digital-to-Analog Converters (DACs) with one external channel
    • Multiple voltage references (VREF):
      • 0.55V
      • 1.1V
      • 1.5V
      • 2.5V
      • 4.3V
    • Event System (EVSYS) for CPU independent and predictable inter-peripheral signaling
    • Configurable Custom Logic (CCL) with two programmable look-up tables
    • Automated CRC memory scan
    • Peripheral Touch Controller (PTC)
      • Capacitive touch buttons, sliders, wheels and 2D surfaces
      • Wake-up on touch
      • Driven shield for improved moisture and noise handling performance
      • Up to 14 self-capacitance channels
      • Up to 49 mutual capacitance channels
    • External interrupt on all general purpose pins

  • I/O and Packages:

    • Up to 22 programmable I/O lines
    • 14-pin SOIC150
    • 20-pin SOIC300
    • 20-pin VQFN 3x3 mm
    • 24-pin VQFN 4x4 mm

  • Temperature Ranges:

    • -40°C to 105°C
    • -40°C to 125°C

  • Speed Grades:

    • 0-5 MHz @ 1.8V 5.5V
    • 0-10 MHz @ 2.7V 5.5V
    • 0-20 MHz @ 4.5V 5.5V

  • Introduction1

  • Features 1

    1. Silicon Errata and Data Sheet Clarification Document10
    1. tinyAVR® 1-series Overview11

  • 2.1. Configuration Summary11

    1. Block Diagram13
    1. Pinout14

  • 4.1. 14-Pin SOIC 14

  • 4.2. 20-Pin SOIC 15

  • 4.3. 20-Pin VQFN16

  • 4.4. 24-Pin VQFN17

    1. I/O Multiplexing and Considerations 18

  • 5.1. Multiplexed Signals 18

    1. Memories 19

  • 6.1. Overview 19

  • 6.2. Memory Map 20

  • 6.3. In-System Reprogrammable Flash Program Memory20

  • 6.4. SRAM Data Memory 21

  • 6.5. EEPROM Data Memory 21

  • 6.6. User Row21

  • 6.7. Signature Bytes21

  • 6.8. I/O Memory22

  • 6.9. Memory Section Access from CPU and UPDI on Locked Device24

  • 6.10. Configuration and User Fuses (FUSE)25

    1. Peripherals and Architecture44

  • 7.1. Peripheral Address Map44

  • 7.2. Interrupt Vector Mapping45

  • 7.3. System Configuration (SYSCFG)46

    1. AVR® CPU 49

  • 8.1. Features 49

  • 8.2. Overview 49

  • 8.3. Architecture 49

  • 8.4. Arithmetic Logic Unit (ALU)51

  • 8.5. Functional Description51

  • 8.6. Register Summary56

  • 8.7. Register Description56

    1. NVMCTRL - Nonvolatile Memory Controller 60

  • 9.1. Features 60

  • 9.2. Overview 60

  • 9.3. Functional Description61

  • 9.4. Register Summary66

  • 9.5. Register Description66

    1. CLKCTRL - Clock Controller 74

  • 10.1. Features 74

  • 10.2. Overview 74

  • 10.3. Functional Description76

  • 10.4. Register Summary80

  • 10.5. Register Description80

    1. SLPCTRL - Sleep Controller 90

  • 11.1. Features 90

  • 11.2. Overview 90

  • 11.3. Functional Description90

  • 11.4. Register Summary93

  • 11.5. Register Description93

    1. RSTCTRL - Reset Controller 95

  • 12.1. Features 95

  • 12.2. Overview 95

  • 12.3. Functional Description96

  • 12.4. Register Summary100

  • 12.5. Register Description100

    1. CPUINT - CPU Interrupt Controller 103

  • 13.1. Features 103

  • 13.2. Overview 103

  • 13.3. Functional Description104

  • 13.4. Register Summary 109

  • 13.5. Register Description109

    1. EVSYS - Event System 114

  • 14.1. Features 114

  • 14.2. Overview114

  • 14.3. Functional Description116

  • 14.4. Register Summary118

  • 14.5. Register Description 118

    1. PORTMUX - Port Multiplexer 125

  • 15.1. Overview 125

  • 15.2. Register Summary126

  • 15.3. Register Description126

    1. PORT - I/O Pin Configuration131

  • 16.1. Features 131

  • 16.2. Overview 131

  • 16.3. Functional Description133

  • 16.5.
    Register Description - PORTx 136

  • 16.6.
    Register Summary - VPORTx 148

  • 16.7.
    Register Description - VPORTx148

    1. BOD - Brown-out Detector 153

  • 17.1.
    Features 153

  • 17.2.
    Overview 153

  • 17.3.
    Functional Description154

  • 17.4.
    Register Summary156

  • 17.5.
    Register Description156

    1. VREF - Voltage Reference163

  • 18.1.
    Features 163

  • 18.2.
    Overview 163

  • 18.3.
    Functional Description163

  • 18.4.
    Register Summary 164

  • 18.5.
    Register Description164

    1. WDT - Watchdog Timer169

  • 19.1.
    Features 169

  • 19.2.
    Overview 169

  • 19.3.
    Functional Description170

  • 19.4.
    Register Summary - WDT 173

  • 19.5.
    Register Description173

    1. TCA - 16-bit Timer/Counter Type A176

  • 20.1.
    Features 176

  • 20.2.
    Overview 176

  • 20.3.
    Functional Description179

  • 20.4.
    Register Summary - Normal Mode188

  • 20.5.
    Register Description - Normal Mode 188

  • 20.6.
    Register Summary - Split Mode 207
    20.7.
    Register Description - Split Mode207

    1. TCB - 16-bit Timer/Counter Type B223

  • 21.1.
    Features 223

  • 21.2.
    Overview 223

  • 21.3.
    Functional Description225

  • 21.4.
    Register Summary233
    21.5.
    Register Description233

    1. TCD - 12-Bit Timer/Counter Type D244

  • 22.1.
    Features 244

  • 22.2.
    Overview 244

  • 22.3.
    Functional Description246

  • 22.4.
    Register Summary269

  • 22.5.
    Register Description269

  • 23.1.
    Features 294

  • 23.2.
    Overview 294

  • 23.3.
    Clocks295

  • 23.4.
    RTC Functional Description 295

  • 23.5.
    PIT Functional Description 296

  • 23.6.
    Events 297

  • 23.7.
    Interrupts 298

  • 23.8.
    Sleep Mode Operation 299

  • 23.9.
    Synchronization299

  • 23.10. Debug Operation299

  • 23.11. Register Summary300

  • 23.12. Register Description300

    1. USART - Universal Synchronous and Asynchronous Receiver and Transmitter316

  • 24.1.
    Features 316

  • 24.2.
    Overview 316

  • 24.3.
    Functional Description317

  • 24.4.
    Register Summary332

  • 24.5.
    Register Description332

    1. SPI - Serial Peripheral Interface348

  • 25.1.
    Features 348

  • 25.2.
    Overview 348

  • 25.3.
    Functional Description349

  • 25.4.
    Register Summary356

  • 25.5.
    Register Description356

    1. TWI - Two-Wire Interface 363

  • 26.1.
    Features 363

  • 26.2.
    Overview 363

  • 26.3.
    Functional Description364

  • 26.4.
    Register Summary375

  • 26.5.
    Register Description375

    1. CRCSCAN - Cyclic Redundancy Check Memory Scan 392

  • 27.1.
    Features 392

  • 27.2.
    Overview 392

  • 27.3.
    Functional Description393

  • 27.4.
    Register Summary - CRCSCAN396

  • 27.5.
    Register Description396

    1. CCL - Configurable Custom Logic 400

  • 28.1.
    Features 400

  • 28.2.
    Overview 400

  • 28.3.
    Functional Description402

  • 28.4.
    Register Summary410

  • 28.5.
    Register Description410

    1. AC - Analog Comparator418

  • 29.1. Features 418

  • 29.2. Overview 418

  • 29.3. Functional Description420

  • 29.4. Register Summary422

  • 29.5. Register Description422

    1. ADC - Analog-to-Digital Converter 427

  • 30.1. Features 427

  • 30.2. Overview 427

  • 30.3. Functional Description430

  • 30.4. Register Summary - ADCn437

  • 30.5. Register Description437

    1. DAC - Digital-to-Analog Converter 455

  • 31.1. Features 455

  • 31.2. Overview 455

  • 31.3. Functional Description456

  • 31.4. Register Summary458

  • 31.5. Register Description458

    1. PTC - Peripheral Touch Controller 461

  • 32.1. Overview 461

  • 32.2. Features 461

  • 32.3. Block Diagram462

  • 32.4. Signal Description 462

  • 32.5. System Dependencies 463

  • 32.6. Functional Description464

    1. UPDI - Unified Program and Debug Interface465

  • 33.1. Features 465

  • 33.2. Overview 465

  • 33.3. Functional Description467

  • 33.4. Register Summary488

  • 33.5. Register Description488

    1. Instruction Set Summary499
    1. Conventions 500

  • 35.1. Numerical Notation500

  • 35.2. Memory Size and Type500

  • 35.3. Frequency and Time500

  • 35.4. Registers and Bits 501

  • 35.5. ADC Parameter Definitions 502

    1. Electrical Characteristics505

  • 36.1. Disclaimer505

  • 36.2. Absolute Maximum Ratings 505

  • 36.3. General Operating Ratings 506

  • 36.4. Power Consumption 507

  • 36.5. Wake-Up Time509

  • 36.6. Peripherals Power Consumption509

  • 36.7. BOD and POR Characteristics510

  • 36.8. External Reset Characteristics 511

  • 36.9. Oscillators and Clocks511

  • 36.10. I/O Pin Characteristics 513

  • 36.11. TCD514

  • 36.12. USART514

  • 36.13. SPI 515

  • 36.14. TWI516

  • 36.15. VREF519

  • 36.16. ADC520

  • 36.17. TEMPSENSE522

  • 36.18. DAC523

  • 36.19. AC 524

  • 36.20. PTC524

  • 36.21. UPDI Timing525

  • 36.22. Programming Time526

    1. Typical Characteristics 528

  • 37.1. Power Consumption528

  • 37.2. GPIO 535

  • 37.3. VREF Characteristics543

  • 37.4. BOD Characteristics545

  • 37.5. ADC Characteristics548

  • 37.6. TEMPSENSE Characteristics 558

  • 37.7. AC Characteristics558

  • 37.8. OSC20M Characteristics562

  • 37.9. OSCULP32K Characteristics 564

  • 37.10. TWI SDA Hold Timing 565

    1. Ordering Information 566

  • 38.1. Product Information566

  • 38.2. Product Identification System566

    1. Package Drawings 567

  • 39.1. Online Package Drawings567

  • 39.2. 14-Pin SOIC 568

  • 39.3. 20-Pin SOIC 572

  • 39.4. 20-Pin VQFN576

  • 39.5. 24-Pin VQFN580

  • 39.6. Thermal Considerations 583

    1. Errata 584

  • 40.1. Errata - ATtiny1614/1616/1617 584

    1. Data Sheet Revision History 585

  • 41.1.
    Rev. A - 05/2020585

  • 41.2. Appendix - Obsolete Revision History590

  • Product Change Notification Service595

  • Customer Support 595

  • Product Identification System596

  • Microchip Devices Code Protection Feature596

  • Legal Notice 596

  • Trademarks 596

  • Quality Management System 597

  • Worldwide Sales and Service598

Pin Configuration

ValueDescription
0x0GPIO
0x1UPDI
0x2RESET
OtherReserved

Related Variants

The following components are covered by the same datasheet.

Part NumberManufacturerPackage
ATtiny1614——
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