ATtiny1614

Part: ATtiny1614/1616/1617

Type: Microcontroller (MCU)

Description: AVR processor with hardware multiplier, running at up to 20 MHz, with 16 KB Flash, 2 KB of SRAM, and 256 bytes of EEPROM.

Operating Conditions:

• Supply voltage: 1.8–5.5V
• Operating temperature: -40 to 125 °C
• Max CPU frequency: 20 MHz

Key Specs:

• CPU: AVR CPU with hardware multiplier
• Flash memory: 16 KB In-system self-programmable
• SRAM: 2 KB
• EEPROM: 256 bytes
• Flash endurance: 10,000 cycles
• EEPROM endurance: 100,000 cycles
• ADC: Two 10-bit 115 ksps
• DAC: Three 8-bit
• I/O lines: Up to 22 programmable

Features:

• Event System
• Core Independent Peripherals (CIPs)
• Peripheral Touch Controller (PTC) with Driven Shield+ and Boost Mode
• Single-pin Unified Program and Debug Interface (UPDI)
• Three sleep modes: Idle, Standby, Power-Down
• Multiple voltage references: 0.55V, 1.1V, 1.5V, 2.5V, 4.3V
• Configurable Custom Logic (CCL)
• Automated CRC memory scan

Package:

• 14-pin SOIC150
• 20-pin SOIC300
• 20-pin VQFN 3x3 mm
• 24-pin VQFN 4x4 mm

• CPU
• -AVR ® CPU
• -Running at up to 20 MHz
• -Single-cycle I/O access
• -Two-level interrupt controller
• -Two-cycle hardware multiplier
• Memories
• -16 KB In-system self-programmable Flash memory
• -256 bytes EEPROM
• -2 KB SRAM
• -Write/erase endurance:
• Flash 10,000 cycles
• EEPROM 100,000 cycles
• -Data retention:
• 40 years at 55°C
• System
• -Power-on Reset (POR)
• -Brown-out Detector (BOD)
• -Clock options:
• 16/20 MHz low-power internal RC oscillator
• 32.768 kHz Ultra Low-Power (ULP) internal RC oscillator
• 32.768 kHz external crystal oscillator
• External clock input
• -Single-pin Unified Program and Debug Interface (UPDI)
• -Three sleep modes:

This bit field selects the Reset/UPDI pin configuration.

Note: When configuring the RESET pin as GPIO, there is a potential conflict between the GPIO actively driving the output, and a high-voltage UPDI enable sequence initiation. To avoid this, the GPIO output driver is disabled for 768 OSC32K cycles after a System Reset. Enable any interrupts for this pin only after this period.