AD9864BCPZ

The AD9864BCPZ is an electronic component from Analog Devices. View the full AD9864BCPZ datasheet below including key specifications, pinout, absolute maximum ratings.

Manufacturer

Analog Devices

Key Specifications

Parameter	Value
Contact Plating	Tin
Conversion Rate	375 ksps
Features	General Purpose IF Subsystem
Features	General Purpose
Features	General Purpose IF Subsystem
Frequency	300 MHz
Frequency	10MHz ~ 300MHz
Height	950 µm
Interface	SPI
Length	7 mm
Lifecycle Status	Production (Last Updated: 3 years ago)
Manufacturer Lifecycle Status	PRODUCTION (Last Updated: 3 years ago)
Max Operating Temperature	85 °C
Max Supply Voltage	3.6 V
Min Operating Temperature	-40 °C
Min Supply Voltage	2.7 V
Nominal Supply Current	17 mA
Number of A/D Converters	1
Number of Channels	1
Number of Pins	48
Operating Supply Voltage	3.3 V
Package / Case	48-VFQFN Exposed Pad, CSP
Packaging	Bulk
Radiation Hardening	No
REACH SVHC	No
Resolution	3 B
RF Type	Cellular, EDGE, GSM, TETRA, UHF
RF Type	Cellular, EDGE, GSM, TETRA, UHF
RoHS	Compliant
Sampling Rate	18 Msps
Schedule B	8542390000, 8542390000\|8542390000, 8542390000\|8542390000\|8542390000, 8542390000\|8542390000\|8542390000\|8542390000
Supplier Device Package	48-LFCSP-VQ (7x7)
Supplier Device Package	48-LFCSP-VQ (7x7)
Width	7 mm

Overview

The AD9864 1 is a general-purpose IF subsystem that digitizes a low level, 10 MHz to 300 MHz IF input with a signal bandwidth ranging from 6.8 kHz to 270 kHz. The signal chain of the AD9864 consists of a low noise amplifier (LNA), a mixer, a band-pass Σ-∆ analog-to-digital converter (ADC), and a decimation filter with programmable decimation factor. An automatic gain control (AGC) circuit gives the AD9864 12 dB of continuous gain adjustment. Auxiliary blocks include both clock and local oscillator (LO) synthesizers.

The high dynamic range of the AD9864 and inherent antialiasing provided by the band-pass Σ-∆ converter allow the device to cope with blocking signals up to 95 dB stronger than the desired signal. This attribute often reduces the cost of a radio by reducing IF filtering requirements. Also, it enables multimode radios of varying channel bandwidths, allowing the IF filter to be specified for the largest channel bandwidth.

The SPI port programs numerous parameters of the AD9864, allowing the device to be optimized for any given application. Programmable parameters include synthesizer divide ratios, AGC attenuation and attack/decay time, received signal strength level, decimation factor, output data format, 16 dB attenuator, and the selected bias currents.

The AD9864 is available in a 48-lead LFCSP package and operates from a single 2.7 V to 3.6 V supply. The total power consumption is typically 56 mW and a power-down mode is provided via serial interfacing.

Features

10 MHz to 300 MHz input frequency 6.8 kHz to 270 kHz output signal bandwidth 7.5 dB single sideband noise figure (SSB NF) -7.0 dBm input third-order intercept (IIP3) AGC free range up to -34 dBm 12 dB continuous AGC range 16 dB front -end attenuator Baseband I/Q 16-bit (or 24-bit) serial digital output LO and sampling clock synthesizers Programmable decimation factor, output format, AGC, and synthesizer settings 370 Ω input impedance 2.7 V to 3.6 V supply voltage Low current consumption: 17 mA 48-lead LFCSP package

Applications

Multimode narrow-band radio products Analog/digital UHF/VHF FDMA receivers TETRA, APCO25, GSM/EDGE Portable and mobile radio products SATCOM terminals

1 Protected by U.S. Patent No. 5,969,657; other patents pending.

Pin Configuration

Pin	Name	Type	Description
1	MXOP	-	Mixer Output, Positive.
2	MXON	-	Mixer Output, Negative.
3	GNDF	-	Ground for Front End of ADC.
4	IF2N	-	Second IF Input (to ADC), Negative.
5	IF2P	-	Second IF Input (to ADC), Positive.
6	VDDF	-	Positive Supply for Front End of ADC.
7	GCP	-	Filter Capacitor for ADC Full-Scale Control.
8	GCN	-	Full-Scale Control Ground.
9	VDDA	-	Positive Supply for ADC Back End.
10	GNDA	-	Ground for ADC Back End.
11	VREFP	-	Voltage Reference, Positive.
12	VREFN	-	Voltage Reference, Negative.
13	RREF	-	Reference Resistor: Requires 100 kΩ to GNDA.
14	VDDQ	-	Positive Supply for Clock Synthesizer.
15	IOUTC	-	Clock Synth Charge Pump Out Current.
16	GNDQ	-	Ground for Clock Synthesizer Charge Pump.
17	VDDC	-	Positive Supply for Clock Synthesizer.
18	GNDC	-	Ground for Clock Synthesizer.
19	CLKP	-	Sampling Clock Input/Clock VCOTank, Positive.
20	CLKN	-	Sampling Clock Input/Clock VCOTank, Negative.
21	GNDS	-	Substrate Ground.
22	GNDD	-	Ground for Digital Functions.
23	PC	-	Clock Input for SPI Port.
24	PD	-	Data I/O for SPI Port.
25	PE	-	Enable Input for SPI Port.
26	VDDD	-	Positive Supply for Internal Digital.
27	VDDH	-	Positive Supply for Digital Interface.
28	CLKOUT	-	Clock Output for SSI Port.
29	DOUTA	-	Data Output for SSI Port.
30	DOUTB	-	Data Output for SSI Port (Inverted) or SPI Port.
31	FS	-	Frame Sync for SSI Port.
32	GNDH	-	Ground for Digital Interface.
33	SYNCB	-	Resets SSI and Decimator Counters; Active Low. Connect toVDDH if unused.
34	GNDS	-	Substrate Ground.
35	FREF	-	Reference Frequency Input for Both Synthesizers.
36	GNDL	-	Ground for LO Synthesizer.
37	GNDP	-	Ground for LO Synthesizer Charge Pump.
38	IOUTL	-	LO Synthesizer Charge Pump Out Current.
39	VDDP	-	Positive Supply for LO Synthesizer Charge Pump.
40	VDDL	-	Positive Supply for LO Synthesizer.
41	CXVM	-	External Filter Capacitor; DC Output of LNA.
42	LON	-	LO Input to Mixer and LO Synthesizer, Negative.
43	LOP	-	LO Input to Mixer and LO Synthesizer, Positive.
44	CXVL	-	External Bypass Capacitor for LNA Power Supply.
45	GNDI	-	Ground for Mixer and LNA.
46	CXIF	-	External Capacitor for Mixer V-I Converter Bias.
47	IFIN	-	First IF Input (to LNA).
48	VDDI EPAD	-	Positive Supply for LNA and Mixer. Exposed Pad. The backside paddle contact is not connected to ground. A PCB ground pad is optional.

Absolute Maximum Ratings

Table 3. AD9864 Absolute Maximum Ratings

Parameter	WithRespectTo	Rating
VDDF,VDDA,VDDC, VDDD,VDDH,VDDL, VDDI	GNDF,GNDA,GNDC, GNDD,GNDH,GNDL, GNDI,GNDS	-0.3 to +4.0
VDDF,VDDA,VDDC, VDDD,VDDH,VDDL, VDDI	VDDR, VDDA, VDDC, VDDD,VDDH,VDDL, VDDI	-4.0Vto+4.0V
VDDP,VDDQ	GNDP,GNDQ	-0.3Vto+6.0V
GNDF,GNDA,GNDC, GNDD,GNDH,GNDL, GNDI,GNDQ,GNDP, GNDS	GNDF,GNDA,GNDC, GNDD,GNDH,GNDL, GNDI,GNDQ,GNDP, GNDS	-0.3Vto+0.3V
MXOP,MXON,LOP,LON, IFIN,CXIF,CXVL,CXVM	GNDH	-0.3Vto VDDI+0.3V
PC, PD, PE, CLKOUT, DOUTA,DOUTB,FS, SYNCB	GNDH	-0.3Vto VDDH+0.3V
IF2N,IF2P,GCP,GCN	GNDF	-0.3Vto VDDF+0.3V
VFEFP,VREGN,RREF	GNDA	-0.3Vto VDDA+0.3V
IOUTC	GNDQ	-0.3Vto VDDQ+0.3V
IOUTL	GNDP	-0.3Vto VDDP+0.3V
CLKP,CLKN	GNDC	-0.3Vto VDDC+0.3V
FREF	GNDL	-0.3Vto VDDL+0.3V
MaximumJunction Temperature		150°C
Storage Temperature		-65°C to+150°C
MaximumLead Temperature		300°C

Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.

Thermal Information

θ JA is specified for the worst-case conditions, that is, θ JA is specified for device soldered in circuit board for surface-mount packages.

Related Variants

The following components are covered by the same datasheet.

Part Number	Manufacturer	Package
AD9864	Analog Devices
AD9864-EBZ	Analog Devices Inc.

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