AD9864BCPZ
IF Digitizing SubsystemThe AD9864BCPZ is a if digitizing subsystem from Analog Devices. View the full AD9864BCPZ datasheet below including key specifications, absolute maximum ratings.
AD9864BCPZ shares its datasheet with AD9864, whose page lists every part number it covers.
Official AD9864BCPZ datasheet (PDF) — the source this page was extracted from.
AD9864BCPZ Key Specifications
| Parameter | Value |
|---|---|
| Contact Plating | Tin |
| Conversion Rate | 375 ksps |
| Features | General Purpose IF Subsystem |
| Features | General Purpose |
| Frequency | 10MHz ~ 300MHz |
| Frequency | 300 MHz |
| Height | 950 µm |
| Interface | SPI |
| Length | 7 mm |
| Lifecycle Status | Production (Last Updated: 3 years ago) |
| Manufacturer Lifecycle Status | PRODUCTION (Last Updated: 3 years ago) |
| Max Operating Temperature | 85 °C |
| Max Supply Voltage | 3.6 V |
| Min Operating Temperature | -40 °C |
| Min Supply Voltage | 2.7 V |
| Nominal Supply Current | 17 mA |
| Number of A/D Converters | 1 |
| Number of Channels | 1 |
| Number of Pins | 48 |
| Operating Supply Voltage | 3.3 V |
| Package / Case | 48-VFQFN Exposed Pad, CSP |
| Packaging | Bulk |
| Radiation Hardening | No |
| REACH SVHC | No |
| Resolution | 3 B |
| RF Type | Cellular, EDGE, GSM, TETRA, UHF |
| RoHS | Compliant |
| Sampling Rate | 18 Msps |
| Schedule B | 8542390000, 8542390000|8542390000, 8542390000|8542390000|8542390000, 8542390000|8542390000|8542390000|8542390000 |
| Supplier Device Package | 48-LFCSP-VQ (7x7) |
| Width | 7 mm |
AD9864BCPZ Overview
Part: AD9864BCPZ — Analog Devices
Type: IF Digitizing Subsystem (band-pass Σ-Δ ADC receiver)
Description: 10–300 MHz IF input, 6.8–270 kHz output bandwidth IF digitizing subsystem with LNA, mixer, band-pass Σ-Δ ADC, decimation filter, 7.5 dB typical SSB noise figure and 17 mA typical operating current from a 2.7–3.6 V supply.
Operating Conditions:
- Supply voltage: 2.7–3.6 V (analog and digital); charge pump supplies VDDP/VDDQ 2.7–5.5 V; interface supply VDDH 1.8–3.6 V
- Operating temperature: -40 to +85 °C
- ADC clock frequency: 13–26 MHz; decimation factor 48–960
Absolute Maximum Ratings:
- Max supply voltage: 4.0 V (VDDF, VDDA, VDDC, VDDD, VDDH, VDDL, VDDI vs. ground); 6.0 V for VDDP, VDDQ
- Max junction temperature: 150 °C
- Storage temperature: -65 to +150 °C
- Max lead temperature: 300 °C
Key Specs:
- SSB noise figure: 7.5 dB typ, 9.5 dB max (minimum VGA attenuation); 13 dB typ at maximum attenuation
- Input IP3: -7.0 dBm typ (-12 dBm min)
- Dynamic range with AGC enabled: 95 dB typ (91 dB min)
- IF input clip point: -31 dBm typ at minimum VGA attenuation; -19 dBm typ at maximum attenuation
- LNA input impedance: 370 Ω || 1.4 pF
- AGC gain range: 12 dB; programmable gain step 16 dB
- Total current: 17 mA typ in operation; 0.01 mA typ in standby
- ADC alias attenuation: 80 dB min; decimator alias attenuation 88 min
- SPI clock: 10 MHz max
- Thermal resistance θJA: 29.5 °C/W (48-lead LFCSP)
Features:
- 10 MHz to 300 MHz input frequency
- 6.8 kHz to 270 kHz output signal bandwidth
- AGC free range up to -34 dBm; 12 dB continuous AGC range
- 16 dB front-end attenuator
- Baseband I/Q 16-bit (or 24-bit) serial digital output
- LO and sampling clock synthesizers
- Programmable decimation factor, output format, AGC and synthesizer settings via SPI
- Power-down mode via serial interface
Applications:
- Multimode narrow-band radio products
- Analog/digital UHF/VHF FDMA receivers
- TETRA, APCO25, GSM/EDGE
- Portable and mobile radio products
- SATCOM terminals
Package:
- 48-lead LFCSP
AD9864BCPZ Features
10 MHz to 300 MHz input frequency 6.8 kHz to 270 kHz output signal bandwidth 7.5 dB single sideband noise figure (SSB NF) -7.0 dBm input third-order intercept (IIP3) AGC free range up to -34 dBm 12 dB continuous AGC range 16 dB front -end attenuator Baseband I/Q 16-bit (or 24-bit) serial digital output LO and sampling clock synthesizers Programmable decimation factor, output format, AGC, and synthesizer settings 370 Ω input impedance 2.7 V to 3.6 V supply voltage Low current consumption: 17 mA 48-lead LFCSP package
AD9864BCPZ Applications
Multimode narrow-band radio products Analog/digital UHF/VHF FDMA receivers TETRA, APCO25, GSM/EDGE Portable and mobile radio products SATCOM terminals
1 Protected by U.S. Patent No. 5,969,657; other patents pending.
AD9864BCPZ Pin Configuration
04319-0-002
Figure 2. 48-Lead LFCSP Pin Configuration
Figure 2. 48-Lead LFCSP Pin Configuration
Table 5. 48-Lead Lead Frame Chip Scale Package (LFCSP) Pin Function Descriptions
| Pin No. | Mnemonic | Description |
|---|---|---|
| 1 | MXOP | Mixer Output, Positive. |
| 2 | MXON | Mixer Output, Negative. |
| 3 | GNDF | Ground for Front End of ADC. |
| 4 | IF2N | Second IF Input (to ADC), Negative. |
| 5 | IF2P | Second IF Input (to ADC), Positive. |
| 6 | VDDF | Positive Supply for Front End of ADC. |
| 7 | GCP | Filter Capacitor for ADC Full-Scale Control. |
| 8 | GCN | Full-Scale Control Ground. |
| 9 | VDDA | Positive Supply for ADC Back End. |
| 10 | GNDA | Ground for ADC Back End. |
| 11 | VREFP | Voltage Reference, Positive. |
| 12 | VREFN | Voltage Reference, Negative. |
| 13 | RREF | Reference Resistor: Requires 100 kΩ to GNDA. |
| 14 | VDDQ | Positive Supply for Clock Synthesizer. |
| 15 | IOUTC | Clock Synth Charge Pump Out Current. |
| 16 | GNDQ | Ground for Clock Synthesizer Charge Pump. |
| 17 | VDDC | Positive Supply for Clock Synthesizer. |
| 18 | GNDC | Ground for Clock Synthesizer. |
| 19 | CLKP | Sampling Clock Input/Clock VCOTank, Positive. |
| 20 | CLKN | Sampling Clock Input/Clock VCOTank, Negative. |
| 21 | GNDS | Substrate Ground. |
| 22 | GNDD | Ground for Digital Functions. |
| 23 | PC | Clock Input for SPI Port. |
| 24 | PD | Data I/O for SPI Port. |
| 25 | PE | Enable Input for SPI Port. |
| 26 | VDDD | Positive Supply for Internal Digital. |
| 27 | VDDH | Positive Supply for Digital Interface. |
| 28 | CLKOUT | Clock Output for SSI Port. |
| 29 | DOUTA | Data Output for SSI Port. |
| 30 | DOUTB | Data Output for SSI Port (Inverted) or SPI Port. |
| 31 | FS | Frame Sync for SSI Port. |
| Pin No. | Mnemonic | Description |
|---|---|---|
| 32 | GNDH | Ground for Digital Interface. |
| 33 | SYNCB | Resets SSI and Decimator Counters; Active Low. Connect toVDDH if unused. |
| 34 | GNDS | Substrate Ground. |
| 35 | FREF | Reference Frequency Input for Both Synthesizers. |
| 36 | GNDL | Ground for LO Synthesizer. |
| 37 | GNDP | Ground for LO Synthesizer Charge Pump. |
| 38 | IOUTL | LO Synthesizer Charge Pump Out Current. |
| 39 | VDDP | Positive Supply for LO Synthesizer Charge Pump. |
| 40 | VDDL | Positive Supply for LO Synthesizer. |
| 41 | CXVM | External Filter Capacitor; DC Output of LNA. |
| 42 | LON | LO Input to Mixer and LO Synthesizer, Negative. |
| 43 | LOP | LO Input to Mixer and LO Synthesizer, Positive. |
| 44 | CXVL | External Bypass Capacitor for LNA Power Supply. |
| 45 | GNDI | Ground for Mixer and LNA. |
| 46 | CXIF | External Capacitor for Mixer V-I Converter Bias. |
| 47 | IFIN | First IF Input (to LNA). |
| 48 | VDDI EPAD | Positive Supply for LNA and Mixer. Exposed Pad. The backside paddle contact is not connected to ground. A PCB ground pad is optional. |
AD9864BCPZ Absolute Maximum Ratings
Table 3. AD9864 Absolute Maximum Ratings Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
| Parameter | WithRespectTo | Rating |
|---|---|---|
| VDDF,VDDA,VDDC, VDDD,VDDH,VDDL, VDDI | GNDF,GNDA,GNDC, GNDD,GNDH,GNDL, GNDI,GNDS | -0.3 to +4.0 |
| VDDF,VDDA,VDDC, VDDD,VDDH,VDDL, VDDI | VDDR, VDDA, VDDC, VDDD,VDDH,VDDL, VDDI | -4.0Vto+4.0V |
| VDDP,VDDQ | GNDP,GNDQ | -0.3Vto+6.0V |
| GNDF,GNDA,GNDC, GNDD,GNDH,GNDL, GNDI,GNDQ,GNDP, GNDS | GNDF,GNDA,GNDC, GNDD,GNDH,GNDL, GNDI,GNDQ,GNDP, GNDS | -0.3Vto+0.3V |
| MXOP,MXON,LOP,LON, IFIN,CXIF,CXVL,CXVM | GNDH | -0.3Vto VDDI+0.3V |
| PC, PD, PE, CLKOUT, DOUTA,DOUTB,FS, SYNCB | GNDH | -0.3Vto VDDH+0.3V |
| IF2N,IF2P,GCP,GCN | GNDF | -0.3Vto VDDF+0.3V |
| VFEFP,VREGN,RREF | GNDA | -0.3Vto VDDA+0.3V |
| IOUTC | GNDQ | -0.3Vto VDDQ+0.3V |
| IOUTL | GNDP | -0.3Vto VDDP+0.3V |
| CLKP,CLKN | GNDC | -0.3Vto VDDC+0.3V |
| FREF | GNDL | -0.3Vto VDDL+0.3V |
| MaximumJunction Temperature | 150°C | |
| Storage Temperature | -65°C to+150°C | |
| MaximumLead Temperature | 300°C |
AD9864BCPZ Thermal Information
θ JA is specified for the worst-case conditions, that is, θ JA is specified for device soldered in circuit board for surface-mount packages.
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| AD9864 | Analog Devices | LFCSP-48 7x7mm |
| AD9864-EBZ | Analog Devices |
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