A4988SETTR-T
Microstepping Motor DriverThe A4988SETTR-T is a microstepping motor driver from Not specified in provided text. View the full A4988SETTR-T datasheet below including key specifications, pinout, electrical characteristics, absolute maximum ratings.
Manufacturer
Not specified in provided text
Category
Microstepping Motor Driver
Package
28-contact QFN with exposed thermal pad
Key Specifications
| Parameter | Value |
|---|---|
| Output Current | ±2A |
| Microstep Modes | Full, 1/2, 1/4, 1/8, 1/16 |
| Package Dimensions | 5mm x 5mm x 0.90mm |
| Communication Interface | Step/Direction, Microstep Select (MSx) |
| Output On Resistance Typ | 320 mΩ |
| Load Supply Voltage Range | 8V to 35V |
| Logic Supply Voltage Range | 3V to 5.5V |
| Operating Temperature Range | -20°C to 85°C |
| Sleep Mode Current Consumption | 10 µA (max) |
Overview
Part: A4988SETTR-T
Type: Microstepping Motor Driver
Description: A complete microstepping motor driver with built-in translator for easy operation, designed to operate bipolar stepper motors in full-, half-, quarter-, eighth-, and sixteenth-step modes, with an output drive capacity of up to 35 V and ±2 A.
Operating Conditions:
- Supply voltage: 8–35 V (Load), 3–5.5 V (Logic)
- Operating temperature: -20 to 85 °C
- Microstep modes: Full, 1/2, 1/4, 1/8, 1/16
Absolute Maximum Ratings:
- Max supply voltage: 35 V
- Max continuous current: ±2 A
- Max junction/storage temperature: 150 °C
Key Specs:
- Load Supply Voltage Range: 8–35 V
- Logic Supply Voltage Range: 3–5.5 V
- Output On-Resistance (Source/Sink): Typ 320 mΩ, Max 430 mΩ (at I OUT = ±1.5 A)
- Motor Supply Current (Operating, outputs disabled): Max 2 mA
- Logic Supply Current (Sleep Mode): Max 10 μA
- Overcurrent Protection Threshold: 2.1 A
- Thermal Shutdown Temperature: Typ 165 °C
- Fixed Off-Time: Typ 30 μs
Features:
- Low Rds(on) outputs
- Automatic current decay mode detection/selection
- Mixed and slow current decay modes
- Synchronous rectification for low power dissipation
- Internal UVLO
- Crossover-current protection
- 3.3 and 5 V compatible logic supply
- Thermal shutdown circuitry
- Short-to-ground protection
- Shorted load protection
- Five selectable step modes: full, 1/2, 1/4, 1/8, and 1/16
Package:
- 28-contact QFN with exposed thermal pad 5 mm × 5 mm × 0.90 mm (ET package)
Features
- Low R ds(on) outputs
- Automatic current decay mode detection/selection
- Mixed and slow current decay modes
- Synchronous rectification for low power dissipation
- Internal UVLO
- Crossover-current protection
- 3.3 and 5 V compatible logic supply
- Thermal shutdown circuitry
- Short-to-ground protection
- Shorted load protection
- Five selectable step modes: full, 1 / 2 , 1 / 4 , 1 / 8 , and 1 / 16
Pin Configuration
A4988SETTR-T Pinout
Package: 28-contact QFN (ET) with exposed thermal pad
| Pin Number | Pin Name | Type | Description |
|---|---|---|---|
| 1 | OUT2B | O | DMOS Full Bridge 2 Output B |
| 2 | GND | P | Ground |
| 3 | GND | P | Ground (internally fused for thermal dissipation) |
| 4 | CP1 | P | Charge pump capacitor terminal |
| 5 | CP2 | P | Charge pump capacitor terminal |
| 6 | VCP | P | Reservoir capacitor terminal |
| 7 | GND | P | Ground |
| 8 | VREG | P | Regulator decoupling terminal |
| 9 | MS1 | I | Microstep select logic input (100 kΩ pull-down) |
| 10 | MS2 | I | Microstep select logic input (50 kΩ pull-down) |
| 11 | MS3 | I | Microstep select logic input (100 kΩ pull-down) |
| 12 | RESET | I | Reset logic input (active low) |
| 13 | ROSC | I | Timing set terminal (off-time configuration) |
| 14 | SLEEP | I | Sleep mode logic input (active low) |
| 15 | VDD | P | Logic supply voltage |
| 16 | STEP | I | Step logic input (rising edge triggered) |
| 17 | REF | I | Transconductance reference voltage input |
| 18 | GND | P | Ground (internally fused for thermal dissipation) |
| 19 | DIR | I | Direction logic input |
| 20 | GND | P | Ground |
| 21 | OUT1B | O | DMOS Full Bridge 1 Output B |
| 22 | VBB1 | P | Load supply voltage (Bridge 1) |
| 23 | SENSE1 | I | Current sense input for Bridge 1 |
| 24 | OUT1A | O | DMOS Full Bridge 1 Output A |
| 25 | GND | P | Ground |
| 26 | OUT2A | O | DMOS Full Bridge 2 Output A |
| 27 | SENSE2 | I | Current sense input for Bridge 2 |
| 28 | VBB2 | P | Load supply voltage (Bridge 2) |
Notes
- Pins 3 and 18 are internally fused and provide enhanced thermal dissipation paths; solder directly to exposed PCB surface with thermal vias.
- Logic inputs (STEP, DIR, RESET, SLEEP, MS1–MS3, ROSC, REF) are 3.3 V and 5 V compatible.
- Output current rating: ±2 A per bridge.
- Load supply voltage range: 8–35 V (VBB1, VBB2).
- Logic supply voltage range: 3–5.5 V (VDD).
- Sense pins (SENSE1, SENSE2): Maximum voltage 0.5 V; connect directly to current-sense resistors with low-impedance ground paths.
- Charge pump capacitors: 0.1 µF ceramic (Class 2, ±15%) between CP1–CP2 and between VCP–VBB.
- VREG decoupling: 0.22 µF ceramic capacitor to ground.
Electrical Characteristics
| Characteristics | Symbol | Test Conditions | Min. | Typ. [2] | Max. | Units |
|---|---|---|---|---|---|---|
| OUTPUT DRIVERS | ||||||
| Load Supply Voltage Range | V BB | Operating | 8 | - | 35 | V |
| During Sleep Mode | 0 | - | 35 | V | ||
| Logic Supply Voltage Range | V DD | Operating | 3 | - | 5.5 | V |
| Output On-Resistance | R ds(on) | Source driver, I OUT = -1.5 A | - | 320 | 430 | mΩ |
| Sink driver, I OUT = 1.5 A | - | 320 | 430 | mΩ | ||
| Body Diode Forward Voltage | V | Source diode, I F = -1.5 A | - | - | 1.2 | V |
| F | Sink diode, I F = 1.5 A | - | - | 1.2 | V | |
| Motor Supply Current | I BB | f PWM < 50 kHz | - | - | 4 | mA |
| Operating, outputs disabled | - | - | 2 | mA | ||
| Sleep Mode | - | - | 10 | μA | ||
| Logic Supply Current | I DD | f PWM < 50 kHz | - | - | 8 | mA |
| Logic Supply Current | Outputs off | - | - | 5 | mA | |
| Logic Supply Current | Sleep Mode | - | - | 10 | μA | |
| CONTROL LOGIC | ||||||
| Logic Input Voltage | V IN(1) | V DD × 0.7 | - | - | V | |
| V IN(0) | - | - | V DD × 0.3 | V | ||
| Logic Input Current | I IN(1) | V IN = V DD × 0.7 | -20 | <1.0 | 20 | μA |
| I IN(0) | V IN = V DD × 0.3 | -20 | <1.0 | 20 | μA | |
| R MS1 | MS1 pin | - | 100 | - | kΩ | |
| Microstep Select | R MS2 | MS2 pin | - | 50 | - | kΩ |
| R MS3 | MS3 pin | - | 100 | - | kΩ | |
| Logic Input Hysteresis | V HYS(IN) | As a %of V DD | 5 | 11 | 19 | % |
| Blank Time | t BLANK | 0.7 | 1 | 1.3 | μs | |
| Fixed Off-Time | OSC = VDD or GND | 20 | 30 | 40 | μs | |
| t OFF | R OSC = 25 kΩ | 23 | 30 | 37 | μs | |
| Reference Input Voltage Range | V REF | 0 | - | 4 | V | |
| Reference Input Current | I REF | -3 | 0 | 3 | μA | |
| Current Trip-Level Error [3] | V REF = 2 V, %I TripMAX = 38.27% | - | - | ±15 | % | |
| err I | V REF = 2 V, %I TripMAX = 70.71% | - | - | ±5 | % | |
| V REF = 2 V, %I TripMAX = 100.00% | - | - | ±5 | % | ||
| Crossover Dead Time | t DT | 100 | 475 | 800 | ns | |
| PROTECTION | ||||||
| Overcurrent Protection Threshold [4] | I OCPST | 2.1 | - | - | A | |
| Thermal Shutdown Temperature | T TSD | - | 165 | - | °C | |
| Thermal Shutdown Hysteresis | T TSDHYS | - | 15 | - | °C | |
| VDD Undervoltage Lockout | V DDUVLO | V DD rising | 2.7 | 2.8 | 2.9 | V |
| VDD Undervoltage Hysteresis | V DDUVLOHYS | - | 90 | - | mV |
Absolute Maximum Ratings
| Characteristic | Symbol | Rating | Units |
|---|---|---|---|
| Load Supply Voltage | V BB | 35 | V |
| Output Current | I OUT | ±2 | A |
| Logic Input Voltage | V IN | -0.3 to 5.5 | V |
| Logic Supply Voltage | V DD | -0.3 to 5.5 | V |
| Motor Outputs Voltage | -2.0 to 37 | V | |
| Sense Voltage | V SENSE | -0.5 to 0.5 | V |
| Reference Voltage | V REF | 5.5 | V |
| Operating Ambient Temperature | T A | -20 to 85 | °C |
| Maximum Junction | T J (max) | 150 | °C |
| Storage Temperature | T stg | -55 to 150 | °C |
The A4988 is supplied in a surface-mount QFN package (ET), 5 mm × 5 mm, with a nominal overall package height of 0.90 mm and an exposed pad for enhanced thermal dissipation. It is lead (Pb) free (suffix -T), with 100% matte-tin-plated leadframes.
Thermal Information
| Characteristic | Symbol | Test Conditions* | Value | Units |
|---|---|---|---|---|
| Package Thermal Resistance | R θJA | Four-layer PCB, based on JEDEC standard | 32 | °C/W |
Figure 1: Logic Interface Timing Diagram
| Time Duration | Symbol | Typ. | Unit |
|---|---|---|---|
| STEP minimum, HIGH pulse width | t A | 1 | μs |
| STEP minimum, LOW pulse width | t B | 1 | μs |
| Setup time, input change to STEP | t C | 200 | ns |
| Hold time, input change to STEP | t D | 200 | ns |
Table 1: Microstepping Resolution Truth Table
| MS1 | MS2 | MS3 | Microstep Resolution | Excitation Mode |
|---|---|---|---|---|
| L | L | L | Full Step | 2 Phase |
| H | L | L | Half Step | 1-2 Phase |
| L | H | L | Quarter Step | W1-2 Phase |
| H | H | L | Eighth Step | 2W1-2 Phase |
| H | H | H | Sixteenth Step | 4W1-2 Phase |
Table 1: Microstepping Resolution Truth Table
Typical Application
Ordering Information
| MPN | Package | Temperature Range | Packing |
|---|---|---|---|
| A4988SETTR-T | 28-contact QFN with exposed thermal pad | -20 to 85 °C | 1500 pieces per 7-in. reel |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| A4988 | Allegro MicroSystems | — |
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