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74HC4052D

Dual 4-channel analog multiplexer/demultiplexer

The 74HC4052D is a dual 4-channel analog multiplexer/demultiplexer from Toshiba. View the full 74HC4052D datasheet below including key specifications.

74HC4052D shares its datasheet with 74HC4052, whose page lists every part number it covers.

Official 74HC4052D datasheet (PDF) — the source this page was extracted from.

Manufacturer

Toshiba

Category

Dual 4-channel analog multiplexer/demultiplexer

Package

16-SOIC (0.154", 3.90mm Width)

Lifecycle

Active

74HC4052D Key Specifications

ParameterValue
Channel Capacitance (CS(off), CD(off))10pF
Channel-to-Channel Matching (ΔRon)4Ohm
Crosstalk-50dB @ 1MHz
Current - Leakage (IS(off)) (Max)1µA
Mounting TypeSurface Mount
Multiplexer/Demultiplexer Circuit4:1
Number of Circuits2
On-State Resistance (Max)130Ohm
Operating Temperature-40°C ~ 85°C (TA)
Package / Case16-SOIC (0.154", 3.90mm Width)
PackagingMouseReel
Standard Pack Qty2500
Supplier Device Package16-SOIC
Switch CircuitSP4T
Switch Time (Ton, Toff) (Max)34ns, 32ns
Voltage - Supply, Single (V+)2V ~ 6V

74HC4052D Overview

Part: 74HC4052D (also covers 74HCT4052 variants) — Nexperia

Type: Dual 4-channel analog multiplexer/demultiplexer (2x SP4T analog switch)

Description: Dual single-pole quad-throw analog switch with 2.0–10.0 V supply (74HC4052), analog signal range of -5 V to +5 V, and typical RON of 80 Ω at VCC − VEE = 4.5 V.

Operating Conditions:

  • Supply voltage VCC − GND: 2.0–10.0 V (74HC4052); 4.5–5.5 V (74HCT4052)
  • Supply voltage VCC − VEE: 2.0–10.0 V
  • Operating ambient temperature: -40 to +125 °C
  • Switch voltage: VEE to VCC; input voltage: GND to VCC

Absolute Maximum Ratings:

  • Max supply voltage VCC: +11.0 V (min -0.5 V)
  • Switch current ISW: ±25 mA
  • Supply current ICC: 50 mA; IEE: ±20 mA
  • Storage temperature: -65 to +150 °C
  • Total power dissipation: 500 mW

Key Specs:

  • RON(peak), Tamb -40 to +85 °C: typ 100 Ω / max 225 Ω at VCC = 4.5 V, VEE = 0 V, ISW = 1000 μA
  • RON(peak), VCC = 4.5 V, VEE = -4.5 V: typ 70 Ω, max 165 Ω (-40 to +85 °C)
  • RON(peak) max at -40 to +125 °C: 270 Ω (VCC = 4.5 V, VEE = 0 V)
  • ΔRON between channels: typ 9 Ω at VCC = 4.5 V, VEE = 0 V
  • 74HC4052 VIH min: 3.15 V at VCC = 4.5 V; VIL max: 1.35 V
  • 74HCT4052 VIH min 2.0 V; VIL max 0.8 V (VCC = 4.5–5.5 V)
  • Off-state leakage: ±1.0 μA per channel, ±2.0 μA all channels (VCC = 10 V)
  • Supply current ICC (74HC4052, VCC = 6.0 V): max 80 μA (-40 to +85 °C), 160 μA (to +125 °C)
  • Input capacitance: typ 3.5 pF; switch capacitance: 5 pF (nYn), 12 pF (nZ)

Features:

  • Wide analog input voltage range from -5 V to +5 V
  • Low ON resistance
  • Logic level translation: 5 V logic to ±5 V analog signals
  • Typical break-before-make built in
  • Input levels: CMOS (74HC4052), TTL (74HCT4052)
  • Input clamp diodes allow current-limiting resistors to interface to voltages above VCC
  • Complies with JEDEC standard no. 7A
  • ESD: HBM exceeds 2000 V, MM exceeds 200 V, CDM exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applications:

  • Analog multiplexing and demultiplexing
  • Digital multiplexing and demultiplexing
  • Signal gating

Package:

  • SO16 (SOT109-1), body width 3.9 mm
  • SSOP16 (SOT338-1), body width 5.3 mm
  • TSSOP16 (SOT403-1), body width 4.4 mm
  • DHVQFN16 (SOT763-1), 2.5 x 3.5 x 0.85 mm

74HC4052D Features

  • Wide analog input voltage range from -5 V to +5 V
  • Low ON resistance:
  • -80 Ω (typical) at VCC - VEE = 4.5 V
  • -70 Ω (typical) at VCC - VEE = 6.0 V
  • -60 Ω (typical) at VCC - VEE = 9.0 V
  • Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
  • Typical 'break before make' built-in
  • Complies with JEDEC standard no. 7A
  • Input levels:
  • -For 74HC4052: CMOS level
  • -For 74HCT4052: TTL level
  • ESD protection:
  • -HBM JESD22-A114F exceeds 2000 V
  • -MM JESD22-A115-A exceeds 200 V
  • -CDM JESD22-C101E exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

74HC4052D Applications

  • Analog multiplexing and demultiplexing
  • Digital multiplexing and demultiplexing
  • Signal gating

74HC4052D Pin Configuration

Table 2. Pin description

SymbolPinDescription
2Y0, 2Y1, 2Y2, 2Y31, 5, 2, 4independent input or output
1Z, 2Z13, 3common input or output
E6enable input (active LOW)
V EE7negative supply voltage
GND8ground (0 V)
S0, S110, 9select logic input
1Y0, 1Y1, 1Y2, 1Y312, 14, 15, 11independent input or output
V CC16positive supply voltage

Dual 4-channel analog multiplexer/demultiplexer

74HC4052D Recommended Operating Conditions

Table 5. Recommended operating conditions

SymbolParameterConditions74HC4052 - Min74HC4052 - Typ74HC4052 - Max74HCT4052 - Min74HCT4052 - Typ74HCT4052 - MaxUnit
V CCsupply voltagesee Figure 7 and Figure 8
V CC - GND2.05.010.04.55.05.5V
V CC - V EE2.05.010.02.05.010.0V
V Iinput voltageGND-V CCGND-V CCV
V SWswitch voltageV EE-V CCV EE-V CCV
T ambambient temperature-40+25+125-40+25+125°C
Δt/ΔVinput transition rise and fall rateV CC = 2.0 V--625---ns/V
V CC = 4.5 V-1.67139-1.67139ns/V
V CC = 6.0 V--83---ns/V
V CC = 10.0 V--31---ns/V

Figure 7. Guaranteed operating area as a function of the supply voltages for 74HC4052

Table 5. Recommended operating conditions

Figure 8. Guaranteed operating area as a function of the supply voltages for 74HCT4052

Figure 7. Guaranteed operating area as a function of the supply voltages for 74HC4052

74HC4052D Package Information

OUTLINE VERSIONREFERENCES - IECREFERENCES - JEDECREFERENCES - JEITAEUROPEAN PROJECTIONISSUE DATE
SOT109-1076E07MS-01299-12-27 03-02-19

© Nexperia B.V. 2017. All rights reserved.

Dual 4-channel analog multiplexer/demultiplexer

Dual 4-channel analog multiplexer/demultiplexer

UNITA max.A 1A 2A 3b pcD (1)E (1)eH ELL pQvwyZ (1)θ
mm20.21 0.051.80 1.650.250.38 0.250.20 0.096.4 6.05.4 5.20.657.9 7.61.251.03 0.630.9 0.70.20.130.11.00 0.558 0 o o
OUTLINE VERSIONREFERENCES - IECREFERENCES - JEDECREFERENCES - JEITAEUROPEAN PROJECTIONISSUE DATE
SOT338-1MO-15099-12-27 03-02-19

Figure 22. Package outline SOT338-1 (SSOP16)

Dual 4-channel analog multiplexer/demultiplexer

UNITA max.A 1A 2A 3b pcD (1)E (2)eH ELL pQvwy(1) Zθ
mm1.10.15 0.050.95 0.800.250.30 0.190.2 0.15.1 4.94.5 4.30.656.6 6.210.75 0.500.4 0.30.20.130.10.40 0.068 0 o o
OUTLINE VERSIONREFERENCES - IECREFERENCES - JEDECREFERENCES - JEITAEUROPEAN PROJECTIONISSUE DATE
SOT403-1MO-15399-12-27 03-02-18

Figure 23. Package outline SOT403-1 (TSSOP16)

Figure 24. Package outline SOT763-1 (DHVQFN16)

Dual 4-channel analog multiplexer/demultiplexer

Variants on the same datasheet

These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.

Part NumberManufacturerPackage
74HC4052Toshiba—
74HC4052BQToshiba—
74HC4052DBToshiba—
74HC4052NToshiba—
74HC4052PWToshiba—
74HCT4052BQToshiba—
74HCT4052DToshiba—
74HCT4052DBToshiba—
74HCT4052PWToshiba—

More datasheets

All Toshiba datasheets (34)

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