74HC4052
Dual 4-channel analog multiplexer/demultiplexerThe 74HC4052 is a dual 4-channel analog multiplexer/demultiplexer from Toshiba. View the full 74HC4052 datasheet below including key specifications.
Official 74HC4052 datasheet (PDF) — the source this page was extracted from.
Manufacturer
ToshibaCategory
Dual 4-channel analog multiplexer/demultiplexer
74HC4052 Key Specifications
| Parameter | Value |
|---|---|
| Channel Capacitance (CS(off), CD(off)) | 10pF |
| Channel-to-Channel Matching (ΔRon) | 4Ohm |
| Crosstalk | -50dB @ 1MHz |
| Current - Leakage (IS(off)) (Max) | 1µA |
| Mounting Type | Surface Mount |
| Multiplexer/Demultiplexer Circuit | 4:1 |
| Number of Circuits | 2 |
| On-State Resistance (Max) | 130Ohm |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Package / Case | 16-SOIC (0.154", 3.90mm Width) |
| Packaging | MouseReel |
| Standard Pack Qty | 2500 |
| Supplier Device Package | 16-SOIC |
| Switch Circuit | SP4T |
| Switch Time (Ton, Toff) (Max) | 34ns, 32ns |
| Voltage - Supply, Single (V+) | 2V ~ 6V |
74HC4052 Overview
Part: 74HC4052D (also covers 74HCT4052 variants) — Nexperia
Type: Dual 4-channel analog multiplexer/demultiplexer (2x SP4T analog switch)
Description: Dual single-pole quad-throw analog switch with 2.0–10.0 V supply (74HC4052), analog signal range of -5 V to +5 V, and typical RON of 80 Ω at VCC − VEE = 4.5 V.
Operating Conditions:
- Supply voltage VCC − GND: 2.0–10.0 V (74HC4052); 4.5–5.5 V (74HCT4052)
- Supply voltage VCC − VEE: 2.0–10.0 V
- Operating ambient temperature: -40 to +125 °C
- Switch voltage: VEE to VCC; input voltage: GND to VCC
Absolute Maximum Ratings:
- Max supply voltage VCC: +11.0 V (min -0.5 V)
- Switch current ISW: ±25 mA
- Supply current ICC: 50 mA; IEE: ±20 mA
- Storage temperature: -65 to +150 °C
- Total power dissipation: 500 mW
Key Specs:
- RON(peak), Tamb -40 to +85 °C: typ 100 Ω / max 225 Ω at VCC = 4.5 V, VEE = 0 V, ISW = 1000 μA
- RON(peak), VCC = 4.5 V, VEE = -4.5 V: typ 70 Ω, max 165 Ω (-40 to +85 °C)
- RON(peak) max at -40 to +125 °C: 270 Ω (VCC = 4.5 V, VEE = 0 V)
- ΔRON between channels: typ 9 Ω at VCC = 4.5 V, VEE = 0 V
- 74HC4052 VIH min: 3.15 V at VCC = 4.5 V; VIL max: 1.35 V
- 74HCT4052 VIH min 2.0 V; VIL max 0.8 V (VCC = 4.5–5.5 V)
- Off-state leakage: ±1.0 μA per channel, ±2.0 μA all channels (VCC = 10 V)
- Supply current ICC (74HC4052, VCC = 6.0 V): max 80 μA (-40 to +85 °C), 160 μA (to +125 °C)
- Input capacitance: typ 3.5 pF; switch capacitance: 5 pF (nYn), 12 pF (nZ)
Features:
- Wide analog input voltage range from -5 V to +5 V
- Low ON resistance
- Logic level translation: 5 V logic to ±5 V analog signals
- Typical break-before-make built in
- Input levels: CMOS (74HC4052), TTL (74HCT4052)
- Input clamp diodes allow current-limiting resistors to interface to voltages above VCC
- Complies with JEDEC standard no. 7A
- ESD: HBM exceeds 2000 V, MM exceeds 200 V, CDM exceeds 1000 V
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Applications:
- Analog multiplexing and demultiplexing
- Digital multiplexing and demultiplexing
- Signal gating
Package:
- SO16 (SOT109-1), body width 3.9 mm
- SSOP16 (SOT338-1), body width 5.3 mm
- TSSOP16 (SOT403-1), body width 4.4 mm
- DHVQFN16 (SOT763-1), 2.5 x 3.5 x 0.85 mm
74HC4052 Features
- Wide analog input voltage range from -5 V to +5 V
- Low ON resistance:
- -80 Ω (typical) at VCC - VEE = 4.5 V
- -70 Ω (typical) at VCC - VEE = 6.0 V
- -60 Ω (typical) at VCC - VEE = 9.0 V
- Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
- Typical 'break before make' built-in
- Complies with JEDEC standard no. 7A
- Input levels:
- -For 74HC4052: CMOS level
- -For 74HCT4052: TTL level
- ESD protection:
- -HBM JESD22-A114F exceeds 2000 V
- -MM JESD22-A115-A exceeds 200 V
- -CDM JESD22-C101E exceeds 1000 V
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
74HC4052 Applications
- Analog multiplexing and demultiplexing
- Digital multiplexing and demultiplexing
- Signal gating
74HC4052 Pin Configuration
Table 2. Pin description
| Symbol | Pin | Description |
|---|---|---|
| 2Y0, 2Y1, 2Y2, 2Y3 | 1, 5, 2, 4 | independent input or output |
| 1Z, 2Z | 13, 3 | common input or output |
| E | 6 | enable input (active LOW) |
| V EE | 7 | negative supply voltage |
| GND | 8 | ground (0 V) |
| S0, S1 | 10, 9 | select logic input |
| 1Y0, 1Y1, 1Y2, 1Y3 | 12, 14, 15, 11 | independent input or output |
| V CC | 16 | positive supply voltage |
Dual 4-channel analog multiplexer/demultiplexer
74HC4052 Recommended Operating Conditions
Table 5. Recommended operating conditions
| Symbol | Parameter | Conditions | 74HC4052 - Min | 74HC4052 - Typ | 74HC4052 - Max | 74HCT4052 - Min | 74HCT4052 - Typ | 74HCT4052 - Max | Unit |
|---|---|---|---|---|---|---|---|---|---|
| V CC | supply voltage | see Figure 7 and Figure 8 | |||||||
| V CC - GND | 2.0 | 5.0 | 10.0 | 4.5 | 5.0 | 5.5 | V | ||
| V CC - V EE | 2.0 | 5.0 | 10.0 | 2.0 | 5.0 | 10.0 | V | ||
| V I | input voltage | GND | - | V CC | GND | - | V CC | V | |
| V SW | switch voltage | V EE | - | V CC | V EE | - | V CC | V | |
| T amb | ambient temperature | -40 | +25 | +125 | -40 | +25 | +125 | °C | |
| Δt/ΔV | input transition rise and fall rate | V CC = 2.0 V | - | - | 625 | - | - | - | ns/V |
| V CC = 4.5 V | - | 1.67 | 139 | - | 1.67 | 139 | ns/V | ||
| V CC = 6.0 V | - | - | 83 | - | - | - | ns/V | ||
| V CC = 10.0 V | - | - | 31 | - | - | - | ns/V |
Figure 7. Guaranteed operating area as a function of the supply voltages for 74HC4052
Table 5. Recommended operating conditions
Figure 8. Guaranteed operating area as a function of the supply voltages for 74HCT4052
Figure 7. Guaranteed operating area as a function of the supply voltages for 74HC4052
74HC4052 Package Information
| OUTLINE VERSION | REFERENCES - IEC | REFERENCES - JEDEC | REFERENCES - JEITA | EUROPEAN PROJECTION | ISSUE DATE |
|---|---|---|---|---|---|
| SOT109-1 | 076E07 | MS-012 | 99-12-27 03-02-19 |
© Nexperia B.V. 2017. All rights reserved.
Dual 4-channel analog multiplexer/demultiplexer
Dual 4-channel analog multiplexer/demultiplexer
| UNIT | A max. | A 1 | A 2 | A 3 | b p | c | D (1) | E (1) | e | H E | L | L p | Q | v | w | y | Z (1) | θ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| mm | 2 | 0.21 0.05 | 1.80 1.65 | 0.25 | 0.38 0.25 | 0.20 0.09 | 6.4 6.0 | 5.4 5.2 | 0.65 | 7.9 7.6 | 1.25 | 1.03 0.63 | 0.9 0.7 | 0.2 | 0.13 | 0.1 | 1.00 0.55 | 8 0 o o |
| OUTLINE VERSION | REFERENCES - IEC | REFERENCES - JEDEC | REFERENCES - JEITA | EUROPEAN PROJECTION | ISSUE DATE |
|---|---|---|---|---|---|
| SOT338-1 | MO-150 | 99-12-27 03-02-19 |
Figure 22. Package outline SOT338-1 (SSOP16)
Dual 4-channel analog multiplexer/demultiplexer
| UNIT | A max. | A 1 | A 2 | A 3 | b p | c | D (1) | E (2) | e | H E | L | L p | Q | v | w | y | (1) Z | θ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| mm | 1.1 | 0.15 0.05 | 0.95 0.80 | 0.25 | 0.30 0.19 | 0.2 0.1 | 5.1 4.9 | 4.5 4.3 | 0.65 | 6.6 6.2 | 1 | 0.75 0.50 | 0.4 0.3 | 0.2 | 0.13 | 0.1 | 0.40 0.06 | 8 0 o o |
| OUTLINE VERSION | REFERENCES - IEC | REFERENCES - JEDEC | REFERENCES - JEITA | EUROPEAN PROJECTION | ISSUE DATE |
|---|---|---|---|---|---|
| SOT403-1 | MO-153 | 99-12-27 03-02-18 |
Figure 23. Package outline SOT403-1 (TSSOP16)
Figure 24. Package outline SOT763-1 (DHVQFN16)
Dual 4-channel analog multiplexer/demultiplexer
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| 74HC4052BQ | Toshiba | — |
| 74HC4052D | Toshiba | 16-SOIC (0.154", 3.90mm Width) |
| 74HC4052DB | Toshiba | — |
| 74HC4052N | Toshiba | — |
| 74HC4052PW | Toshiba | — |
| 74HCT4052BQ | Toshiba | — |
| 74HCT4052D | Toshiba | — |
| 74HCT4052DB | Toshiba | — |
| 74HCT4052PW | Toshiba | — |
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