W7500P
Serial to Ethernet ChipThe W7500P is a serial to ethernet chip from WIZnet. View the full W7500P datasheet below including key specifications, pinout, electrical characteristics, absolute maximum ratings.
Manufacturer
WIZnet
Category
Serial to Ethernet Chip
Package
64-LQFP
Lifecycle
Active
Key Specifications
| Parameter | Value |
|---|---|
| Connectivity | Ethernet/TCP/IP, I2C, SSP, UART/USART |
| Core Processor | ARM® Cortex®-M0 |
| Core Size | 32-Bit |
| Data Converters | A/D 9x12b |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| Mounting Type | Surface Mount |
| Number of I/O | 34 |
| Operating Temperature | 0°C ~ 70°C (TA) |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Package / Case | 64-LQFP |
| Peripherals | DMA, POR, PWM, WDT |
| Flash Memory Size | 128KB (32K x 32) |
| Program Memory Type | FLASH |
| RAM Size | 16K x 8 B |
| Clock Speed | 48MHz |
| Supplier Device Package | 64-TQFP (7x7) |
| Supplier Device Package | 64-TQFP (7x7) |
| Supplier Device Package | 64-TQFP (7x7) |
| Supply Voltage | 2.7V ~ 3.6V |
Overview
Part: W7500P
Type: Microcontroller (MCU)
Description: A microcontroller featuring an internal CPU clock frequency of up to 48 MHz and a TCPIPCore Offload Engine (TOE).
Operating Conditions:
- Supply voltage: 2.7–3.6 V
- Operating temperature: 0 to 70 °C
- Internal CPU clock frequency: 0 to 48 MHz
Absolute Maximum Ratings:
- Max supply voltage: 5.8 V
- Max continuous current: 100 mA (Total current into sum of all VDD power lines)
- Max junction/storage temperature: 150 °C
Key Specs:
- Standard operating voltage (VDD): 2.7 to 3.6 V
- Input voltage on IO pins (VIO): VSS -0.3 to 3.6 V
- Internal CPU clock frequency (fFCLK): 0 to 48 MHz
- Total current into sum of all VDD power lines (IVDD_SUM): 100 mA
- Maximum current into each VDD power pin (IVDD): 90 mA
- Total output current sunk by sum of all IOs and control pins (IIO_PAD): 75 mA
- Single pin input injected current (IINJ_PAD): ±10 mA
- Sum of all input injected current (IINJ_SUM): ±50 mA
Features:
- TCPIPCore Offload Engine (TOE)
- Flash memory
- Random number generator (RNG)
- Alternate Function Controller (AFC)
- External Interrupt (EXTI)
- General-purpose I/Os (GPIO)
- Direct memory access controller (DMA)
- Analog-to-digital converter (ADC)
- Pulse-Width Modulation (PWM)
- Dual timers
- Watchdog timer
- Inter-integrated circuit interface (I2C)
- UART
Features
Simple 24bit timer.
Clocked internally by the system clock or the system clock/2.
Pin Configuration
W7500P 64-LQFP Pinout
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | XTAL_OUT | O | Crystal oscillator output |
| 2 | PC_09 | I/O | Port C pin 9 |
| 3 | PC_10 | I/O | Port C pin 10 |
| 4 | PC_11 | I/O | Port C pin 11 |
| 5 | PC_12 | I/O | Port C pin 12 |
| 6 | PC_13 | I/O | Port C pin 13 |
| 7 | PC_14 | I/O | Port C pin 14 |
| 8 | PC_15 | I/O | Port C pin 15 |
| 9 | GND | P | Ground |
| 10 | VDD | P | Power supply |
| 11 | PC_06 | I/O | Port C pin 6 |
| 12 | TEST | I | Test pin |
| 13 | REGIN | I | Regulator input |
| 14 | LED_0 | I/O | LED output 0 |
| 15 | DUP/PB_06 | I/O | Dual-use pin / Port B pin 6 |
| 16 | GND | P | Ground |
| 17 | LED_3 | I/O | LED output 3 |
| 18 | VDD_0 | P | Power supply (analog) |
| 19 | PA_05 | I/O | Port A pin 5 |
| 20 | PA_06 | I/O | Port A pin 6 |
| 21 | PA_07 | I/O | Port A pin 7 |
| 22 | PA_08 | I/O | Port A pin 8 |
| 23 | PA_09 | I/O | Port A pin 9 |
| 24 | PA_10 | I/O | Port A pin 10 |
| 25 | VSS_0 | P | Ground (analog) |
| 26 | RSTN | I | Reset (active low) |
| 27 | PA_00 | I/O | Port A pin 0 |
| 28 | PA_01 | I/O | Port A pin 1 |
| 29 | PA_02 | I/O | Port A pin 2 |
| 30 | PA_03 | I/O | Port A pin 3 |
| 31 | PA_04 | I/O | Port A pin 4 |
| 32 | TEST1 | I | Test pin 1 |
| 33 | GND_1V | P | Ground (1.8V domain) |
| 34 | MDI_RN | I/O | MDI receive negative |
| 35 | MDI_RP | I/O | MDI receive positive |
| 36 | REG_OUT | O | Regulator output |
| 37 | MDI_TN | I/O | MDI transmit negative |
| 38 | MDI_TP | I/O | MDI transmit positive |
| 39 | GND | P | Ground |
| 40 | VDD | P | Power supply |
| 41 | PA_11 | I/O | Port A pin 11 |
| 42 | PA_12 | I/O | Port A pin 12 |
| 43 | PA_13 | I/O | Port A pin 13 |
| 44 | PA_14 | I/O | Port A pin 14 |
| 45 | PB_00 | I/O | Port B pin 0 |
| 46 | PB_01 | I/O | Port B pin 1 |
| 47 | PB_02 | I/O | Port B pin 2 |
| 48 | PB_03 | I/O | Port B pin 3 |
| 49 | GND | P | Ground |
| 50 | XI | I | Crystal oscillator input |
| 51 | XO | O | Crystal oscillator output |
| 52 | BOOT | I/O | Boot mode selection |
| 53 | PC_00 | I/O | Port C pin 0 |
| 54 | PC_01 | I/O | Port C pin 1 |
| 55 | PC_02 | I/O | Port C pin 2 |
| 56 | PC_03 | I/O | Port C pin 3 |
| 57 | PC_04 | I/O | Port C pin 4 |
| 58 | PC_05 | I/O | Port C pin 5 |
| 59 | GND | P | Ground |
| 60 | VDD | P | Power supply |
| 61 | XTAL_IN | I | Crystal oscillator input |
| 62 | GND | P | Ground |
| 63 | VDD | P | Power supply |
| 64 | PC_08 | I/O | Port C pin 8 |
Notes
- Power pins: VDD (pins 10, 40, 60, 63) and GND (pins 9, 16, 39, 49, 59, 62) are distributed around the package for low-impedance power distribution.
- Analog supply: VDD_0 (pin 18) and VSS_0 (pin 25) are dedicated analog power pins.
- 1.8V domain: GND_1V (pin 33) is ground for the 1.8V internal logic domain.
- Crystal oscillator: XTAL_IN/XTAL_OUT (pins 61/1) and XI/XO (pins 50/51) provide dual crystal interface options.
- Ethernet interface: MDI_TP/MDI_TN (pins 38/37) and MDI_RP/MDI_RN (pins 35/34) are the Ethernet MDI (Medium Dependent Interface) differential pairs.
- Reset: RSTN (pin 26) is active-low reset.
- LED outputs: LED_0 (pin 14) and LED_3 (pin 17) are dedicated LED control pins.
- Regulator: REGIN (pin 13) and REG_OUT (pin 36) support on-chip voltage regulation.
Electrical Characteristics
Table 24 shows the ADC electrical characteristics of W7500P
Table 24 ADC electrical characteristics
| Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| IN[15:0] | Analog input channel | V SS | - | VREFP | V | |
| VREFP | Reference voltage of REFP | V DD | V | |||
| RES | Resolution | 12 | Bits | |||
| Offset error | -3.0 | ± 1.5 | 3.0 | LSB | ||
| INL | Integral non-linearity error | -2.0 | ± 1.0 | 2.0 | LSB | |
| DNL | Differential non-linearity error | -1.0 | ± 0.8 | 1.5 | LSB | |
| Fclk | Clock frequency | 16 | MHz | |||
| SPS | Sampling rate | 30 | 500 | 1000 | K | |
| TS | Sampling time | 4/F clk | ||||
| TC | Conversion time | 12 | 1/F clk | |||
| SNDR | Signal-noise plus distortion ratio | At 10KHz | 64 | dB | ||
| THD | Total harmonic distortion | At 10Khz | -65 | dB | ||
| SFDR | Spurious-free dynamic range | At 10KHz | 64 | dB |
Table 24 ADC electrical characteristics
Absolute Maximum Ratings
These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Thermal Information
Table 15 shows the thermal characteristics of W7500P .
Table 15 Thermal Charateristics
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| T Storge | Storage temperature range | -55 | +150 | °C |
| T Junc | Maximum junction temperature under bias | -40 | +150 | °C |
Table 15 Thermal Charateristics
Get structured datasheet data via API
Get started free