Part: Microchip USB2514B

Type: USB Hub IC

Key Specs:

• Analog Supply Voltage (VDDA33): 3.3V regulated
• Digital I/O Supply Voltage (VDD33): 3.3V regulated
• USB Protection Capacitance Budget: 5 pF (for connector, PCB traces, protection circuitry)
• Upstream Port VBUS Capacitance: Max 10 μF
• VBUS_DET Voltage Range: 4.5V to 5.5V

Features:

• Includes all necessary USB terminations and resistors.
• Microchip PortSwap feature for USB2.0 differential pair polarity inversion (configurable via SMBus/I2C).
• Microchip PHYBoost configuration options for compensating negative effects of protection devices.
• Downstream ports can be disabled via hub configuration (I2C) or port disable strap option.
• VBUS_DET pin detects presence of USB host.

Applications:

• USB products requiring a hub

Package:

• null

USB2514B Pinout

Package Type: 48-pin QFN (Quad Flat No-Lead)

Pin	Name	Type	Description
1	USBDM_DN1	I/O	Downstream Port 1 USB D– (negative) signal
2	USBDP_DN1	I/O	Downstream Port 1 USB D+ (positive) signal
3	USBDM_DN2	I/O	Downstream Port 2 USB D– (negative) signal
4	USBDP_DN2	I/O	Downstream Port 2 USB D+ (positive) signal
5	VDDA33	P	Analog 3.3V supply
6	USBDM_DN3	I/O	Downstream Port 3 USB D– (negative) signal
7	USBDP_DN3	I/O	Downstream Port 3 USB D+ (positive) signal
8	USBDM_DN4	I/O	Downstream Port 4 USB D– (negative) signal
9	USBDP_DN4	I/O	Downstream Port 4 USB D+ (positive) signal
10	VDDA33	P	Analog 3.3V supply
11	GND	P	Ground
12	OCS_N1	I	Overcurrent sense input for Port 1 (active-low, internal pull-up)
13	PRTPWR1	O	Port 1 power control output (active-high)
14	GND	P	Ground
15	VDD33	P	Digital 3.3V supply
16	OCS_N2	I	Overcurrent sense input for Port 2 (active-low, internal pull-up)
17	PRTPWR2	O	Port 2 power control output (active-high)
18	GND	P	Ground
19	OCS_N3	I	Overcurrent sense input for Port 3 (active-low, internal pull-up)
20	PRTPWR3	O	Port 3 power control output (active-high)
21	GND	P	Ground
22	NON_REM0	I	Non-removable port configuration strap (requires external termination)
23	VDD33	P	Digital 3.3V supply
24	CFG_SEL0	I	Configuration mode select strap (requires external termination)
25	CFG_SEL1	I	Configuration mode select strap (requires external termination)
26	RESET_N	I	Active-low reset input
27	GND	P	Ground
28	NON_REM1	I	Non-removable port configuration strap (requires external termination)
29	VDDA33	P	Analog 3.3V supply
30	USBDM_UP	I/O	Upstream USB D– (negative) signal
31	USBDP_UP	I/O	Upstream USB D+ (positive) signal
32	XTALOUT	O	Crystal oscillator output (1.2V p-p, weak drive <1 mA)
33	XTALIN/CLKIN	I	Crystal oscillator input or external 24 MHz clock input
34	GND	P	Ground
35	RBIAS	I	Bias resistor connection (connect to GND through 12 kΩ ±1% resistor)
36	VDDA33	P	Analog 3.3V supply
37	GND	P	Ground
38	OCS_N4	I	Overcurrent sense input for Port 4 (active-low, internal pull-up)
39	PRTPWR4	O	Port 4 power control output (active-high)
40	GND	P	Ground
41	BC_EN1	I	Battery charging enable for Port 1 (strap option, requires external termination)
42	BC_EN2	I	Battery charging enable for Port 2 (strap option, requires external termination)
43	BC_EN3	I	Battery charging enable for Port 3 (strap option, requires external termination)
44	BC_EN4	I	Battery charging enable for Port 4 (strap option, requires external termination)
45	LOCAL_PWR	I	Local power control input (self-powered/bus-powered mode selection)
46	VBUS_DET	I	Upstream VBUS detection input
47	GND	P	Ground
48	ePAD (GND)	P	Exposed pad – Ground connection

Notes

• Power Supply Pins: VDDA33 (pins 5, 10, 29, 36) require 0.1 µF bypass capacitors placed close to each pin, plus 1.0 µF bulk capacitance shared across all VDDA33 pins. VDD33 (pins 15, 23) each require 0.1 µF bypass capacitors.
• Strap Configuration Pins: CFG_SEL[1:0], NON_REM[1:0], and BC_EN[4:1] have no internal terminations and must be externally terminated with either 100 kΩ pull-down resistors to GND or 10 kΩ pull-up resistors to VDD33.
• RBIAS Pin: Must connect to GND through a 12 kΩ ±1% resistor placed as close to the pin as possible with dedicated low-impedance path to ground plane.
• Crystal/Clock: XTALIN/CLKIN (pin 33) accepts either a 24.000 MHz ±350 ppm crystal or external clock. XTALOUT (pin 32) should be left unconnected if using external clock source.
• OCS_N Pins: Include internal pull-up resistors to 3.3V domain; no external pull-up required.
• USB Differential Pairs: All USB signal pins (USBDP/USBDM) include internal terminations and can connect directly to USB connectors. Polarity may be inverted via SMBus/I2C configuration (PortSwap feature).
• Exposed Pad (ePAD): Must be connected to solid ground plane for thermal and electrical performance.