UCC27211ADRMR

Part: UCC27211A — Texas Instruments

Type: Half-Bridge Gate Driver

Description: The UCC27211A is a 120V, 3.7A source / 4.5A sink half-bridge gate driver designed to drive two N-channel MOSFETs in high-side and low-side configurations with independent inputs, featuring fast propagation delays and an integrated 120V bootstrap diode.

Operating Conditions:

• Supply voltage: 8–17 V
• Operating temperature: -40 to +150 °C
• High-side voltage (VHB): VHS + 8.0V to VHS + 17V, max 115V
• HS voltage: -1V to 105V

Absolute Maximum Ratings:

• Max supply voltage: 20 V
• Max junction/storage temperature: 150 °C
• Max boot voltage: 120 V
• Max input voltage (HI, LI): -10 V to 20 V

Key Specs:

• Peak pullup current (LO/HO): 3.7 A (typ)
• Peak pulldown current (LO/HO): 4.5 A (typ)
• VDD quiescent current: 0.11 mA (typ, VLI=VHI=0V)
• VDD rising threshold (UVLO): 7 V (typ)
• Propagation delay (VLI falling to VLO falling): 19 ns (typ, C LOAD = 0 pF)
• Delay matching (LI ON, HI OFF): 4 ns (typ, TJ = 25°C)
• LO/HO rise time: 7.2 ns (typ, C LOAD = 1000 pF)
• LO/HO fall time: 5.5 ns (typ, C LOAD = 1000 pF)
• Bootstrap diode forward voltage: 0.65 V (typ, I VDD - HB = 100 μA)

Features:

• Drives two N-channel MOSFETs in high-side and low-side configuration with independent inputs
• Maximum boot voltage 120V DC
• Input pins can tolerate -10V to +20V and are independent of supply voltage range
• TTL compatible inputs
• Fast propagation delay times (20ns typical)
• 4ns delay matching
• Symmetrical undervoltage lockout for high-side and low-side driver
• On-chip 120V rated bootstrap diode

Applications:

• Solar power optimizers and micro inverters
• Telecom and merchant power supplies
• Online and offline UPS
• Energy storage systems
• Battery test equipment

Package:

• DRM (VSON, 8) - 4.0mm × 4.0mm

• -40°C to +150°C junction temperature range
• Drives two N-channel MOSFETs in high-side and low-side configuration with independent inputs
• Maximum boot voltage 120V DC
• 3.7A source, 4.5A sink output currents
• Input pins can tolerate -10V to +20V and are independent of supply voltage range
• TTL compatible inputs
• 8V to 17V VDD operating range, (20V ABS MAX)
• 7.2ns rise and 5.5ns fall time with 1000pF load
• Fast propagation delay times (20ns typical)
• 4ns delay matching
• Symmetrical undervoltage lockout for high-side and low-side driver
• Industry standard package available -4mm × 4mm SON-8

• Solar power optimizers and micro inverters
• Telecom and merchant power supplies
• Online and offline UPS
• Energy storage systems
• Battery test equipment

Figure 4-1. DRM Package 8-Pin VSON Bottom View

Table 4-1. Pin Functions

• (1) HI or LI input is assumed to connect to a low impedance source signal. The source output impedance is assumed less than 100Ω. If the source impedance is greater than 100Ω, add a bypassing capacitor, each, between HI and VSS and between LI and VSS. The added capacitor value depends on the noise levels presented on the pins, typically from 1nF to 10nF should be effective to eliminate the possible noise effect. When noise is present on two pins, HI or LI, the effect is to cause HO and LO malfunctions to have wrong logic outputs.
• (2) For cold temperature applications TI recommends the upper capacitance range. Follow the Layout Guidelines for PCB layout.
• (3) The thermal pad is not directly connected to any leads of the package; however, it is electrically and thermally connected to the substrate which is the ground of the device.

VDD = VHB =12 V, VHS = VSS = 0 V, No load on LO or HO, TA = TJ = -40°C to +150°C (unless otherwise noted).

Over operating free-air temperature range and all voltages are with respect to V ss (unless otherwise noted). (1)

Over operating free-air temperature range and all voltages are with respect to V ss (unless otherwise noted).

To affect fast switching of power devices and reduce associated switching power losses, a powerful gate driver is employed between the PWM output of controllers and the gates of the power semiconductor devices. Also, gate drivers are indispensable when it is impossible for the PWM controller to directly drive the gates of the switching devices. With the advent of digital power, this situation will be often encountered because the PWM signal from the digital controller is often a 3.3V logic signal which cannot effectively turn on a power switch. Level shifting circuitry is needed to boost the 3.3V signal to the gate-drive voltage (such as 12V) in order to fully turn on the power device and minimize conduction losses. Traditional buffer drive circuits based on NPN/PNP bipolar transistors in totem-pole arrangement, being emitter follower configurations, prove inadequate with digital power because they lack level-shifting capability. Gate drivers effectively combine both the level-shifting and bufferdrive functions. Gate drivers also find other needs such as minimizing the effect of high-frequency switching noise by locating the high-current driver physically close to the power switch, driving gate-drive transformers, and controlling floating power-device gates, reducing power dissipation and thermal stress in controllers by moving gate charge power losses from the controller into the driver.

Finally, emerging wide band-gap power device technologies such as GaN based switches, which are capable of supporting very high switching frequency operation, are driving very special requirements in terms of gate drive capability. These requirements include operation at low VDD voltages (5V or lower), low propagation delays and availability in compact, low-inductance packages with good thermal capability. Gate-driver devices are extremely important components in switching power, and they combine the benefits of high-performance, low-cost component count and board-space reduction as well as simplified system design.