TXS0108E-Q1

Part: TXS0108E

Type: 8-Bit Bi-Directional, Level-Shifting, Voltage Translator for Open-Drain and Push-Pull Applications

Key Specs:

• Maximum data rate (push pull): 110Mbps
• Maximum data rate (open drain): 1.2Mbps
• A port voltage range (VCCA): 1.4V to 3.6V
• B port voltage range (VCCB): 1.65V to 5.5V
• Number of bits: 8-bit

Features:

• No direction-control signal needed
• No power-supply sequencing required (either VCCA or VCCB can be ramped first)
• Latch-up performance exceeds 100mA per JESD 78, class II
• ESD protection exceeds JESD 22 (A port): 2000 V Human Body Model, 150 V Machine Model, 1000 V Charged-Device Model
• IEC 61000-4-2 ESD (B-port): ± 8kV Contact Discharge, ± 6kV Air Discharge
• Non-inverting level translator
• Output-enable (OE) input for high-impedance (Hi-Z) state

Applications:

• Handsets
• Smartphones
• Tablets
• Desktop PCs

Package:

• PW (TSSOP, 20): 6.50mm × 6.40mm
• RGY (VQFN, 20): 4.50mm × 3.5 mm
• DGS (VSSOP, 20): 3.00mm × 5.10mm
• RKS (VQFN, 20): 4.5mm × 2.5mm
• ZXY (UFBGA, 20): 2.50mm × 3.00mm
• NME (NFBGA, 20): 2.50mm × 3.00mm

• No direction-control signal needed
• Maximum data rates:
  • 110Mbps (push pull)
  • 1.2Mbps (open drain)
• 1.4V to 3.6V on A port and 1.65V to 5.5V on B port (VCCA ≤ VCCB)
• No power-supply sequencing required either VCCA or VCCB can be ramped first
• Latch-up performance exceeds 100mA per JESD 78, class II
• ESD protection exceeds JESD 22 (A port):
  • 2000 V Human Body Model (A114-B)
  • 150 V Machine Model (A115-A)
  • 1000 V Charged-Device Model (C101)
• IEC 61000-4-2 ESD (B-port):
  • ± 8kV Contact Discharge
  • ± 6kV Air Discharge

1 Features

• No direction-control signal needed
• Maximum data rates:
  • 110Mbps (push pull)
  • 1.2Mbps (open drain)
• 1.4V to 3.6V on A port and 1.65V to 5.5V on B port (VCCA ≤ VCCB)
• No power-supply sequencing required either VCCA or VCCB can be ramped first
• Latch-up performance exceeds 100mA per JESD 78, class II
• ESD protection exceeds JESD 22 (A port):
  • 2000 V Human Body Model (A114-B)
  • 150 V Machine Model (A115-A)
  • 1000 V Charged-Device Model (C101)
• IEC 61000-4-2 ESD (B-port):
  • ± 8kV Contact Discharge
  • ± 6kV Air Discharge

2 Applications

• Handsets
• Smartphones
• Tablets
• Desktop PCs

3 Description

This device is an 8-bit non-inverting level translator which uses two separate configurable power-supply rails. The A port tracks the VCCA pin supply voltage. The VCCA pin accepts any supply voltage between 1.4V and 3.6V. The B port tracks the VCCB pin supply voltage. The VCCB pin accepts any supply voltage between 1.65V and 5.5V. Two input supply pins allows for low Voltage bidirectional translation between any of the 1.5V, 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance (Hi-Z) state.

To put the device in the Hi-Z state during power-up or power-down periods, tie OE to GND through a pulldown resistor. The current-sourcing capability of the driver determines the minimum value of the resistor.

(1) For more information, see Section 11

(2) The package size (length × width) is a nominal value and includes pins, where applicable.

Simplified Application

Table of Contents

• 2 Applications1
• 3 Description1
• 4 Pin Configuration and Functions3
• 5 Specifications 5
• 5.1 Absolute Maximum Ratings 5
• 5.2 ESD Ratings 5
• 5.3 Recommended Operating Conditions6
• 5.4 Thermal Information6
• 5.5 Electrical Characteristics: TA = –40°C to 85°C 7
• 5.6 Timing Requirements: VCCA = 1.5V ± 0.1 V8
• 5.7 Timing Requirements: VCCA = 1.8V ± 0.15V8
• 5.8 Timing Requirements: VCCA = 2.5V ± 0.2V8
• 5.9 Timing Requirements: VCCA = 3.3V ± 0.3V8
• 5.10 Switching Characteristics: VCCA = 1.5V ± 0.1V9
• 5.11 Switching Characteristics: VCCA = 1.8V ± 0.15V 10
• 5.12 Switching Characteristics: VCCA = 2.5V ± 0.2V 11
• 5.13 Switching Characteristics: VCCA = 3.3V ± 0.3V12
• 5.14 Operating Characteristics: VCCA = 1.5V to 3.3V,
• VCCB = 1.5V to 3.3V 12
• 5.15 Typical Characteristics13
• 6 Parameter Measurement Information14

4 Pin Configuration and Functions

Figure 4-1. ZXY Package, 20 BUMP (Bottom View)

Figure 4-2. NME Package, 20 BGA (Bottom View)

• D
• C
• B
• A

Figure 4-3. PW or DGS Package, 20-Pin TSSOP or 20-Pin VSSOP (Top View),

The exposed center pad, if used, must be connected as a secondary ground or left electrically open.

Figure 4-5. RGY Package, 20 Pins (Top View)

Table 4-1. Pin Functions

• A1
• A2
• A3
• A4
• A5
• A6
• A7
• A8
• B1
• B2
• B3
• B4
• B5
• B6
• B7
• B8
• GND
• OE
• VCCA
• VCCB
• Thermal Pad

(1) I = input, O = output, I/O = input and output, P = power

5 Specifications

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input and output negative Voltage ratings may be exceeded if the input and output current ratings are observed.

(3) The value of VCCA and VCCB are provided in the recommended operating conditions table.

5.2 ESD Ratings

(2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

5.3 Recommended Operating Conditions

(1) VCCI is the VCC associated with the data input port.

(2) VCCO is the VCC associated with the output port.

(3) VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6V.

5.4 Thermal Information

5.5 Electrical Characteristics: TA = –40°C to 85°C

over recommended operating free-air temperature range (unless otherwise noted)(1) (2) (3)

(2) VCCI is the VCC associated with the input port.

(3) VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6V.

5.6 Timing Requirements: VCCA = 1.5V ± 0.1 V

over recommended operating free-air temperature range, VCCA = 1.5V ± 0.1V (unless otherwise noted)

5.7 Timing Requirements: VCCA = 1.8V ± 0.15V

over recommended operating free-air temperature range, VCCA = 1.8V ± 0.15V (unless otherwise noted)

5.8 Timing Requirements: VCCA = 2.5V ± 0.2V

over recommended operating free-air temperature range, VCCA = 2.5V ± 0.2V (unless otherwise noted)

5.9 Timing Requirements: VCCA = 3.3V ± 0.3V

over recommended operating free-air temperature range, VCCA = 3.3V ± 0.3V (unless otherwise noted)

| | | | VCCB = 3.3V ± 0.3V | | VCCB = 5V ± 0.5V | | UNIT | |---|---|---|---|---|---|---|---|---| | | | | MIN | MAX | MIN | MAX | | | | Data rate | Push-pull | | 100 | | 110 | Mbps | | | | Open-drain | | 0.8 | | 1.2 | | | t_w | Pulse duration | Data inputs | Push-pull | 10 | | 9.1 | | ns | | | | | Open-drain | 1250 | | 833

5.10 Switching Characteristics: VCCA = 1.5V ± 0.1V

over recommended operating free-air temperature range, VCCA = 1.5V ± 0.1V (unless otherwise noted)

5.11 Switching Characteristics: VCCA = 1.8V ± 0.15V

over recommended operating free-air temperature range, VCCA = 1.8V ± 0.15V (unless otherwise noted)

5.12 Switching Characteristics: VCCA = 2.5V ± 0.2V

over recommended operating free-air temperature range, VCCA = 2.5V ± 0.2V (unless otherwise noted)

5.13 Switching Characteristics: VCCA = 3.3V ± 0.3V

over recommended operating free-air temperature range, VCCA = 3.3V ± 0.3V (unless otherwise noted)

5.14 Operating Characteristics: VCCA = 1.5V to 3.3V, VCCB = 1.5V to 3.3V

TA = 25°C

5.15 Typical Characteristics

6 Parameter Measurement Information

6.1 Load Circuits

Figure 6-1 shows the push-pull driver circuit used for measuring data rate, pulse duration, propagation delay, output rise-time and fall-time. Figure 6-2 shows the open-drain driver circuit used for measuring data rate, pulse duration, propagation delay, output rise-time and fall-time.

• A. VCCI is the VCC associated with the input port.
• B. VCCO is the VCC associated with the output port.

Figure 6-1. Data Rate, Pulse Duration, Propagation Delay, Output Rise-Time And Fall-Time Measurement Using a Push-Pull Driver

• A. VCCI is the VCC associated with the input port.
• B. VCCO is the VCC associated with the output port.

Figure 6-2. Data Rate (10pF), Pulse Duration (10pF), Propagation Delay, Output Rise-Time And Fall-Time Measurement Using an Open-Drain Driver

A. tPLZ and tPHZ are the same as tdis.

B. tPZL and tPZH are the same as ten.

Figure 6-3. Load Circuit for Enable-Time and Disable-Time Measurement

6.2 Voltage Waveforms

Figure 6-4. Pulse Duration (Push-Pull)

Figure 6-5. Propagation Delay Times

7 Detailed Description

7.1 Overview

The TXS0108E device is a directionless voltage-level translator specifically designed for translating logic voltage levels. The A-port accepts I/O voltages ranging from 1.4V to 3.6V. The B-port accepts I/O voltages from 1.65V to 5.5V. The device uses pass gate architecture with edge rate accelerators (one shots) to improve the overall data rate. The pull-up resistors, commonly used in open-drain applications, have been conveniently integrated so that an external resistor is not needed. While this device is designed for open-drain applications, the device can also translate push-pull CMOS logic outputs.

7.2 Functional Block Diagram

Each A-port I/O has a pull-up resistor (RPUA) to VCCA and each B-port I/O has a pull-up resistor (RPUB) to VCCB. RPUA and RPUB have a value of 40kΩ when the output is driving low. RPUA and RPUB have a value of 4kΩ when the output is driving high. RPUA and RPUB are disabled when OE = Low.

7.3 Feature Description

7.3.1 Architecture

Figure 7-1 shows semi-buffered architecture design this application requires for both push-pull and open-drain mode. This application uses edge-rate accelerator circuitry (for both the high-to-low and low-to-high edges), a high-on-resistance N-channel pass-gate transistor (on the order of 300Ω to 500Ω) and pull-up resistors (to provide DC-bias and drive capabilities) to meet these requirements. This design does not need a directioncontrol signal to control the direction of data flow from A to B or from B to A. The resulting implementation supports both low-speed open-drain operation as well as high-speed push-pull operation.

Figure 7-1. Architecture of a TXS0108E Cell

When transmitting data from A-ports to B-ports, during a rising edge the one-shot circuit (OS3) turns on the PMOS transistor (P2) for a short-duration which reduces the low-to-high transition time. Similarly, during a falling edge, when transmitting data from A to B, the one-shot circuit (OS4) turns on the N-channel MOSFET transistor (N2) for a short-duration which speeds up the high-to-low transition. The B-port edge-rate accelerator consists of one-shot circuits OS3 and OS4. Transistors P2 and N2 and serves to rapidly force the B port high or low when a corresponding transition is detected on the A port.

When transmitting data from B- to A-ports, during a rising edge the one-shot circuit (OS1) turns on the PMOS transistor (P1) for a short-duration which reduces the low-to-high transition time. Similarly, during a falling edge, when transmitting data from B to A, the one-shot circuit (OS2) turns on NMOS transistor (N1) for a short-duration and this speeds up the high-to-low transition. The A-port edge-rate accelerator consists of one-shots OS1 and OS2, transistors P1 and N1 components and form the edge-rate accelerator and serves to rapidly force the A port high or low when a corresponding transition is detected on the B port.

7.3.2 Input Driver Requirements

The continuous DC-current sinking capability is determined by the external system-level open-drain (or pushpull) drivers that are interfaced to the TXS0108E I/O pins. Because the high bandwidth of these bidirectional I/O circuits is used to facilitate this fast change from an input to an output and an output to an input, they have a modest DC-current sourcing capability of hundreds of micro-amperes, as determined by the internal pull-up resistors.

The fall time (tfA, tfB) of a signal depends on the edge-rate and output impedance of the external device driving TXS0108E data I/Os, as well as the capacitive loading on the data lines.

Similarly, the tPHL and maximum data rates also depend on the output impedance of the external driver. The values for tfA, tfB, tPHL, and maximum data rates in the data sheet assume that the output impedance of the external driver is less than 50Ω.

7.3.3 Output Load Considerations

TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading and so that proper one-shot triggering takes place. PCB signal trace-lengths should be kept short enough such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by allowing any reflection to see a low impedance at the driver. The one-shot circuits have been designed to stay on for approximately 30ns. The maximum capacitance of the lumped load that can be driven also depends directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is driven fully to the positive rail. The one-shot duration has been set to best optimize trade-offs between dynamic ICC, load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the capacitance of the TXS0108E output. Therefore, TI recommends that this lumped-load capacitance is considered to avoid one-shot retriggering, bus contention, output signal oscillations, or other adverse system-level affects.

7.3.4 Enable and Disable

The TXS0108E has an OE pin input that is used to disable the device by setting the OE pin low, which places all I/Os in the Hi-Z state. The disable time (tdis) indicates the delay between the time when the OE pin goes low and when the outputs actually get disabled (Hi-Z). The enable time (ten) indicates the amount of time the design must allow for the one-shot circuitry to become operational after the OE pin goes high.

7.3.5 Pull-up or Pull-down Resistors on I/O Lines

The TXS0108E has the smart pull-up resistors dynamically change value based on whether a low or a high is being passed through the I/O line. Each A-port I/O has a pull-up resistor (RPUA) to VCCA and each B-port I/O has a pull-up resistor (RPUB) to VCCB. RPUA and RPUB have a value of 40kΩ when the output is driving low. RPUA and RPUB have a value of 4kΩ when the output is driving high. RPUA and RPUB are disabled when OE = Low. This feature provides lower static power consumption (when the I/Os are passing a low), and supports lower VOL values for the same size pass-gate transistor, and helps improve simultaneous switching performance.

7.4 Device Functional Modes

The TXS0108E device has two functional modes, enabled and disabled. To disable the device set the OE pin input low, which places all I/Os in a high impedance state. Setting the OE pin input high enables the device.

8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

8.1 Application Information

The TXS0108E can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. The device is an excellent choice for use in applications where an open-drain driver is connected to the data I/Os. The device is appropriate for applications where a push-pull driver is connected to the data I/Os, but the TXB0104 device, 4-Bit Bidirectional Voltage-Level Translator might be a better option for such push-pull applications. The device is a semi-buffered auto-direction-sensing voltage translator design is optimized for translation applications (for example, MMC Card Interfaces) that require the system to start out in a low-speed open-drain mode and then switch to a higher speed push-pull mode.

8.2 Typical Application

Figure 8-1. Typical Application Circuit

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 8-1. Ensure that VCCA ≤ VCCB.

| Table 8-1. Design Parameters | | :-------------------- | :---------------- | | DESIGN PARAMETER | EXAMPLE VALUE | | Input voltage range | 1.4V to 3.6V | | Output voltage range | 1.65V to 5.5V |

8.2.2 Detailed Design Procedure

To begin the design process, determine the following:

• Input voltage range

• – Use the supply voltage of the device that is driving the TXS0108E device to determine the input voltage range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low the value must be less than the VIL of the input port.
• Output voltage range
  • Use the supply voltage of the device that the TXS0108E device is driving to determine the output voltage range.
  • The TXS0108E device has smart internal pull-up resistors. External pull-up resistors can be added to reduce the total RC of a signal trace if necessary.
• An external pull-down resistor decreases the output VOH and VOL. Use Equation 1 to calculate the VOH as a result of an external pull-down resistor.

VOH = VCCx × RPD / (RPD + 4kΩ) (1)

8.2.3 Application Curves

Figure 8-2. Level-Translation of a 2.5MHz Signal

8.3 Power Supply Recommendations

During operation, ensure that VCCA ≤ VCCB at all times. The sequencing of each power supply will not damage the device during the power up operation, so either power supply can be ramped up first. The output-enable (OE) input circuit is designed so that it is supplied by VCCA and when the (OE) input is low, all outputs are placed in the high-impedance state. To put the outputs in the high-impedance state during power up or power down, tie the OE input pin to GND through a pull-down resistor, and do not enable the OE input until VCCA and VCCB are fully ramped and stable. The current-sourcing capability of the driver determines the minimum value of the pull-down resistor to ground.

8.4 Layout

8.4.1 Layout Guidelines

For device reliability, following common printed-circuit board layout guidelines is recommended.

• Bypass capacitors should be used on power supplies. Place the capacitors as close as possible to the VCCA, VCCB, and GND pin.
• Short trace lengths should be used to avoid excessive loading.
• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than the one shot duration, approximately 30ns, causing any reflection to encounter low impedance at the source driver.

8.4.2 Layout Example

Figure 8-3. Layout Example

9 Device and Documentation Support

9.1 Documentation Support

Related Documentation

For related documentation, see the following:

• Texas Instruments, A guide to Voltage level translation using TXS devices
• Texas Instruments, Factors affecting the Vol of TXS Auto Bidirectional Devices
• Texas Instruments, Effects of Pullup and Pulldown resistors on TXS Devices

9.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

9.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

9.4 Trademarks

TI E2E™ is a trademark of Texas Instruments.

All trademarks are the property of their respective owners.

9.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

10 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

• Added DGS package1
• Updated thermal information6
• Updated pulse duration and open-drain in Timing Requirements
  8

• •

Figure 4-1. ZXY Package, 20 BUMP (Bottom View)

Figure 4-2. NME Package, 20 BGA (Bottom View)

• D
• C
• B
• A

Figure 4-3. PW or DGS Package, 20-Pin TSSOP or 20-Pin VSSOP (Top View),

The exposed center pad, if used, must be connected as a secondary ground or left electrically open.

Figure 4-5. RGY Package, 20 Pins (Top View)

Table 4-1. Pin Functions

• A1
• A2
• A3
• A4
• A5
• A6
• A7
• A8
• B1
• B2
• B3
• B4
• B5
• B6
• B7
• B8
• GND
• OE
• VCCA
• VCCB
• Thermal Pad

(1) I = input, O = output, I/O = input and output, P = power

over recommended operating free-air temperature range (unless otherwise noted)(1) (2) (3)

(2) VCCI is the VCC associated with the input port.

(3) VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6V.

over operating free-air temperature range (unless otherwise noted)(1)

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input and output negative Voltage ratings may be exceeded if the input and output current ratings are observed.

(3) The value of VCCA and VCCB are provided in the recommended operating conditions table.

(1) VCCI is the VCC associated with the data input port.

(2) VCCO is the VCC associated with the output port.

(3) VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6V.

5.4 Thermal Information