TPS562200
TPS56x200 4.5-V to 17-V Input, 2-A, 3-A Synchronous Step-down Voltage Regulator in 6-Pin SOT-23
Manufacturer
ti
Overview
Part: TPS562200, TPS563200 from Texas Instruments
Type: Synchronous Step-down Voltage Regulator
Key Specs:
- Input voltage range: 4.5 V to 17 V
- Output voltage range: 0.76 V to 7 V
- Switching frequency: 650 kHz
- Output current (TPS562200): 2 A
- Output current (TPS563200): 3 A
- Feedback voltage accuracy: 1% (25°C)
- Low shutdown current: less than 10 µA
- Fixed soft start: 1 ms
Features:
- TPS562200 with integrated 122-mΩ and 72-mΩ FETs
- TPS563200 with integrated 68-mΩ and 39-mΩ FETs
- D-CAP2™ control topology for fast transient response
- Advanced Eco-mode pulse-skip
- Start-up from pre-biased output voltage
- Cycle-by-cycle overcurrent limit
- Hiccup-mode undervoltage protection
- Non-latch OVP, UVLO and TSD protections
Applications:
- Digital TV power supply
- High definition Blu-ray Disc™ players
- Networking home terminal
- Digital Set Top Box (STB)
Package:
- 6-pin SOT-23 (DDC): 1.6-mm × 2.9-mm
Features
- TPS562200 2-A converter with integrated 122-mΩ and 72-mΩ FETs
- TPS563200 3-A converter with integrated 68-mΩ and 39-mΩ FETs
- D-CAP2™ control topology for fast transient response
- Input voltage range: 4.5 V to 17 V
- Output voltage range: 0.76 V to 7 V
- Switching frequency: 650 kHz
- Advanced Eco-mode pulse-skip
- Low shutdown current less than 10 µA
- 1% feedback voltage accuracy (25°C)
- Start-up from pre-biased output voltage
- Cycle-by-cycle overcurrent limit
- Hiccup-mode undervoltage protection
- Non-latch OVP, UVLO and TSD protections
- Fixed soft start: 1 ms
- Use TPS563252 for improved efficiency and higher frequency in a smaller package
- Create a Custom Design with WEBENCH® Tools
Applications
- Digital TV power supply
- High definition Blu-ray Disc™ players
- Networking home terminal
- Digital Set Top Box (STB)
Simplified Schematic
Pin Configuration
Figure 5-1. DDC Package 6 Pin (SOT) Top View
Table 5-1. Pin Functions
| PIN NAME NUMBER |
|---|
| Ground pin Source terminal of low-side power NFET as well as the ground terminal for controller circuit. GND 1 Connect sensitive VFB to this GND at a single point. |
| SW |
| VIN |
| VFB |
| EN |
| VBST 6 |
Electrical Characteristics
TJ = -40°C to 150°C, VIN = 12V (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|
| SUPPLY CURRENT | |||||||
| Operating – non-switching | VIN current, TA = 25°C, EN = 5V, | TPS562200 | 230 | 330 | |||
| I(VIN) | supply current | VFB = 0.8 V | TPS563200 | 190 | 290 | µA | |
| I(VINSDN) | Shutdown supply current | VIN current, TA = 25°C, EN = 0 V | 3 | 10 | µA | ||
| LOGIC THRESHOLD | |||||||
| VEN(H) | EN high-level input voltage | EN | 1.6 | V | |||
| VEN(L) | EN low-level input voltage | EN | 0.6 | V | |||
| REN | EN pin resistance to GND | VEN = 12 V | 225 | 450 | 900 | kΩ | |
| VFB VOLTAGE AND DISCHARGE RESISTANCE | |||||||
| VFB(TH) | VFB threshold voltage | TA = 25°C, VO = 1.05 V, IO = 10 mA, Eco-mode operation | 772 | mV | |||
| TA = 25°C, VO = 1.05 V, continuous mode operation | 765 | 772 | mV | ||||
| I(VFB) | VFB input current | VFB = 0.8V, TA = 25°C | 0 | ±0.1 | µA | ||
| MOSFET | |||||||
| TPS562200 | 122 | mΩ | |||||
| RDS(on)h | High side switch resistance | TA = 25°C, VBST – SW = 5.5 V | TPS563200 | 68 | mΩ | ||
| TPS562200 | 72 | mΩ | |||||
| RDS(on)l | Low side switch resistance | TA = 25°C | TPS563200 | 39 | mΩ | ||
| CURRENT LIMIT | |||||||
| DC current, VOUT = 1.05 V, LOUT = 2.2 µF | TPS562200 | 2.5 | 3.2 | 4.3 | A | ||
| Iocl | Current limit (1) | DC current, VOUT = 1.05 V, LOUT = 1.5 µF | TPS563200 | 3.5 | 4.2 | 5.3 | A |
| THERMAL SHUTDOWN | |||||||
| Thermal shutdown | Shutdown temperature | 155 | |||||
| TSDN | threshold(1) | Hysteresis | 35 | °C | |||
| OUTPUT UNDERVOLTAGE AND OVERVOLTAGE PROTECTION | |||||||
| VOVP | Output OVP threshold | OVP Detect | 125% x Vfbth | ||||
| VUVP | Output Hiccup threshold | Hiccup detect | 65% x Vfbth | ||||
| tHiccupOn | Hiccup On Time | Relative to soft-start time | 1 | ms | |||
| tHiccupOff | Hiccup Off Time | Relative to soft-start time | 7 | ms | |||
| UVLO | |||||||
| Wake up VIN voltage | 3.45 | 3.75 | 4.05 | ||||
| UVLO | UVLO threshold | Hysteresis VIN voltage | 0.13 | 0.32 | 0.55 | V |
(1) Not production tested
Absolute Maximum Ratings
TJ = -40°C to 150°C(unless otherwise noted)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VIN, EN | –0.3 | 19 | V | |
| VBST | –0.3 | 25 | V | |
| VBST (10-ns transient) | –0.3 | 27.5 | V | |
| Input voltage range | VBST (vs SW) | –0.3 | 6.5 | V |
| VFB | –0.3 | 6.5 | V | |
| SW | –2 | 19 | V | |
| SW (10-ns transient) | –3.5 | 21 | V | |
| Operating junction temperature, TJ | –40 | 150 | °C | |
| Storage temperature range, Tstg | –55 | 150 | °C |
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Recommended Operating Conditions
TJ = -40°C to 150°C(unless otherwise noted)
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VIN | Supply input voltage range | 4.5 | 17 | V | |
| VBST | –0.1 | 23 | |||
| VBST (10-ns transient) | –0.1 | 26 | |||
| VBST(vs SW) | –0.1 | 6 | |||
| VI | Input voltage range | EN | –0.1 | 17 | V |
| VFB | –0.1 | 5.5 | |||
| SW | –1.8 | 17 | |||
| SW (10-ns transient) | –3.5 | 20 | |||
| TA | Operating free-air temperature | –40 | 85 | °C |
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Thermal Information
| TPS562200 | TPS563200 | ||
|---|---|---|---|
| THERMAL METRIC (1) | DDC (SOT) | DDC (SOT) | |
| (6 PINS) | (6 PINS) | ||
| RθJA | Junction-to-ambient thermal resistance | 89.0 | 87.9 |
| RθJCtop | Junction-to-case (top) thermal resistance | 44.5 | 42.2 |
| RθJB | Junction-to-board thermal resistance | 13.4 | 13.6 |
| ψJT | Junction-to-top characterization parameter | 2.2 | 1.9 |
| ψJB | Junction-to-board characterization parameter | 13.2 | 13.3 |
| (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. |
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