TPS546B24A
TPS546B24A 2.95-V to 18-V, 20-A, Up to 4× Stackable, PMBus® Buck Converter
Manufacturer
Texas Instruments
Overview
Part: Texas Instruments TPS546B24A
Type: Synchronous Buck Converter
Key Specs:
- Input Voltage (PVIN): 2.95-V to 18-V
- Output Current: 20-A
- Output Voltage Range: 0.25-V to 5.5-V
- Switching Frequency: 225 kHz to 1.5 MHz
- Integrated MOSFETs: 5.5-mΩ/1.8-mΩ
- Operating Junction Temperature: -40°C to +150°C
Features:
- Split rail support
- Average current mode control with selectable internal compensation
- 2×, 3×, 4× stackable with current sharing up to 80 A
- Extensive PMBus command set with telemetry for VOUT, IOUT and internal die temperature
- Differential remote sensing with internal FB divider for < 1% VOUT error
- AVS and margining capabilities through PMBus
- MSEL pins pin programming PMBus defaults
- Frequency sync in/sync out
- Supports prebiased output
- Supports strongly coupled inductor
Applications:
- Data center switches, rack servers
- Active antenna system, remote radio and baseband unit
- Automated test equipment, CT, PET, and MRI
- ASIC, SoC, FPGA, DSP core, and I/O voltage
Package:
- LQFN-CLIP (40): 7.00 mm × 5.00 mm × 1.5 mm
Features
- Split rail support: 2.95-V to 18-V PVIN; 2.95-V to 18-V AVIN (4-VIN VDD5 for switching)
- Integrated 5.5-mΩ/1.8-mΩ MOSFETs
- Average current mode control with selectable internal compensation
- 2×, 3×, 4× stackable with current sharing up to 80 A, supporting a single address per output
- Selectable 0.5-V to 5.5-V output via pin strap or 0.25-V to 5.5-V using PMBus VOUT_COMMAND
- Extensive PMBus command set with telemetry for VOUT, IOUT and internal die temperature
- Differential remote sensing with internal FB divider for < 1% VOUT error –40°C to +150°C TJ
- AVS and margining capabilities through PMBus
- MSEL pins pin programming PMBus defaults
- 12 Selectable switching frequencies from 225 kHz to 1.5 MHz (8 pin-strap options)
- Frequency sync in/sync out
- Supports prebiased output
- Supports strongly coupled inductor
- 7-mm × 5-mm × 1.5-mm, 40-pin QFN, pitch = 0.5 mm
- Create a Custom Design Using the TPS546B24A With WEBENCH® Power Designer
Applications
- Data center switches, rack servers
- Active antenna system, remote radio and baseband unit
- Automated test equipment, CT, PET, and MRI
- ASIC, SoC, FPGA, DSP core, and I/O voltage
Pin Configuration
Figure 5-1. 40-Pin LQFN-CLIP With Exposed Thermal Pad RVF Package (Top View)
Electrical Characteristics
TJ = –40°C to 150°C, VPVIN = VAVIN= 12 V, fSW = 550 kHz; zero power dissipation (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| INPUT SUPPLY | ||||||
| VAVIN | Input supply voltage range | 2.95 | 16 | V | ||
| VPVIN | Power stage voltage range | 2.95 | 16 | V | ||
| IAVIN | Input operating current | Converter not switching | 12.5 | 17 | mA | |
| AVIN UVLO | ||||||
| VAVINuvlo |
TPS546B24A SLUSE15A – FEBRUARY 2020 – REVISED SEPTEMBER 2020 www.ti.com
| TJ | = –40°C to 150°C, VPVIN = VAVIN= 12 V, fSW = 550 kHz; zero power dissipation (unless otherwise noted) |
|---|---|
| PARAMETER | |
| ---------------------- | -------------------------------------------------------- |
| VIRNG(VOSNS) | VOSNS input range for regulation accuracy (1) |
| REFERENCE VOLTAGE AND ERROR AMPLIFIER | |
| VREF | |
| Reference voltage(1) | |
| VOUT(ACC) | Output voltage accuracy |
| Progrmmable error amplifier transonductance | |
| GmEA | Resolution(1) |
| Unloaded Bandwidth(1) | |
| RpEA | Programmable parallel resistor range |
| Resolution(1) | |
| CintEA | Programmable integrator capacitor range |
| Resolution(1) | |
| CpEA | Programmable parallel capacitor range |
| Resolution(1) | |
| CURRENT GM AMPLIFIER | |
| Progrmmable current error amplifier transonductance | |
| GmBUF | Resolution(1) |
| Unloaded bandwidth(1) | |
| RpBUF | Programmable parallel resistor range |
| Resolution(1) | |
| RintBUF | Programmable integrator resistor range(1) |
| Resolution(1) | |
| CintBUF | Programmable integrator capacitor range |
| Resolution(1) | |
| CpBUF | Programmable parallel capacitor range |
| Resolution(1) | |
| OSCILLATOR | |
| Adjustment range(2) | |
| fSW | Switching frequency(2) |
| SYNCHRONIZATION |
TJ = –40°C to 150°C, VPVIN = VAVIN= 12 V, fSW = 550 kHz; zero power dissipation (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VIH(sync) | High-level input voltage | 1.35 | |||||
| VIL(sync) | Low-level input voltage | 0.8 | V | ||||
| tpw(sync) | Sync input minimum pulse width | fsw = 225 kHz to 1500 kHz | 200 | ns | |||
| ΔfSYNC | SYNC pin frequency range from FREQUENCY_SWITCH frequency(1) | –20 | 20 | % | |||
| VOH(sync) | Sync output high voltage | 100-μA load | VDD5 – 0.85V | VDD5 | V | ||
| VOL(sync) | Sync output low voltage | 2.4-mA load | 0.4 | V | |||
| tPLL | PLL lock time | 605 kHz(1) | Fsw = 550 kHz, SYNC clock frequency 495 kHz - | 65 | μs | ||
| PhaseErr | Phase interleaving error(5) | fsw < 1.1 MHz fsw ≥1.1 MHz | 9 23 | Degre e ns | |||
| RESET | |||||||
| VIH(reset) | High-level input voltage(1) | 1.35 | |||||
| VIL(reset) | Low-level input voltage | 0.8 | V | ||||
| tpw(reset) | Minimum RESET_B pulse width | 200 | ns | ||||
| Rpullup(reset) | Internal pull-up resistance | VRESET = 0.8V | RESET# = 1 | 25 | 34 | 55 | kΩ |
| Vpullup(reset) | Internal Pull-up Voltage | IRESET = 10 μA | RESET# = 1 | VDD5 - 0.5 | V | ||
| VDD5 REGULATOR | |||||||
| Regulator output voltage | Default, IVDD5 = 10 mA | 4.5 | 4.7 | 4.9 | V | ||
| VVDD5 | Programmable range(1) Resolution | 3.9 | 200 | 5.3 | V mV | ||
| VVDD5(do) | Regulator dropout voltage | VAVIN – VVDD5, VAVIN = 4.5 V, IVDD5 = 25 mA | 130 | 285 | mV | ||
| VVDD5ON(IF) | Enable voltage on VDD5 for pin-strapping | 2.62 | 2.85 | V | |||
| VVDD5OFF(IF) | Disable voltage on VDD5 for pin-strapping | 2.25 | 2.48 | V | |||
| VVDD5ON(SW) | Switching enable voltage upon VDD5 | 4.05 | V | ||||
| VVDD5OFF(SW) | Switching disable voltage upon VDD5 | 3.10 | V | ||||
| VVDD5UV(hyst) | Regulator UVLO voltage hysteresis | 400 | mV | ||||
| BOOTSTRAP | |||||||
| VBOOT(drop) | Bootstrap voltage drop | IBOOT = 20 mA, VDD5 = 4.5 V | 225 | mV | |||
| BP1V5 REGULATOR | |||||||
| VBP1V5 | 1.5-V regulator output voltage VAVIN ≥ 4.5 V, IBP1V5 = 5 mA | 1.42 | 1.5 | 1.58 | V | ||
| IBP1V5SC | 1.5-V regulator short-circuit current(1) | 30 | mA | ||||
| PWM | |||||||
| tON(min) | Minimum controllable pulse width(1) | 20 | ns | ||||
| tOFF(min) | PWM Minimum off-time(1) | 400 | 500 | ns | |||
| SOFT START | |||||||
| tON_RISE | Soft-start time | Factory default setting | 3 | ms |
Upper limit on the time to power up the output
TJ
tON_MAX_FLT_LT
tON_DELAY Turn-on delay
- tOFF_FALL
- tOFF_DELAY
- VPVINOVF
- VPVINUVW
- POWER STAGE
- RHS
- RLS
- Rswpd
- Vwkdr(on)
- Vwkdr(off)
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Input voltage | PVIN | –0.3 | 18 | V |
| Input voltage | PVIN, < 2-ms transient | –0.3 | 19 | V |
| PVIN – SW (PVIN to SW differential) | –0.3 | 24 | ||
| Input voltage | PVIN – SW (PVIN to SW differential, < 10-ns transient because of SW ringing) | –5 | 24 | V |
| AVIN | –0.3 | 20 | V | |
| BOOT | –0.3 | 35 | V | |
| Input voltage | BOOT – SW (BOOT to SW differential) | –0.3 | 5.5 | V |
| EN/UVLO, VOSNS, SYNC, VSEL, MSEL1, MSEL2, ADRSEL | –0.3 | 5.5 | V | |
| VSHARE, GOSNS/SLAVE | –0.3 | 1.98 | V | |
| PMB_CLK, PMB_DATA, BCX_CLK, BCX_DAT | –0.3 | 5.5 | V | |
| Output voltage | SW | –1 | 24 | V |
| Output voltage | SW < 10-ns transient | –5 | 24 | V |
| Output voltage | VDD5, SMB_ALRT, PGD/RST_B | –0.3 | 5.5 | V |
| BP1V5 | –0.3 | 1.65 | V | |
| TJ operating junction temperature | –40 | 150 | °C | |
| Tstg Storage temperature | –55 | 150 | °C |
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| VAVIN | Controller input voltage | 2.95 | 12 | 18 | V |
| VPVIN | Power stage input voltage | 2.95 | 12 | 18 | V |
| VSW(peak) | Peak Switch Node Voltage with respect to PGND | 18 | V | ||
| TJ | Junction temperature | –40 | 150 | °C |
Thermal Information
| TPS546X24A | UNIT | ||
|---|---|---|---|
| THERMAL METRIC(1) | PQFN (RVF) 40 PINS | ||
| RθJA | Junction-to-ambient thermal resistance JEDEC | 25.3 | °C/W |
| RθJA | Junction-to-ambient thermal resistance EVM(2) | 12 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 26.3 | °C/W |
| RθJB | Junction-to-board thermal resistance | 8.5 | °C/W |
TPS546B24A SLUSE15A – FEBRUARY 2020 – REVISED SEPTEMBER 2020
| THERMAL METRIC(1) | TPS546X24A | UNIT | |
|---|---|---|---|
| PQFN (RVF) 40 PINS | |||
| ψJT | Junction-to-top characterization parameter | 2.0 | °C/W |
| ψJB | Junction-to-board characterization parameter | 9.3 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.0 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) EVM thermal resistance measured on TPS546D24AEVM-2PH. 8-layer, 2-oz Cu per layer evaluation board.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| TPS546B24ARVFR | Texas Instruments | — |
| TPS546B24ARVFR.A | Texas Instruments | — |
| TPS546B24ARVFT | Texas Instruments | — |
| TPS546B24ATPS546X24X | Texas Instruments | — |
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