TPS3850H01

The TPS3850H01 is an electronic component from Texas Instruments. View the full TPS3850H01 datasheet below including pinout, electrical characteristics, absolute maximum ratings.

Manufacturer

Texas Instruments

Overview

The TPS3850 combines a precision voltage supervisor with a programmable window watchdog timer. The TPS3850 window comparator achieves 0.8% accuracy (-40°C to +125°C) for both overvoltage (VIT+(OV) ) and undervoltage (VIT-(UV) ) thresholds on the SENSE pin. The TPS3850 also includes accurate hysteresis on both thresholds, making the device ideal for use with tight tolerance systems. The supervisor RESET delay can be set by factory-programmed default delay settings, or programmed by an external capacitor. The factoryprogrammed RESET delay features a 9.5% accuracy, high-precision delay timing.

The TPS3850 includes a programmable window watchdog timer for a wide variety of applications. The dedicated watchdog output ( WDO) enables increased resolution to help determine the nature of fault conditions. The window watchdog timeouts can be set by factory-programmed default delay settings, or programmed by an external capacitor. The watchdog can be disabled via logic pins to avoid undesired watchdog timeouts during the development process.

The TPS3850 is available in a small 3.00-mm × 3.00-mm, 10-pin VSON package.

Features

Input voltage range: VDD = 1.6 V to 6.5 V
0.8% Voltage threshold accuracy
Low supply current: I DD = 10 μA (typical)
User-programmable watchdog timeout
User-programmable reset delay
Factory-programmed precision watchdog and reset timers
Open-drain outputs
Precision over- and undervoltage monitoring:
-Supports common rails from 0.9 V to 5.0 V
-±4% and ±7% Fault windows available
-0.5% Hysteresis
Watchdog disable feature
Available in a small 3-mm × 3-mm, 10-Pin VSON package
Junction operating temperature range: -40°C to +125°C

Applications

Fully Integrated Microcontroller Supervisory Circuit

Fully Integrated Microcontroller Supervisory Circuit

Pin Configuration

TPS3850H01 Pinout

Package: VSON-10 (3 mm × 3 mm)

Pin Number	Pin Name	Type	Description
1	VDD	I	Supply voltage pin. For noisy systems, connecting a 0.1-μF bypass capacitor is recommended.
2	CWD	I	Programmable watchdog timeout input. Watchdog timeout is set by connecting a capacitor between this pin and ground. Furthermore, this pin can also be connected by a 10-kΩ resistor to VDD, or leaving unconnected (NC) further enables the selection of the preset watchdog timeouts. When using a capacitor, the TPS3850 determines the window watchdog upper boundary with Equation 6. The lower watchdog boundary is set by the SET pins.
3	SET0	I	Logic input. SET0, SET1, and CWD select the watchdog window ratios, timeouts, and disable the watchdog.
4	CRST	I	Programmable reset timeout pin. Connect a capacitor between this pin and GND to program the reset timeout period. This pin can also be connected by a 10-kΩ pullup resistor to VDD, or left unconnected (NC) for various factory programmed reset timeout options. When using an external capacitor, use Equation 3 to determine the reset timeout.
5	GND	-	Ground pin
6	SET1	I	Logic input. SET0, SET1, and CWD select the watchdog window ratios, timeouts, and disable the watchdog.
7	WDI	I	Watchdog input. A falling transition (edge) must occur at this pin between the lower (t_WDL(max)) and upper (t_WDU(min)) window boundaries in order for WDO to not assert. When the watchdog is not in use, the SET pins can be used to disable the watchdog. The input at WDI is ignored when RESET or WDO are low (asserted) and also when the watchdog is disabled. If the watchdog is disabled, then WDI cannot be left unconnected and must be driven to either VDD or GND.
8	WDO	O	Watchdog output. Connect WDO with a 1-kΩ to 100-kΩ resistor to VDD. WDO goes low (asserts) when a watchdog timeout occurs. WDO only asserts when RESET is high. When a watchdog timeout occurs, WDO goes low (asserts) for the set RESET timeout delay (t_RST). When RESET goes low, WDO is in a high-impedance state.
9	RESET	O	Reset output. Connect RESET using a 1-kΩ to 100-kΩ resistor to VDD. RESET goes low when the voltage at the SENSE pin goes below the undervoltage threshold (V_IT-(UV)) or above the overvoltage threshold (V_IT+(OV)). When the voltage level at the SENSE pin is within the normal operating range, the RESET timeout counter starts. At timer completion, RESET goes high. During startup, the state of RESET is undefined below the specified power-on reset voltage (V_POR). Above V_POR, RESET goes low and remains low until the monitored voltage is within the correct operating range (between V_IT-(UV) and V_IT+(OV)) and the RESET timeout is complete.
10	SENSE	I	SENSE input to monitor voltage rail. Connect this pin to the supply rail that must be monitored.
—	Thermal Pad	-	Connect the thermal pad to a large-area ground plane. The thermal pad is internally connected to GND.

Notes

Pin numbers verified against the VSON-10 package diagram.
RESET and WDO are open-drain outputs; connect each with a 1-kΩ to 100-kΩ resistor to VDD.
The thermal pad is internally connected to GND and should be soldered to a large ground plane for thermal management.

Electrical Characteristics

at 1.6 V ≤ V DD ≤ 6.5 V over the operating temperature range of -40°C ≤ TJ ≤ +125°C (unless otherwise noted); the open-drain pullup resistors are 10 kΩ for each output; typical values are at T J = 25°C

PARAMETER	PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
GENERAL CHARACTERISTICS	GENERAL CHARACTERISTICS	GENERAL CHARACTERISTICS	GENERAL CHARACTERISTICS	GENERAL CHARACTERISTICS	GENERAL CHARACTERISTICS	GENERAL CHARACTERISTICS
V DD (1) (2) (3)	Supply voltage		1.6		6.5	V
I DD	Supply current			10	19	μA
RESET FUNCTION	RESET FUNCTION	RESET FUNCTION	RESET FUNCTION	RESET FUNCTION	RESET FUNCTION	RESET FUNCTION
V POR (2)	Power-on reset voltage	I RESET = 15 μA, V OL(MAX) = 0.25 V			0.8	V
V UVLO (1)	Undervoltage lockout voltage			1.35		V
V IT+(OV)	Overvoltage SENSE threshold accuracy, entering RESET		V IT+(nom) -0.8%		V IT+(nom) +0.8%
V IT-(UV)	Undervoltage SENSE threshold accuracy, entering RESET		V IT-(nom) -0.8%		V IT-(nom) +0.8%
V IT(ADJ)	Falling SENSE threshold voltage, adjustable version only		0.3968	0.4	0.4032	V
V HYST	Hysteresis voltage		0.2%	0.5%	0.8%
I CRST	CRST pin charge current	CRST = 0.5 V	347	375	403	nA
V CRST	CRST pin threshold voltage		1.196	1.21	1.224	V
WINDOW WATCHDOG FUNCTION	WINDOW WATCHDOG FUNCTION	WINDOW WATCHDOG FUNCTION	WINDOW WATCHDOG FUNCTION	WINDOW WATCHDOG FUNCTION	WINDOW WATCHDOG FUNCTION	WINDOW WATCHDOG FUNCTION
I CWD	CWD pin charge current	CWD = 0.5 V	347	375	403	nA
V CWD	CWD pin threshold voltage		1.196	1.21	1.224	V
V OL	RESET, WDO output low	VDD = 5 V, I SINK = 3 mA			0.4	V
I D	RESET, WDO output leakage current	VDD = 1.6 V, V RESET, = V WDO = 6.5 V			1	μA
V IL	Low-level input voltage (SET0, SET1)				0.25	V
V IH	High-level input voltage (SET0, SET1)		0.8			V
V IL(WDI)	Low-level input voltage (WDI)				0.3 × V DD	V
V IH(WDI)	High-level input voltage (WDI)		0.8 × V DD			V
I SENSE		TPS3850Xyy(y), V SENSE = 5.0 V, VDD = 3.3 V		2.1	2.5	μA
I SENSE	SENSE pin idle current	TPS3850H01 only, V SENSE = 5.0 V, VDD = 3.3 V	-50		50	nA

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Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)

		MIN	MAX	UNIT
Supply voltage range	VDD	-0.3	7	V
Output voltage range	RESET, WDO	-0.3	7	V
Voltage ranges	SET0, SET1, WDI, SENSE	-0.3	7	V
Voltage ranges	CWD, CRST	-0.3	VDD + 0.3 (3)	V
Output pin current	RESET, WDO		±20	mA
Input current (all pins)	Input current (all pins)		±20	mA
Continuous total power dissipation	Continuous total power dissipation	See Section 6.4	See Section 6.4
Temperature	Operating junction, T J (2)	-40	150	°C
Temperature	Operating free-air temperature, T A (2)	-40	150	°C
Temperature	Storage, T stg	-65	150	°C

(2) TJ = TA as a result of the low dissipated power in this device.

(3) The absolute maximum rating is VDD + 0.3 V or 7.0 V, whichever is smaller.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
VDD	Supply pin voltage	1.6		6.5	V
V SENSE	Input pin voltage	0		6.5	V
V SET0	SET0 pin voltage	0		6.5	V
V SET1	SET1 pin voltage	0		6.5	V
C CRST	RESET delay capacitor	0.1 (1)		1000 (1)	nF
CRST	Pullup resistor to VDD	9	10	11	kΩ
C CWD	Watchdog timing capacitor	0.1 (2)		1000 (2)	nF
CWD	Pullup resistor to VDD	9	10	11	kΩ
R PU	Pullup resistor, RESET and WDO	1	10	100	kΩ
I RST	RESET pin current			10	mA
I WDO	Watchdog output current			10	mA
T J	Junction Temperature	-40		125	°C

Thermal Information

THERMAL METRIC (1)	THERMAL METRIC (1)	TPS3850 DRC (VSON) 10 PINS	UNIT
R θJA	Junction-to-ambient thermal resistance	52.3	°C/W
R θJC(top)	Junction-to-case (top) thermal resistance	59.7	°C/W
R θJB	Junction-to-board thermal resistance	26.1	°C/W
ψ JT	Junction-to-top characterization parameter	1.7	°C/W
ψ JB	Junction-to-board characterization parameter	26	°C/W
R θJC(bot)	Junction-to-case (bottom) thermal resistance	9.7	°C/W

Typical Application

The following sections describe in detail proper device implementation, depending on the final application requirements.

Related Variants

The following components are covered by the same datasheet.

Part Number	Manufacturer	Package
TPS3850	Texas Instruments	—
TPS3850-Q1	Texas Instruments	—
TPS3850G12	Texas Instruments	—
TPS3850XYY	Texas Instruments	—

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