TPS25940A
eFuse Power SwitchThe TPS25940A is a efuse power switch from Texas Instruments. View the full TPS25940A datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
TPS25940A shares its datasheet with TPS25940, whose page lists every part number it covers.
Official TPS25940A datasheet (PDF) — the source this page was extracted from.
TPS25940A Key Specifications
| Parameter | Value |
|---|---|
| Accuracy | ±8% |
| Output Current | 5.3A |
| Function | Electronic Fuse |
| Mounting Type | Surface Mount |
| Operating Temperature | -40°C ~ 125°C (TJ) |
| Package / Case | 20-WFQFN Exposed Pad |
| Packaging | MouseReel |
| Standard Pack Qty | 3000 |
| Supplier Device Package | 20-WQFN (4x3) |
| Input Voltage Range | 2.7V ~ 18V |
TPS25940A Overview
Part: TPS25940A / TPS25940L (TPS25940ARVCR) — Texas Instruments
Type: eFuse Power Switch with True Reverse Current Blocking and DevSleep Support
Description: 2.7–18 V eFuse with 42 mΩ typical RON, 0.6–5.3 A adjustable current limit (±8%), true reverse current blocking and a 95 μA DevSleep mode for SSD/HDD power management.
Operating Conditions:
- Supply voltage (IN): 2.7–18 V
- Operating junction temperature: -40 to 125 °C
- ILIM resistor range: 16.9–150 kΩ; minimum OUT capacitance 0.1 μF; maximum dVdT capacitance 470 nF
Absolute Maximum Ratings:
- Max input voltage (IN, OUT, PGTH, PGOOD, EN/UVLO, OVP, DEVSLP, FLT): 20 V (22 V for 10 ms transient on IN)
- Sink current (PGOOD, FLT, dVdT): 10 mA
- Max junction temperature: 150 °C
- Storage temperature: -65 to 150 °C
- ESD: HBM ±2000 V, CDM ±500 V
Key Specs:
- RON (IN to OUT): 42 mΩ typ; 26–64 mΩ over -40 to 125 °C (1 A ≤ I(OUT) ≤ 5 A)
- Current limit: 4.45 A typ at R(ILIM) = 20 kΩ (4.09–4.81 A); 0.58 A typ at 150 kΩ; 5.2 A typ at 16.9 kΩ
- Supply current, enabled: 199 μA typ at V(IN) = 12 V (140–260 μA)
- Supply current, disabled: 15 μA typ at V(IN) = 12 V (max 20 μA)
- DevSleep supply current: 95 μA typ (70–130 μA); DevSleep current limit 0.67 A typ
- Internal UVLO rising threshold: 2.3 V typ (2.2–2.4 V), hysteresis 116 mV typ
- EN/UVLO and OVP rising thresholds: 0.99 V typ (0.97–1.01 V)
- IMON gain: 52.3 μA/A typ (1–5 A)
- Reverse protection threshold V(IN)−V(OUT): -9.3 mV typ (falling)
- dVdT charging current: 1 μA typ; dVdT-to-OUT gain 11.9 V/V typ
- Fast-trip threshold: 1.5 × I(LIM) + 0.375 A
Features:
- True reverse current blocking with 1 μs reverse voltage shutoff
- IMON current monitor output (±8%)
- Programmable dVo/dt output ramp control
- Adjustable overvoltage and undervoltage thresholds (±2%)
- PGOOD and FLT open-drain outputs
- Open/short ILIM detection (UL60950 single point failure safe)
- UL 2367 recognized (File No. 169910; R(ILIM) ≥ 20 kΩ, 4.81 A max)
- TPS25940A is auto-retry; TPS25940L is latched
Applications:
- PCIe/SATA/SAS HDD and SSD drives
- Enterprise and micro servers
- RAID cards, holdup power management
- Set-top boxes, DTVs and game consoles
- Telecom switches and routers
- Adapter powered devices
- Smart load switch
Package:
- WQFN (20), RVC, 3.00 mm × 4.00 mm
TPS25940A Features
- Precise current monitor output for health monitoring of the system
- Additional power good comparator with precision internal reference for output or any other rail voltage monitoring
- Over temperature protection to safely shutdown in the event of an overcurrent event
- De-glitched fault reporting for brown-out and overvoltage faults
- A choice of latched or automatic restart mode
TPS25940A Applications
- PCIe/SATA/SAS HDD and SSD Drives
The TPS25940 eFuse Power Switch is a compact, feature rich power management device with a full suite of protection functions, including a low power DevSleep™ mode that supports compliance with the SATA™ Device Sleep standard. The wide operating range allows control of many popular DC bus voltages. Integrated back to back FETs provide bidirectional current control making the device well suited for systems with load side holdup energy that must not drain back to a failed supply bus.
Load, source and device protection are provided with many programmable features including overcurrent, dVo/dt ramp and overvoltage, undervoltage thresholds. For system status monitoring and downstream load control, the device provides PGOOD, FLT and precise current monitor output. Precise programmable undervoltage, overvoltage thresholds and the low IQ DevSleep mode simplify SSD power management design.
The TPS25940 monitors V(IN) and V(OUT) to provide true reverse current blocking when V(IN) < (V(OUT) - 10 mV). This function supports swift changeover to a boosted voltage energy storage element in systems where backup voltage is greater than bus voltage.
TPS25940A Pin Configuration
TPS25940 RVC PACKAGE (TOP VIEW)
TPS25940A Electrical Characteristics
Conditions are -40°C ≤ TJ=TA ≤ 125°C, 2.7 V ≤ V(IN) = 18 V, V(EN/UVLO) = 2 V, V(OVP) = V(DEVSLP) = V(PGTH) = 0 V, R(ILIM) = 150 k Ω , C(OUT) = 1 μF, C(dVdT) = OPEN, PGOOD = FLT = IMON = OPEN. Positive current into terminals. All voltages referenced to GND (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY VOLTAGE AND INTERNAL UNDERVOLTAGE LOCKOUT | SUPPLY VOLTAGE AND INTERNAL UNDERVOLTAGE LOCKOUT | SUPPLY VOLTAGE AND INTERNAL UNDERVOLTAGE LOCKOUT | SUPPLY VOLTAGE AND INTERNAL UNDERVOLTAGE LOCKOUT | SUPPLY VOLTAGE AND INTERNAL UNDERVOLTAGE LOCKOUT | SUPPLY VOLTAGE AND INTERNAL UNDERVOLTAGE LOCKOUT | SUPPLY VOLTAGE AND INTERNAL UNDERVOLTAGE LOCKOUT |
| V (IN) | Operating Input Voltage | 2.7 | 18 | V | ||
| V (UVR) | Internal UVLO threshold, rising | 2.2 | 2.3 | 2.4 | V | |
| V (UVRhys) | Internal UVLO hysteresis | 105 | 116 | 125 | mV | |
| V (EN/UVLO) = 2 V, V (IN) = 3 V | 140 | 210 | 300 | |||
| I Q(ON) | Supply current, Enabled | V (EN/UVLO) = 2 V, V (IN) = 12 V | 140 | 199 | 260 | μA |
| V (EN/UVLO) = 2 V, V (IN) = 18 V | 140 | 202 | 270 | |||
| V (EN/UVLO) = 0 V, V (IN) = 3 V | 4 | 8.6 | 15 | |||
| I Q(OFF) | Supply current, Disabled | V (EN/UVLO) = 0 V, V (IN) = 12 V | 6 | 15 | 20 | μA |
| V (EN/UVLO) = 0 V, V (IN) = 18 V | 8 | 18.5 | 25 | |||
| I Q(DEVSLP) | Supply current, DevSleep Mode | V (DEVSLP) = 0 V, V (IN) = 2.7V to 18V | 70 | 95 | 130 | μA |
| ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT | ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT | ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT | ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT | ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT | ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT | ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT |
| V (ENR) | EN/UVLO threshold voltage, rising | 0.97 | 0.99 | 1.01 | V | |
| V (ENF) | EN/UVLO threshold voltage, falling | 0.9 | 0.92 | 0.94 | V | |
| V (SHUTF) | EN threshold voltage for Low I Q shutdown, falling | 0.3 | 0.47 | 0.63 | V | |
| V (SHUTFhys) | EN hysteresis for low I Q shutdown, hysteresis (1) | 66 | mV | |||
| I EN | EN Input leakage current | 0 V ≤ V (EN/UVLO) ≤ 18 V | -100 | 0 | 100 | nA |
| OVER VOLTAGE PROTECTION (OVP) INPUT | OVER VOLTAGE PROTECTION (OVP) INPUT | OVER VOLTAGE PROTECTION (OVP) INPUT | OVER VOLTAGE PROTECTION (OVP) INPUT | OVER VOLTAGE PROTECTION (OVP) INPUT | OVER VOLTAGE PROTECTION (OVP) INPUT | OVER VOLTAGE PROTECTION (OVP) INPUT |
| V (OVPR) | Overvoltage Threshold Voltage, Rising, | 0.97 | 0.99 | 1.01 | V | |
| V (OVPF) | Overvoltage Threshold Voltage, Falling | 0.9 | 0.92 | 0.94 | V | |
| I (OVP) | OVP Input Leakage Current | 0 V ≤ V (OVP) ≤ 5 V | -100 | 0 | 100 | nA |
| DEVSLP MODE INPUT (DEVSLP): ACTIVE HIGH | DEVSLP MODE INPUT (DEVSLP): ACTIVE HIGH | DEVSLP MODE INPUT (DEVSLP): ACTIVE HIGH | DEVSLP MODE INPUT (DEVSLP): ACTIVE HIGH | DEVSLP MODE INPUT (DEVSLP): ACTIVE HIGH | DEVSLP MODE INPUT (DEVSLP): ACTIVE HIGH | DEVSLP MODE INPUT (DEVSLP): ACTIVE HIGH |
| V (DEVSLPR) | DEVSLP threshold voltage, rising | 1.6 | 1.85 | 2 | V | |
| V (DEVSLPF) | DEVSLP threshold voltage, falling | 0.8 | 0.96 | 1.1 | V | |
| I (DEVSLP) | DEVSLP input leakage current | 0.2 V ≤ V (DEVSLP) ≤ 18 V | 0.6 | 1 | 1.25 | μA |
| OUTPUT RAMP CONTROL (dVdT) | OUTPUT RAMP CONTROL (dVdT) | OUTPUT RAMP CONTROL (dVdT) | OUTPUT RAMP CONTROL (dVdT) | OUTPUT RAMP CONTROL (dVdT) | OUTPUT RAMP CONTROL (dVdT) | OUTPUT RAMP CONTROL (dVdT) |
| I (dVdT) | dVdT charging current | V (dVdT) = 0 V | 0.85 | 1 | 1.15 | μA |
| R (dVdT) | dVdT discharging resistance | EN/UVLO = 0 V, I (dVdT) = 10 mA sinking | 16 | 24 | Ω | |
| V (dVdTmax) | dVdT maximum capacitor voltage | 2.6 | 2.88 | 3.1 | V | |
| GAIN (dVdT) | dVdT to OUT gain | Δ V (OUT)/ Δ V (dVdT) | 11.65 | 11.9 | 12.05 | V/V |
| CURRENT LIMIT PROGRAMMING (ILIM) | CURRENT LIMIT PROGRAMMING (ILIM) | CURRENT LIMIT PROGRAMMING (ILIM) | CURRENT LIMIT PROGRAMMING (ILIM) | CURRENT LIMIT PROGRAMMING (ILIM) | CURRENT LIMIT PROGRAMMING (ILIM) | CURRENT LIMIT PROGRAMMING (ILIM) |
| V (ILIM) | ILIM bias voltage | 0.87 | V | |||
| R (ILIM) = 150 k Ω , (V (IN) - V (OUT) ) = 1 V | 0.53 | 0.58 | 0.63 | |||
| R (ILIM) = 88.7 k Ω , (V (IN) - V (OUT) ) = 1 V | 0.9 | 0.99 | 1.07 | |||
| R (ILIM) = 42.2 k Ω , (V (IN) - V (OUT) ) = 1 V | 1.92 | 2.08 | 2.25 | |||
| R (ILIM) = 24.9 k Ω , (V (IN) - V (OUT) ) = 1 V | 3.25 | 3.53 | 3.81 | |||
| I (LIM) | Current limit (2) | R (ILIM) = 20 k Ω , (V (IN) - V (OUT) ) = 1 V | 4.09 | 4.45 | 4.81 | A |
| R (ILIM) = 16.9 k Ω , (V (IN) - V (OUT) ) = 1 V | 4.78 | 5.2 | 5.62 | |||
| R (ILIM) = OPEN, Open resistor current limit (Single Point Failure Test: UL60950) | 0.35 | 0.45 | 0.55 | |||
| R (ILIM) = SHORT, Shorted resistor current limit (Single Point Failure Test: UL60950) | 0.55 | 0.67 | 0.8 | |||
| I (DEVSLP(LIM)) | DevSleep Mode Current Limit | 0.55 | 0.67 | 0.8 | A |
TPS25940A Absolute Maximum Ratings
over operating temperature range (unless otherwise noted) (1)
| VALUE - MIN | VALUE - MAX | UNIT | ||
|---|---|---|---|---|
| Input voltage range | IN, OUT, PGTH, PGOOD, EN/UVLO, OVP, DEVSLP, FLT | -0.3 | 20 | V |
| Input voltage range | IN (10 ms Transient) | 22 | V | |
| Input voltage range | dVdT, ILIM | -0.3 | 3.6 | V |
| Input voltage range | IMON | -0.3 | 7 | V |
| Sink current | PGOOD, FLT, dVdT | 10 | mA | |
| Source current | dVdT, ILIM, IMON | Internally Limited | Internally Limited | |
| Maximum junction, T J | Maximum junction, T J | -40 | 150 | °C |
| Storage temperature range, T stg | Storage temperature range, T stg | -65 | 150 | °C |
| Continuous power dissipation | Continuous power dissipation | See the Thermal Characteristics (2) | See the Thermal Characteristics (2) | See the Thermal Characteristics (2) |
TPS25940A Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| Input | IN | 2.7 | 18 | V | |
| Input | EN/UVLO, OVP, DEVSLP, OUT, PGTH, PGOOD, FLT | 0 | 18 | V | |
| Input | dVdT, ILIM | 0 | 3 | V | |
| Input | IMON | 0 | 6 | V | |
| ILIM | 16.9 | 150 | k Ω | ||
| IMON | 1 | k Ω | |||
| External | OUT | 0.1 | μF | ||
| External | dVdT | 470 | nF | ||
| Operating junction temperature range, T J | Operating junction temperature range, T J | -40 | 25 | 125 | °C |
TPS25940A Thermal Information
| THERMAL METRIC | THERMAL METRIC | TPS25940 RVC (20) PINS | UNIT |
|---|---|---|---|
| R θ JA | Junction-to-ambient thermal resistance | 38.1 | °C/W |
| R θ JCtop | Junction-to-case (top) thermal resistance | 40.5 | °C/W |
| R θ JB | Junction-to-board thermal resistance | 13.6 | °C/W |
| ψ JT | Junction-to-top characterization parameter | 0.6 | °C/W |
| ψ JB | Junction-to-board characterization parameter | 13.7 | °C/W |
| R θ JCbot | Junction-to-case (bottom) thermal resistance | 3.4 | °C/W |
TPS25940A Typical Application
The TPS25940 is a smart eFuse. It is typically used for Hot-Swap and Power rail protection applications. It operates from 2.7 V to 18 V with programmable current limit, overvoltage and undervoltage protection. The device aids in controlling the in-rush current and provides fast turn-off during reverse voltage conditions for systems such as Enterprise SSDs, HDDs, Servers, Power Back-up Storage units and RAID cards. The device also provides robust protection for multiple faults on the sub-system rail.
The following design procedure can be used to select component values for the device.
Alternatively, the WEBENCH® software may be used to generate a complete design. The WEBENCH® software uses an iterative design procedure and accesses a comprehensive database of components when generating a design. Additionally, a spreadsheet design tool TPS25940 Design Calculator is available on web folder.
This section presents a simplified discussion of the design process.
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| TPS25940 | Texas Instruments | WQFN-20 3.0x4.0mm |
| TPS25940A/L | Texas Instruments | WQFN-20 3.0x4.0mm |
| TPS25940ARVCR | Texas Instruments | 20-WFQFN Exposed Pad |
| TPS25940ARVCT | Texas Instruments | WQFN-20 3.0x4.0mm |
| TPS25940L | Texas Instruments | WQFN-20 3.0x4.0mm |
| TPS25940LRVCR | Texas Instruments | WQFN-20 3.0x4.0mm |
| TPS25940LRVCT | Texas Instruments | WQFN-20 3.0x4.0mm |
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