TMP1075DR

Part: Texas Instruments TMP1075

Type: Digital Temperature Sensor

Description: The TMP1075 is a digital temperature sensor with I2C and SMBus interface, offering ±1°C maximum accuracy from -40°C to 110°C, 12-bit resolution, and a wide supply range from 1.62V to 5.5V.

Operating Conditions:

• Supply voltage: 1.62 V to 5.5 V
• Operating temperature: -55 °C to 125 °C
• SCL operating frequency: Up to 2.56 MHz (High-Speed Mode for TMP1075), Up to 2.85 MHz (High-Speed Mode for TMP1075N)
• Resolution: 12 Bits

Absolute Maximum Ratings:

• Max supply voltage: 6.5 V (TMP1075), 4 V (TMP1075N)
• Max junction temperature: 150 °C
• Max storage temperature: 130 °C

Key Specs:

• Temperature accuracy: ±1 °C (maximum) from -40 °C to 110 °C (TMP1075, DGK, D packages)
• Temperature accuracy: ±2 °C (maximum) from -55 °C to 125 °C (TMP1075, DGK, D packages)
• Quiescent current (serial bus inactive): 2.7 µA (typical, R1=1, R0=1)
• Shutdown current: 0.37 µA
• Digital interface: SMBus, I2C
• SCL operating frequency: 0.001 MHz to 2.56 MHz (High-Speed Mode, TMP1075)
• Supported I2C addresses: Up to 32
• Temperature resolution: 0.0625 °C (from 12-bit ADC)

Features:

• Temperature accuracy: ±0.25°C (typical) from -55°C to 125°C
• Low power consumption: 2.7μA Average current
• Supply range options from: 1.62V to 5.5V
• Temperature independent of supply
• Digital interface: SMBus, I2C
• Software compatibility with industry standard LM75 and TMP75
• Can coexist in I3C mixed fast mode bus
• Resolution: 12 Bits
• Supports up to 32 I2C addresses
• ALERT pin function
• NIST traceability

Applications:

• Power-supply temperature monitoring
• Connected peripherals & printers
• PC and notebooks
• Mobile phones
• Battery management
• Enterprise machine
• Thermostat
• Wireless environmental sensor and HVAC
• Electro mechanical device temperature

Package:

• VSSOP (DGK, 8)
• SOIC (D, 8)
• WSON (DSG, 8)
• SOT563 (DRL, 6)

• Temperature accuracy:
  • ±0.25°C (typical) from -55°C to 125°C
  • ±1°C (maximum) from -40 °C to 110°C
  • ±2°C (maximum) from -55°C to 125°C
• Low power consumption:
  • 2.7μA Average current
  • 0.37μA Shutdown current
• Supply range options from: 1.62V to 5.5V
• Temperature independent of supply
• Digital interface: SMBus, I²C
• Software compatibility with industry standard LM75 and TMP75
• Can coexist in I³C mixed fast mode bus
• Resolution: 12 Bits
• Supports up to 32 I2C addresses
• ALERT pin function
• NIST traceability

• Power-supply temperature monitoring
• Connected peripherals & printers
• PC and notebooks
• Mobile phones
• Battery management
• Enterprise machine
• Thermostat
• Wireless environmental sensor and HVAC
• Electro mechanical device temperature

3 Description

The TMP1075 is the most accurate and lowest power replacement to the industry standard LM75 and TMP75 digital temperature sensors. Available in SOIC-8, VSSOP-8, WSON-8, and SOT563-6 packages, the TMP1075 offers pin-to-pin and software compatibility to quickly upgrade any existing xx75 design. The TMP1075 additional new packages are a 2.0mm × 2.0mm DFN and a 1.6mm × 1.6mm SOT563-6 reducing the printed circuit board (PCB) footprint by 82% and 89% compared to the SOIC package, respectively.

The TMP1075 has a ±1°C accuracy over a wide temperature range and offers an on-chip 12bit analog-to-digital converter (ADC) providing a temperature resolution of 0.0625°C.

Compatible with two-wire SMBus and I²C interfaces, the TMP1075 support up to 32 device addresses and provides SMBus Reset and Alert function.

The TMP1075 D, DGK, and DSG packages are specified for operation over a temperature range of -55°C to 125°C and the TMP1075N DRL package is specified over the -40°C to 125°C temperature range.

The TMP1075 units are 100% tested on a production setup that is NIST traceable and verified with equipment that is calibrated to ISO/IEC 17025 accredited standards.

Figure 5-1. D Package 8-Pin SOIC Top View

Figure 5-2. DGK Package 8-Pin VSSOP Top View

• 1. Pin 1 is determined by orienting the package marking as indicated in the diagram.
• 1. Referred to as the TMP1075N orderable throughout the document.

Figure 5-4. DRL Package 6-Pin SOT563 Top View

Figure 5-3. DSG Package 8-Pin WSON Top View

Table 5-1. Pin Functions

(1) I = Input, O = Output, I/O = Input or Output

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

⁽¹⁾ Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

6.2 ESD Ratings

• (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
• (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

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6.4 Thermal Information

⁽¹⁾ For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics:TMP1075

at TA = –55°C to +125°C and V+ = 1.7 V to 5.5 V (unless noted); typical specification are at TA = 25°C and V+=3.3 V

| | PARAMETER | | TEST CONDITIONS | MIN | TYP | MAX | UNIT | | IQ | Quiescent current (serial bus inactive) | | R1 = 0, R0 = 0 (default) | | 10 | 20 | µA | | | | | R1 = 0, R0 = 1 | | 5.5 | 9 | µA | | | | | R1 = 1, R0 = 0 | | 4 | 6 | µA | | | | | R1 = 1, R0 = 1 | | 2.7 | 4 | µA | | |---|---|---|---|---|---|---|---| | | TEMPERATURE INPUT | | | | | | | | | Range | | –40°C to 110°C | –55 | | 125 | °C | | | Accuracy | DGK, D | –40°C to 110°C | | ±0.25 | ±1 | °C | | | (temperature error) | | –55°C to 125°C | | ±0.25 | ±2 | °C | | | | DSG | –40°C to 75°C

at TA = –55°C to +125°C and V+ = 1.7 V to 5.5 V (unless noted); typical specification are at TA = 25°C and V+=3.3 V

• (1) Repeatability is the ability to reproduce a reading when the measured temperature is applied consecutively, under the same conditions.
• (2) One-shot mode setup, 1 sample per minute for 24 hours.
• (3) Long-term drift is determined using accelerated operational life testing at a junction temperature of 150°C.

6.6 Electrical Characteristics: TMP1075N

At T^A = 25 °C and V+ = 1.62 to 3.6 V (unless otherwise noted)

| | | | MIN | MAX | MIN | MAX | UNIT | | t(SUSTA) | Repeated START condition setup time | 600 | | 160 | | ns | | t(SUSTO) | STOP condition setup time | 600 | | 160 | | ns | | t(HDDAT) | Data hold time(2) | 100 | 900 | 25 | 105 | ns | | t(SUDAT) | Data setup time | 100 | | 25 | | ns |

6.7 Timing Requirements:TMP1075

minimum and maximum specifications are over –55°C to 125°C and V+ = 1.7 V to 5.5 V (unless otherwise noted)(1)

⁽¹⁾ The host and device have the same V+ value. Values are based on statistical analysis of samples tested during initial release.

⁽²⁾ The maximum t(HDDAT) can be 0.9 μs for fast mode, and is less than the maximum t(VDAT) by a transition time.

⁽³⁾ t(VDAT) = time for data signal from SCL LOW to SDA output (HIGH to LOW, depending on which is worse).

6.8 Timing Requirements: TMP1075N

minimum and maximum specifications are over –40°C to 125°C and V+ = 1.62 V to 3.6 V (unless otherwise noted)(1)

| | | FAST MODE | | HIGH-SPEED MODE | | |---|---|:---:|:---:|:---:|:---:|:---:| | | | MIN | MAX | MIN | MAX | UNIT | | f(SCL) | SCL operating frequency | 0.001 | 0.4 | 0.001 | 2.85 | MHz | | t(BUF) | Bus-free time between STOP and START conditions | 600 | | 160 | | ns | | t(HDSTA) | Hold time after repeated START condition.
After this period, the first clock is generated. | 600 | | 160 | | ns | | t(SUSTA) | Repeated START condition setup time | 600 | | 160 | | ns | | t(SUSTO) | STOP condition setup time | 600 | | 160 | | ns | | t(HDDAT) | Data hold time$^{(2)}$ | 100 | 900 | 25 | 105 | ns | | t(SUDAT) | Data setup time | 100 | | 25 | | ns | | t(LOW) | SCL clock low period | 1300 | | 210 | | ns | | t(HIGH) | SCL clock high period | 600 | | 60 | | ns | | tFD | Data fall time | | 300 | | 80 | ns | | tRD | Data rise time | | 300 | | | ns | | | SCLK ≤100 kHz | | 1000 | | | ns | | tRC | Clock rise time | | 300 | | 40 | ns | | tFC | Clock fall time | | 300 | | 40 | ns | | ttimeout | Timeout (SCL = SDA = GND) | 30 | 40 | 30 | 40 | ms |

⁽¹⁾ The host and device have the same V+ value. Values are based on statistical analysis of samples tested during initial release.

6.9 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)

6.10 Timing Diagrams

Figure 6-1. Two-Wire Timing Diagram

⁽²⁾ The maximum t(HDDAT) can be 0.9 μs for fast mode, and is less than the maximum t(VDAT) by a transition time.

6.11 Typical Characteristics

at TA = 25°C, V+ = 3.3 V, and apply to D, DGK, and DSG packages (unless otherwise noted)

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Figure 6-8. Supply Current vs. I2C Bus Clock and Supply Voltage in Shutdown Mode

Figure 6-9. ALERT Pin Output Voltage vs. Sink Current

Figure 6-10. Sampling Period Change vs. Temperature (1.7 V to 5.5 V)

7 Detailed Description

7.1 Overview

The TMP1075 device is a digital temperature sensor that is designed for thermal management and thermal protection applications. The TMP1075 is a SMBus and is I2C interface-compatible. The device is also capable of coexisting in an I3C bus when in Mixed Fast Mode. The TMP1075 non-N orderables are specified over a temperature range of -55°C to 125°C and the TMP1075N orderable is specified over the -40°C to 125°C temperature range. Figure 7-1 shows an internal block diagram of TMP1075 device.

The temperature sensor thermal path runs through the package leads as well as the plastic package. The leads provide the primary thermal path due to the lower thermal resistance of the metal.

7.2 Functional Block Diagram

*Pin is not available on TMP1075N

** ESD Diode only in TMP1075N

Figure 7-1. Functional Block Diagram

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7.3 Feature Description

7.3.1 Digital Temperature Output

The digital output from each temperature measurement conversion is stored in the read-only temperature register. Which is a 12-bit, read-only register that stores the output of the most recent conversion. Two bytes must be read to obtain data. However, only the first 12 MSBs are used to indicate temperature while the remaining 4 LSB are set to zero. Table 7-1 lists the data format for the temperature. Negative numbers are represented in binary two's-complement format. After power-up or reset, the temperature register reads 0°C until the first conversion is complete.

7.3.2 I ²C and SMBus Serial Interface

The TMP1075 operates as a target device on the two-wire, SMBus and I2C interface-compatible bus. Connections to the bus are made through the open-drain I/O line SDA and SCL input pin. The SDA and SCL pins feature integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP1075 supports the transmission protocol for fast mode up to 400 kHz and high-speed mode up to 2.56 MHz. All data bytes are transmitted MSB first.

7.3.2.1 Bus Overview

The device that initiates the data transfer is called a host, and the devices controlled by the host are the target. The bus must be controlled by a host device that generates the SCL that controls the bus access and generates the START and STOP conditions.

To address a specific device, a START condition is initiated. This is indicated by the host pulling the data line SDA from a high to low logic level when SCL is high. All target devices on the bus shift in the device address byte on the rising edge of the clock with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the device being addressed responds to the host by generating an Acknowledge and pulling SDA low.

Data transfer is then initiated and sent over eight clock pulses followed by an Acknowledge bit. During data transfer, SDA must remain stable when SCL is high because any change in SDA when SCL is high is interpreted as a control signal.

When all data are transferred, the host generates a STOP condition indicated by pulling SDA from low to high logic level when SCL is high.

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7.3.2.2 Serial Bus Address

To communicate with the TMP1075, the host must first address devices through an address byte. The device address byte consists of seven address bits and a direction bit indicating the intent of executing a read or write operation.

The TMP1075 features three address pins to allow up to 32 devices (TMP1075N: 4) to be addressed on a single bus interface. Table 7-2 and Table 7-3 describe the pin logic levels used to configure the TMP1075 I2C address. The state of pins A0, A1, and A2 is sampled on every bus communication and must be set prior to any activity on the interface.

Table 7-3. TMP1075N Address Pins State

7.3.2.3 Pointer Register

Figure 7-2 shows the internal register structure of the TMP1075, and Table 7-5 lists the pointer addresses of the register map. Table 7-4 shows that the register map reset value of the pointer register is 00h.

^* Not available on TMP1075N package

Figure 7-2. Internal Register Structure

7.3.2.3.1 Pointer Register Byte [reset = 00h]

Table 7-4. Pointer Register Byte

7.3.2.4 Writing and Reading to the TMP1075

Accessing a particular register on the TMP1075 device is accomplished by writing the appropriate value to the pointer register. After Reset, the register value is set to zero. The value for the pointer register is the first byte transferred after the device address byte with the R/W bit low. Every write operation to the TMP1075 requires a value for the pointer register (see Figure 7-3).

When reading from the TMP1075 device, the last value stored in the pointer register by a write operation is used to determine which register is read by a read operation. To change the register pointer for a read operation, a new value must be written to the pointer register. This action is accomplished by issuing a device address byte with the R/ W bit low, followed by the pointer register byte. No additional data are required. The host can then generate a START condition and send the device address byte with the R/ W bit high to initiate the read command. See Figure 7-5 for details of this sequence. If repeated reads from the same register are desired, the pointer register bytes do not have to be continually sent because the TMP1075 remembers the pointer register value until the value is changed by the next write operation.

Register bytes are sent MSB first.

7.3.2.5 Operation Mode

The TMP1075 can operate as a receiver or transmitter. As a target device, the TMP1075 never drives the SCL line.

7.3.2.5.1 Receiver Mode

The first byte transmitted by the host is the device address with the R/W bit low. The TMP1075 then acknowledges reception of a valid address. The next byte transmitted by the host is the pointer register. The TMP1075 then acknowledges reception of the pointer register byte. The next byte or bytes are written to the register addressed by the pointer register. The TMP1075 acknowledges reception of each data byte. The host can terminate data transfer by generating a START or STOP condition.

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7.3.2.5.2 Transmitter Mode

The first byte is transmitted by the host and is the device address, with the R/W bit high. The target device acknowledges reception of a valid device address. The next byte is transmitted by the device and is the most significant byte of the register indicated by the Pointer register. The host acknowledges reception of the data byte. The next byte transmitted by the device is the least significant byte. The host acknowledges reception of the data byte. The host can terminate data transfer by generating a Not-Acknowledge on reception of any data byte, or generating a START or STOP condition.

7.3.2.6 SMBus Alert Function

The TMP1075 supports the SMBus Alert function. When the TMP1075 is operating in interrupt mode (TM = 1), the ALERT pin of the TMP1075 can be connected as an SMBus Alert signal. When a host senses that an alert condition is present on the ALERT line, the host sends an SMBus Alert command (00011001) on the bus. If the ALERT pin of the TMP1075 is active, the devices acknowledge the SMBus Alert command and respond by returning the device address on the SDA line. The eighth bit (LSB) of the device address byte indicates if the temperature exceeding THIGH or falling below TLOW caused the alert condition. This bit is equal to POL if the temperature is greater than or equal to THIGH. This bit is equal to POL if the temperature is less than TLOW. See Figure 7-8 for details of this sequence.

If multiple devices on the bus respond to the SMBus Alert command, arbitration during the device address portion of the SMBus Alert command determines which device clears the alert status. If the TMP1075 wins the arbitration, the ALERT pin becomes inactive at the completion of the SMBus Alert command. If the TMP1075 loses the arbitration, the ALERT pin remains active.

7.3.2.7 General Call- Reset Function

The TMP1075 responds to the two-wire general call address (0000 000) if the eighth bit is 0. The device acknowledges the general call address and responds to commands in the second byte. If the second byte is 00000 110, the TMP1075 resets the internal registers to the power-up reset values.

7.3.2.8 High-Speed Mode (HS)

For the two-wire bus to operate at frequencies above 400 kHz, the host device must issue an HS mode host code (00001XXX) as the first byte after a START condition to switch the bus to high-speed operation. The TMP1075 device does not acknowledge this byte, but the device does switch the input filters on the SDA and SCL and the output filters on the SDA to operate in HS mode. After the HS mode host code is issued, the host transmits a two-wire device address to initiate a data transfer operation. The bus continues to operate in HS mode until a STOP condition occurs on the bus. Upon receiving the STOP condition, the TMP1075 switches the input and output filters back to fast-mode operation.

7.3.2.9 Coexists in I3C Mixed Fast Mode

A bus with both I3C and I2C interfaces is referred to as a mixed fast mode with clock speeds up to 12.5 MHz. For the TMP1075, which is an I2C device, to coexist in the same bus, the device incorporated a spike suppression filter of 50 ns on the SDA and SCL pins to avoid any interference to the bus when communicating with I3C devices.

7.3.2.10 Time-Out Function

The TMP1075 resets the serial interface if SCL is held low by the host or SDA is held low by the TMP1075 for 25 ms (TMP1075N: 30 ms) (typical) between a START and STOP condition. The TMP1075 releases the SDA bus and waits for a START condition. To avoid activating the time-out function, a communication speed of at least 1 kHz must be maintained.

7.3.3 Timing Diagrams

The TMP1075 is two-wire SMBus and I2C interface-compatible. Figure 7-3 to Figure 7-8 describe the various operations on the TMP1075. The following list provides bus definitions.

Product Folder Links: TMP1075

Bus Idle: Both SDA and SCL lines remain high.

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Start Data Transfer: A change in the state of the SDA line from high to low when the SCL line is high defines a START condition. Each data transfer is initiated with a START condition.

Stop Data Transfer: A change in the state of the SDA line from low to high when the SCL line is high defines a STOP condition. Each data transfer is terminated with a repeated START or STOP condition.

Data Transfer: The number of data bytes transferred between a START and a STOP condition is not limited and is determined by the host device. The receiver acknowledges the transfer of data.

Acknowledge: Each receiving device, when addressed, is obliged to generate an Acknowledge bit. A device that acknowledges must pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the Acknowledge clock pulse. Setup and hold times must be taken into account. On a host receive, the termination of the data transfer can be signaled by the host generating a Not-Acknowledge on the last byte that is transmitted by the target device.

7.3.4 Two-Wire Timing Diagrams

Figure 7-3. Two-Wire Timing Diagram for Write Word Format

Figure 7-4. Two-Wire Timing Diagram for Write Single Byte Format

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Figure 7-5. Two-Wire Timing Diagram for Read Word Format

Figure 7-6. Two-Wire Timing Diagram for Read Single Byte Format

Figure 7-7. General-Call Reset Command Timing Diagram

Figure 7-8. Timing Diagram for SMBus Alert

7.4 Device Functional Modes

7.4.1 Shutdown Mode (SD)

Shutdown mode (SD) of the TMP1075 device allows the user to conserve power by shutting down all device circuitry except the serial interface, which significantly reduces the current consumption. SD is initiated when the SD bit in the configuration register is set to 1. When SD is equal to 0, the device stays in continuous conversion mode.

7.4.2 One-Shot Mode (OS)

The TMP1075 features a one-shot mode (OS) temperature measurement. When the device is in shutdown mode, writing 1 to the OS bit starts a single temperature conversion. The device returns to the shutdown state at the completion of the single conversion. This feature is useful to reduce power consumption in the TMP1075 when continuous temperature monitoring is not required.

When the configuration register is read, the OS bit always reads 0 on TMP1075 non-N orderables. On the TMP1075N orderable, the OS bit reads back 0 during the one-shot conversion and 1 after the conversion cycle.

7.4.3 Continuous Conversion Mode (CC)

When the device is operating in continuous conversion mode (SD=0), every conversion cycle consists of an active conversion, followed by a standby (see Figure 7-9). The device consumes a higher current during an active conversion, and lower current during standby. Active conversion time is 5.5 ms (TMP1075N: 10 ms) before the part goes in standby. Table 7-8 shows the list of conversion cycle configured using [R1:R0] bits in the configuration register.

Figure 7-9. Conversion Rate Diagram

Product Folder Links: TMP1075

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7.4.4 Thermostat Mode (TM)

The thermostat mode bit indicates whether ALERT pin operates in comparator mode (TM = 0) or interrupt mode (TM = 1). ALERT pin mode is controlled by TM (bit 9) of the configuration register. Any write to the TM bit changes the ALERT pin to a none active condition, clears the faults count, and clears the alert interrupt history on the TMP1075 non-N orderables. The ALERT pin can be disabled in both comparator and interrupt modes if both limit registers are set to the rail values TLOW = –128°C and THIGH = +127.9375°C on the TMP1075 non-N orderables.

7.4.4.1 Comparator Mode (TM = 0)

In comparator mode (TM = 0), the ALERT pin becomes active when the temperature equals or exceeds the value in THIGH for a consecutive number of Fault Queue bits [F1:F0]. The ALERT pin remains active until the temperature falls below the indicated TLOW value for the same number of faults.

The difference between the two limits acts as a hysteresis on the comparator output, and a fault counter prevents false alerts as a result of system noise. The SMBus Alert response function is ignored in the comparator mode.

7.4.4.2 Interrupt Mode (TM = 1)

In interrupt mode (TM = 1), the device starts to compare temperature readings with the high limit register value. The ALERT pin becomes active when the temperature equals or exceeds THIGH for a consecutive number of conversions as set by the Fault Queue bits [F1:F0]. The ALERT pin remains active until the pin is cleared by one of three events: a read of any register, a successful SMBus Alert response, or a shutdown command. After the ALERT pin is cleared, the device starts to compare temperature readings with the TLOW. The ALERT pin becomes active again only when the temperature drops below TLOW for a consecutive number of conversions as set by the Fault Queue bits. The ALERT pin remains active until cleared by any of the same three clearing events. After the ALERT pin is cleared by one of the events, the cycle repeats and the device resumes to compare the temperature to THIGH. The interrupt mode history is cleared by a change in the TM=0 bit, setting the device to SD mode, or resetting the device on the TMP1075 non-N orderables.

7.4.4.3 Polarity Mode (POL)

The polarity bit allows the user to adjust the polarity of the ALERT pin output. If the POL bit is set to 0 (default), the ALERT pin becomes active low. When POL bit is set to 1, the ALERT pin becomes active high and the state of the ALERT pin is inverted. Figure 7-10 shows the operation of the ALERT pin in various modes.

Figure 7-10. Output Transfer Function Diagrams

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7.5 Register Map

Table 7-5. TMP1075 Register Map

(1) Device ID register not available on TMP1075N

Note

TMP1075 Configuration register supports single byte read and write for software compatibility with xx75 standard temperature sensors.

7.5.1 Register Descriptions

Table 7-6. TMP1075 Access Type Codes

7.5.1.1 Temperature Register (address = 00h) [default reset = 0000h]

The temperature register of the TMP1075 is a 12-bit, read-only register that stores the result of the most recent conversion (see Figure 7-11). Data is represented in binary two's complement format. The first 12 bits are used to indicate temperature, with all remaining bits equal to zero. The least significant byte does not have to be read if that information is not needed. Following power-up or reset, the temperature register value is 0°C until the first conversion is complete.

Figure 7-11. Temperature Register

Table 7-7. Temperature Register Field Description

7.5.1.2 Configuration Register (address = 01h) [default reset = 00FFh (60A0h TMP1075N)]

The configuration register is an 16-bit read/write register used to store bits that control the operational modes of the temperature sensor. Read and write operations are performed MSB first. Figure 7-12 shows the format of the configuration register for the TMP1075, followed by a breakdown of the register bits. The power-up or reset value of the configuration register are all bits equal to 00FFh (TMP1075N: 60A0h). Only single byte writes and reads must be used when pointing to the configuration register for proper operation on the TMP1075N orderable.

Figure 7-12. Configuration Register: TMP1075

Figure 7-13. Configuration Register: TMP1075N

Table 7-8. Configuration Register Field Description

Note

The configuration register supports single-byte read and write over I2C bus to verify software compatibility with other xx75 standard temperature sensors like TMP75 and LM75. When a single byte write is performed, the data byte on the I2C bus updates the register bits 15-8. Similarly when a single byte read is performed, the data bits 15-8 is transferred over the I2C bus.

7.5.1.3 Low Limit Register (address = 02h) [default reset = 4B00h]

The register is configured as a 12-bit, read/write register and data is represented in two's complement format. Figure 7-14 shows the layout for TLOW is the same as the temperature register. The default reset value is 4B00h and corresponds to 75°C.

Figure 7-14. Low Limit Register

Table 7-9. Low Limit Register Field Description

7.5.1.4 High Limit Register (address = 03h) [default reset = 5000h]

The register is configured as a 12-bit, read/write register and data is represented in two's complement format. Figure 7-15 show the layout for THIGH is the same as the temperature register. The default reset value is 5000h and corresponds to 80°C.

Figure 7-15. High Limit Register

Table 7-10. High Limit Register Field Description

7.5.1.5 Device ID Register (address = 0Fh) [default reset = 7500]

Figure 7-16 shows this read-only register reads the device ID, and this register only available on the TMP1075 non-N orderables.

Figure 7-16. Device ID Register

Table 7-11. Device ID Register Field Description

8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

8.1 Application Information

The TMP1075 can measure the PCB temperature of the location where the user mounts the device. The TMP1075 features two-wire SMBus and I2C interface compatibility, with the TMP1075 allowing up to 32 (TMP1075N: 4) devices on one bus. The TMP1075 requires a pullup resistor on the SDA pin, and if needed, on the SCL and ALERT pins. A 0.01-μF bypass capacitor is also required (see Figure 8-1 ).

8.2 Typical Application

Figure 8-1. Typical Connections

8.2.1 Design Requirements

The recommended value for the pullup resistor is 5 kΩ. In some applications, the pullup resistor can be lower or higher than 5 kΩ, but the maximum current through the pullup current is recommended to not exceed 3 mA on the SCL and SDA pins. The SCL, SDA, A0, and A1, lines can be pulled up to a supply that is higher than V+. The ALERT line can be pulled up to a supply higher than V+ on the TMP1075 non-N orderables. The A2 pin can only be connected to GND or V+. When the ALERT pin is not used, the pin can either be connected GND or left floating.

8.2.2 Detailed Design Procedure

Place the TMP1075 device in close proximity to the heat source that must be monitored with a proper layout for good thermal coupling. This placement verifies that temperature changes are captured within the shortest possible time interval. To maintain accuracy in applications that require air or surface temperature measurement, take care to isolate the package and leads from ambient air temperature. A thermally-conductive adhesive is helpful in achieving accurate surface temperature measurement.

8.2.2.1 Migrating From the xx75 Device Family

The TMP1075 is designed specifically to be a pin-to-pin compatible replacement with xx75 family of devices. This includes considerations for software compatibility. The two byte registers of the TMP1075 dynamically support single byte read or write, meaning that replacing older xx75 standard temperature sensors do not require any updates to existing code.

8.2.3 Application Curve

For application curves, see Table 8-1:

Table 8-1. Table of Graphs

8.3 Power Supply Recommendations

The TMP1075 D, DGK, and DSG packages operate with a power supply in the range of 1.7 V to 5.5 V (TMP1075N DRL package operates from 1.62 V to 3.6 V). A power-supply bypass capacitor is required for precision and stability. Place this power-supply bypass capacitor as close to the supply and ground pins of the device as possible. A typical value for this supply bypass capacitor is 0.01 μF. Applications with noisy or high-impedance power supplies can require a bigger bypass capacitor to reject power-supply noise.

For minimizing device self-heating and improving temperature precision, TI recommends to:

• Use the minimum supply voltage rail available
• Avoid communication over I2C bus during ADC conversion
• Use one-shot mode to minimize power consumption
• Set I2C signal levels VIL close to ground and VIH above 90% of V+
• Maintain the I2C bus signals positive edge less than 1 μs by using a pullup resistor < 10 kΩ
• Connect the address pins A0 and A1 to either ground or V+

8.4 Layout

8.4.1 Layout Guidelines

Place the power-supply bypass capacitor as close to the supply and ground pins as possible. The recommended value of this bypass capacitor is 0.01 μF. Pullup the open-drain output pins SDA and ALERT through 5-kΩ pullup resistors. The SCL requires a pullup resistor only if the microprocessor output is open drain.

8.4.2 Layout Example

Figure 8-2. Layout Example (D Package)

Figure 8-3. Layout Example (DGK Package)

Figure 8-4. Layout Example (DSG Package)

Figure 8-5. Layout Example (DRL Package)

9 Device and Documentation Support

9.1 Documentation Support

9.1.1 Related Documentation

For related documentation see the following:

• Texas Instruments, TMP102 Low-Power Digital Temperature Sensor With SMBus and Two-Wire Serial Interface in SOT563, data sheet
• Texas Instruments, TMP112x High-Accuracy, Low-Power, Digital Temperature Sensors With SMBus and TwoWire Serial Interface in SOT563, data sheet
• Texas Instruments, TMP110 Ultra-Small, ±1.0°C Accurate, I2C Digital Temperature Sensor for Cost-Sensitive Systems, data sheet
• Texas Instruments, TMP LM 75 Comparison Common FAQs, application note

9.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

9.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

9.4 Trademarks

TI E2E™ is a trademark of Texas Instruments.

All trademarks are the property of their respective owners.

9.5 Electrostatic Discharge Caution

•

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

10 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (August 2021) to Revision F (June 2024) Page • Changed all instances of legacy terminology to controller and target where I2C is mentioned......................... 1 • Updated the number format for tables, figures, and cross-references throughout the document......................1 • Changed the "Conversion time" for TMP1075N throughout the document........................................................1 • Changed the shutdown and average current for TMP1075N throughout the document....................................1 • Changed DRL package Thermal Information section.........................................................................................6 • Changed "Conversion time" for TMP1075N in Electrical Characteristics table..................................................7 • Changed Average current consumption for TMP1075N in Electrical Characteristics table................................7 • Changed Shutdown current for TMP1075N in Electrical Characteristics table.................................................. 7 • Added Two-Wire Timing Diagram.......................................................................................................................9

Product Folder Links: TMP1075

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 29

• Changed conversion rate of TMP1075N from 35 ms to 250 ms .....................................................................22

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 7-Apr-2026

PACKAGING INFORMATION

⁽¹⁾ Status: For more details on status, see our product life cycle.

⁽²⁾ Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind.

⁽³⁾ RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition.

⁽⁴⁾ Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width.

⁽⁵⁾ MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board.

at TA = –55°C to +125°C and V+ = 1.7 V to 5.5 V (unless noted); typical specification are at TA = 25°C and V+=3.3 V

| | PARAMETER | | TEST CONDITIONS | MIN | TYP | MAX | UNIT | | IQ | Quiescent current (serial bus inactive) | | R1 = 0, R0 = 0 (default) | | 10 | 20 | µA | | | | | R1 = 0, R0 = 1 | | 5.5 | 9 | µA | | | | | R1 = 1, R0 = 0 | | 4 | 6 | µA | | | | | R1 = 1, R0 = 1 | | 2.7 | 4 | µA | | |---|---|---|---|---|---|---|---| | | TEMPERATURE INPUT | | | | | | | | | Range | | –40°C to 110°C | –55 | | 125 | °C | | | Accuracy | DGK, D | –40°C to 110°C | | ±0.25 | ±1 | °C | | | (temperature error) | | –55°C to 125°C | | ±0.25 | ±2 | °C | | | | DSG | –40°C to 75°C

at TA = –55°C to +125°C and V+ = 1.7 V to 5.5 V (unless noted); typical specification are at TA = 25°C and V+=3.3 V

• (1) Repeatability is the ability to reproduce a reading when the measured temperature is applied consecutively, under the same conditions.
• (2) One-shot mode setup, 1 sample per minute for 24 hours.
• (3) Long-term drift is determined using accelerated operational life testing at a junction temperature of 150°C.

over operating free-air temperature range (unless otherwise noted)(1)

⁽¹⁾ Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

over operating free-air temperature range (unless otherwise noted)

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TMP1075

⁽¹⁾ For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

The TMP1075 can measure the PCB temperature of the location where the user mounts the device. The TMP1075 features two-wire SMBus and I2C interface compatibility, with the TMP1075 allowing up to 32 (TMP1075N: 4) devices on one bus. The TMP1075 requires a pullup resistor on the SDA pin, and if needed, on the SCL and ALERT pins. A 0.01-μF bypass capacitor is also required (see Figure 8-1 ).

• For more information, see Section 11.
• The package size (length × width) is a nominal value and (2) includes pins, where applicable.
• Available as the TMP1075N orderable.

Simplified Schematic

DGK and D packages

Temperature Accuracy