TLV320AIC3104

Part: TLV320AIC3104 — Texas Instruments

Type: Low-Power Stereo Audio Codec

Description: Low-power stereo audio codec with 8–96 kHz DAC and ADC sample rates, 102 dBA DAC SNR, 92 dBA ADC SNR, a stereo headphone amplifier, and 14 mW stereo 48 kHz playback from a 3.3 V analog supply.

Operating Conditions:

• Analog supply (AVDD, DRVDD): 2.7–3.6 V
• Digital core supply (DVDD): 1.525–1.95 V
• Digital I/O supply (IOVDD): 1.1–3.6 V
• Operating free-air temperature: -40 to 85 °C
• Analog full-scale 0 dB input: 0.707 V RMS (DRVDD = 3.3 V)

Absolute Maximum Ratings:

• AVDD to AVSS, DRVDD to DRVSS: -0.3 to 3.9 V
• IOVDD to DVSS: -0.3 to 3.9 V
• DVDD to DVSS: -0.3 to 2.5 V
• Digital input voltage: -0.3 V to IOVDD + 0.3 V
• Analog input voltage: -0.3 V to AVDD + 0.3 V
• Max junction temperature: 105 °C
• Storage temperature: -65 to 105 °C
• ESD: ±2000 V HBM, ±1500 V CDM

Key Specs:

• DAC SNR: 102 dBA
• ADC SNR: 92 dBA
• Sample rates: 8 kHz to 96 kHz (DAC and ADC)
• Stereo 48 kHz playback power: 14 mW at 3.3 V analog supply
• Data word length: 16, 20, 24 or 32 bit
• Microphone preamp/AGC analog gain: up to 59.5 dB
• Thermal impedance RθJA: 44 °C/W
• MCLK range: 512 kHz to 50 MHz (via PLL)

Features:

• Stereo audio DAC with 3D, bass, treble, EQ and de-emphasis effects
• Stereo audio ADC with digital signal processing and noise filtering during record
• Six audio inputs: one stereo single-ended pair and one stereo fully differential pair
• Six audio output drivers: stereo differential or single-ended headphone drivers and fully differential stereo line outputs
• Ultra-low-power mode with passive analog bypass
• Automatic gain control (AGC) with programmable attack (8–1,408 ms) and decay (0.05–22.4 s)
• Programmable microphone bias level
• Programmable PLL for flexible clock generation
• I2C control bus
• Audio serial bus supports I2S, left-justified, right-justified, DSP and TDM modes
• Extensive modular power control

Applications:

• Headsets
• IP network cameras
• IP telephones
• Wireless speakers

Package:

• VQFN-32 (RHB), 5 mm × 5 mm

• Stereo audio DAC:
• -102-dBA signal-to-noise ratio
• -16-, 20-, 24-, or 32-bit data
• -Supports sample rates from 8 kHz to 96 kHz
• -3D, bass, treble, EQ, or de-emphasis effects
• -Flexible power saving modes and performance are available
• Stereo audio ADC:
• -92-dBA signal-to-noise ratio
• -Supports sample rates from 8 kHz to 96 kHz
• -Digital signal processing and noise filtering available during record
• Six audio input pins:
• -One stereo pair of single-ended inputs
• -One stereo pair of fully differential inputs
• Six audio output drivers:
• -Stereo fully differential or single-ended headphone drivers
• -Fully differential stereo line outputs
• Low power: 14-mW stereo 48-kHz playback with 3.3-V analog supply
• Ultra-low-power mode with passive analog bypass
• Programmable I/O analog gains
• Automatic gain control (AGC) for record
• Programmable microphone bias level
• Programmable PLL for flexible clock generation
• I 2 C control bus
• Audio serial data bus supports I 2 S, left- and rightjustified, DSP, and TDM modes
• Extensive modular power control
• Power supplies:
• -Analog: 2.7 V to 3.6 V
• -Digital Core: 1.525 V to 1.95 V
• -Digital I/O: 1.1 V to 3.6 V
• Package: 5-mm × 5-mm, 32-pin VQFN

• Headsets
• IP network cameras
• IP telephones
• Wireless speakers

NOTE: Connect device thermal pad to DRVSS.

Figure 7-1. RHB Package, 32-Pin (VQFN), Bottom View

Table 7-1. Pin Functions

P0048-01

At 25°C, AVDD = DRVDD = IOVDD = 3.3 V, DVDD = 1.8 V, fS = 48 kHz, 16-bit audio data (unless otherwise noted)

At 25°C, AVDD = DRVDD = IOVDD = 3.3 V, DVDD = 1.8 V, fS = 48 kHz, 16-bit audio data (unless otherwise noted)

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At 25°C, AVDD = DRVDD = IOVDD = 3.3 V, DVDD = 1.8 V, fS = 48 kHz, 16-bit audio data (unless otherwise noted)

At 25°C, AVDD = DRVDD = IOVDD = 3.3 V, DVDD = 1.8 V, fS = 48 kHz, 16-bit audio data (unless otherwise noted)

At 25°C, AVDD = DRVDD = IOVDD = 3.3 V, DVDD = 1.8 V, fS = 48 kHz, 16-bit audio data (unless otherwise noted)

At 25°C, AVDD = DRVDD = IOVDD = 3.3 V, DVDD = 1.8 V, fS = 48 kHz, 16-bit audio data (unless otherwise noted)

• (5) When IOVDD < 1.6 V, minimum VIH is 1.1 V.
• (6) Additional power is consumed when the PLL is powered.

over operating free-air temperature range (unless otherwise noted) (1) (2)

over operating free-air temperature range (unless otherwise noted)

The TLV320AIC3104 is a highly integrated low-power stereo audio codec with integrated stereo headphone or line amplifier, as well as multiple inputs and outputs that are programmable in single-ended or fully differential configurations. All the features of the TLV320AIC3104 are accessed by programmable registers. External processor with I2C protocol is required to control the device. It is good practice to perform a hardware reset after initial power up to ensure that all registers are in their default states. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 14-mW from a 3.3-V analog supply, making it ideal for portable battery-powered audio and telephony applications.