TCAN1043NQ1
The TCAN1043NQ1 is an electronic component from Texas Instruments. View the full TCAN1043NQ1 datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
CAN Transceivers
Overview
The TCAN1043N-Q1 is a high-speed Controller Area Network (CAN) transceiver that meets the physical layer requirements of the ISO 11898-2:2024 highspeed CAN specification. The device supports both classical CAN and CAN FD data rates up to 8 megabits per second (Mbps).
The TCAN1043N-Q1 allows for system-level reductions in battery current consumption by selectively enabling the various power supplies that may be present on a system via the INH output pin. This allows a low-current sleep state in which power is gated to all system components except for the TCAN1043N-Q1, while monitoring the CAN bus. When a wake-up event is detected, the TCAN1043NQ1 initiates system start-up by driving INH high.
Features
- AEC Q100 Qualified for automotive applications
- Functional Safety-Capable
- -Documentation available to aid in functional safety system design
- Meets the requirements of ISO 11898-2:2024
- Wide input operational voltage range
- Supports classic CAN and CAN FD up to 8 Mbps
- VIO level shifting supports: 1.7V to 5.5V
- Operating modes:
- -Normal mode
- -Silent mode
- -Standby mode
- -Low-power sleep mode
- High-voltage INH output for system power control
- Local wake-up support via the WAKE pin
- Defined behavior when unpowered
- -Bus and IO terminals are high impedance (no load to operating bus or application)
- Protection features:
- -±58V CAN bus fault tolerant
- -Load dump support on VSUP
- -IEC ESD protection
- -Under-voltage protection
- -Thermal shutdown protection
- -TXD dominant state timeout (TXD DTO)
- Available in 14-pin leaded (SOT and SOIC) packages and leadless (VSON) package with wettable flanks for improved automated optical inspection (AOI) capability
Applications
Pin Configuration
Figure 4-1. D and DYY Packages, 14 Pin (SOIC) and (SOT) (Top View)
Figure 4-1. D and DYY Packages, 14 Pin (SOIC) and (SOT) (Top View)
Figure 4-2. DMT Package, 14 Pin (VSON) (Top View)
| PINS | PINS | TYPE (1) | DESCRIPTION |
|---|---|---|---|
| NAME | NO. | TYPE (1) | DESCRIPTION |
| TXD | 1 | I | CAN transmit data input, integrated pull-up |
| GND | 2 | GND | Ground connection |
| V CC | 3 | P | 5 V transceiver supply |
| RXD | 4 | O | CAN receive data output, tri-state when V IO < UV IO |
| V IO | 5 | P | I/O supply voltage |
| EN | 6 | I | Enable input for mode control, integrated pull-down |
| INH | 7 | O | Inhibit pin to control system voltage regulators and supplies, high-voltage |
| nFAULT | 8 | O | Fault output, inverted logic |
| WAKE | 9 | I | Local WAKE input terminal, high voltage |
| V SUP | 10 | P | High-voltage supply from battery |
| NC | 11 | NC | No connect, internally not connected |
| CANL | 12 | I/O | Low-level CAN bus input/output line |
| CANH | 13 | I/O | High-level CAN bus input/output line |
| nSTB | 14 | I | Standby mode control input, integrated pull-down |
| Thermal Pad | - | - | Connect the thermal pad to the printed circuit board (PCB) ground plane for thermal relief |
- (1) I = input, O = output, P = power, GND = ground, NC = not connected
Electrical Characteristics
Over recommended operating conditions with TJ = -40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V, V CC = 5 V and R L = 60 Ω
| PARAMETER | PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|---|
| CAN Driver Characteristics | CAN Driver Characteristics | CAN Driver Characteristics | CAN Driver Characteristics | CAN Driver Characteristics | CAN Driver Characteristics | CAN Driver Characteristics | CAN Driver Characteristics |
| V | Dominant output voltage | CANH | TXD = 0 V, 50 ≤ R L ≤ 65 Ω, C L = open, R CM = | 2.75 | 4.5 | V | |
| CANH(D) | Bus biasing active | CANL | open See Figure 6-1 and Figure 6-4 | 0.5 | 2.25 | V | |
| V CANH(R) V CANL(R) | Recessive output voltage Bus biasing active, terminated | Recessive output voltage Bus biasing active, terminated | TXD = V IO , R L = 60 Ω , R CM = open See Figure 6-1 and Figure 6-4 | 2.137 | 2.887 | V | |
| V CANH(R) V CANL(R) | Recessive output voltage Bus biasing active | TXD = V IO , R L = open (no load), R CM = open See Figure 6-1 and Figure 6-4 | 2 | 3 | V | ||
| V SYM | Driver symmetry Bus biasing active (V O(CANH) + V O(CANL) ) / V CC | nSTB= V IO , R L = 60 Ω, C SPLIT = 4.7 nF, C L = Open, R CM = Open, TXD = 250 kHz, 1 MHz, 2.5 MHz See Figure 6-1 and Figure 6-4 | 0.9 | 1.1 | V/V | ||
| V SYM_DC | DC Driver symmetry Bus biasing active V CC - V O(CANH) - V O(CANL) | nSTB= V IO , R L = 60 Ω, C L = open See Figure 6-1 and Figure 6-4 | -400 | 400 | mV | ||
| V DIFF(D) | Differential output voltage Bus biasing active Dominant | CANH - CANL | nSTB =V IO , TXD = 0 V, 50 Ω ≤ R L ≤ 65 Ω, C L = open See Figure 6-1 and Figure 6-4 | 1.5 | 3 | V | |
| V DIFF(D) | CANH - CANL | nSTB =V IO , TXD = 0 V, 45 Ω ≤ R L ≤ 70 Ω, CL = open See Figure 6-1 and Figure 6-4 | 1.4 | 3.3 | V | ||
| V DIFF(D) | CANH - CANL | nSTB =V IO , TXD = 0 V, R L = 2240 Ω, C L = open See Figure 6-1 and Figure 6-4 | 1.5 | 5 | V | ||
| V DIFF(R) | Differential output voltage Bus biasing active Recessive | CANH - CANL | nSTB =V IO , TXD = V IO , R L = open Ω, C L = open See Figure 6-1 and Figure 6-4 | -50 | 50 | mV | |
| V | Bus output voltage with | CANH | nSTB = 0 V, TXD = V IO , R L = open (no load), C L = open See Figure 6-1 and Figure 6-4 | -0.1 | 0.1 | V | |
| CANH(INACT) | bus biasing inactive | CANL | nSTB = 0 V, TXD = V IO , R L = open (no load), C L = open See Figure 6-1 and Figure 6-4 | -0.1 | 0.1 | V | |
| CANH - CANL | nSTB = 0 V, TXD = V IO , R L = open (no load), C L = open See Figure 6-1 and Figure 6-4 | -0.2 | 0.2 | V | |||
| I CANL(OS) | Short-circuit steady-state output current Bus biasing active | Short-circuit steady-state output current Bus biasing active | nSTB = V IO , TXD = 0 V -15 V ≤ V (CANH) ≤ 40 V See Figure 6-1 and Figure 6-8 | -100 | mA | ||
| Dominant | Dominant | nSTB = V IO, TXD = 0 V -15 V ≤ V (CANL) ≤ 40 V See Figure 6-1 and Figure 6-8 | 100 | mA | |||
| I OS(REC) | Short-circuit steady-state output current Bus biasing active Recessive | Short-circuit steady-state output current Bus biasing active Recessive | nSTB = V IO , V BUS = CANH = CANL -27 V ≤ V BUS ≤ 42 V See Figure 6-1 and Figure 6-8 | -3 | 3 | mA | |
| CAN Receiver Characteristics | CAN Receiver Characteristics | CAN Receiver Characteristics | CAN Receiver Characteristics | CAN Receiver Characteristics | CAN Receiver Characteristics | CAN Receiver Characteristics | CAN Receiver Characteristics |
| V IT(DOM) | Receiver dominant state input voltage range Bus biasing active | Receiver dominant state input voltage range Bus biasing active | nSTB = V IO , -12 V ≤ V CM ≤ 12 V See Figure 6-5 and Table 7-6 | 0.9 | 8 | V | |
| V IT(REC) | Receiver recessive state input voltage range Bus biasing active | Receiver recessive state input voltage range Bus biasing active | -3 | 0.5 | V | ||
| V HYS | Hysteresis voltage for input threshold Bus biasing active | Hysteresis voltage for input threshold Bus biasing active | nSTB = V IO See Figure 6-5 and Table 7-6 | 140 | mV | ||
| V DIFF(DOM) | Receiver dominant state input voltage range Bus biasing inactive | Receiver dominant state input voltage range Bus biasing inactive | nSTB = 0 V, -12 V ≤ V CM ≤ 12 V See Figure 6-5 and Table 7-6 | 1.150 | 8 | V | |
| V DIFF(REC) | Receiver recessive state input voltage range Bus biasing inactive | Receiver recessive state input voltage range Bus biasing inactive | -3 | 0.4 | V |
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| V SUP | Supply voltage (2) | -0.3 | 45 | V |
| V CC | Supply voltage | -0.3 | 6 | V |
| V IO | Supply voltage I/O level shifter | -0.3 | 6 | V |
| V BUS | CAN bus I/O voltage (CANH, CANL) | -58 | 58 | V |
| V DIFF | CAN bus differential voltage (V DIFF = V CANH - V CANL | -58 | 58 | V |
| V WAKE | WAKE input voltage | -45 | 45 and V I ≤ V SUP +0.3 | V |
| V INH | INH pin voltage | -0.3 | 45 and V O ≤ V SUP +0.3 | V |
| V LOGIC | Logic pin voltage | -0.3 | 6 | V |
| I O(LOGIC) | Logic pin output current | 8 | mA | |
| I O(INH) | Inhibit pin output current | 6 | mA | |
| I O(WAKE) | WAKE pin output current | 3 | mA | |
| T J | Junction temperature | -40 | 165 | °C |
| T STG | Storage temperature | -65 | 150 | °C |
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| V SUP | Supply voltage | 4.5 | 40 | V | |
| V IO | I/O supply voltage | 1.7 | 5.5 | V | |
| V CC | CAN transceiver supply voltage | 4.5 | 5.5 | V | |
| I OH(DO) | Digital output high-level current | -2 | mA | ||
| I OL(DO) | Digital output low-level current | 2 | mA | ||
| I O(INH) | Inhibit output current | 1 | mA | ||
| T J | Operating junction temperature | -40 | 150 | °C | |
| T SDR | Thermal shutdown | 175 | °C | ||
| T SDF | Thermal shutdown release | 160 | °C | ||
| T SD(HYS) | Thermal shutdown hysteresis | 10 | 10 | 10 | °C |
Thermal Information
| TCAN1043N-Q1 | TCAN1043N-Q1 | TCAN1043N-Q1 | ||
|---|---|---|---|---|
| THERMAL METRIC (1) | THERMAL METRIC (1) | D (SOIC) | DMT (VSON) | DYY (SOT) |
| 14 PINS | 14 PINS | 14 PINS | ||
| R ΘJA | Junction-to-ambient thermal resistance | 87.1 | 39.7 | 91.0 |
| R ΘJC(top) | Junction-to-case (top) thermal resistance | 41.8 | 41.1 | 41.7 |
| R ΘJB | Junction-to-board thermal resistance | 43.7 | 15.9 | 25.6 |
| Ψ JT | Junction-to-top characterization parameter | 8.5 | 0.9 | 25.4 |
| Ψ JB | Junction-to-board characterization parameter | 43.3 | 15.9 | 1.1 |
| R ΘJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | 6.6 | N/A |
Typical Application
The TCAN1043N-Q1 transceiver is typically used in applications with a host microprocessor or FPGA that includes the data link layer portion of the CAN protocol. These types of applications usually also include power management technology that allows for power to be gated to the application via an enable (EN) or inhibit (INH) pin. A single 5V regulator can be used to drive both VCC and VIO, or independent 5V and 3.3V regulators can be used to drive VCC and VIO separately as shown in Figure 8-1. The bus termination is shown for illustrative purposes.
Package Information
| PART NUMBER | PACKAGE (1) | PACKAGE SIZE (2) |
|---|---|---|
| TCAN1043N-Q1 | SOT (DYY) (3) | 4.2mm x 3.26mm |
| TCAN1043N-Q1 | SOIC (D) (3) | 8.65mm x 6mm |
| TCAN1043N-Q1 | VSON (DMT) | 4.5mm x 3mm |
- (1) For more information, see Section 11.
- (2) The package size (length × width) is a nominal value and includes pins, where applicable.
- (3) Product Preview
Simplified Schematic
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| TCAN1043N | Texas Instruments | — |
| TCAN1043N-Q1 | Texas Instruments | — |
| TCAN1043NDMTRQ1 | Texas Instruments | 14-VDFN Exposed Pad |
| TCAN1043NDRQ1 | Texas Instruments | 14-SOIC (0.154", 3.90mm Width) |
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