STM32WBA52KG

Part: STM32WBA5xxx — STMicroelectronics

Type: Multiprotocol wireless 32-bit MCU

Description: 32-bit ARM Cortex-M33 MCU with TrustZone, FPU, Bluetooth LE and IEEE 802.15.4 radio, running at up to 100 MHz, with 1 Mbyte Flash and 128 Kbyte SRAM, operating from 1.71 to 3.6 V.

Operating Conditions:

• Supply voltage: 1.71 to 3.6 V
• Operating temperature: -40 to 85/105 °C (suffix-dependent — see datasheet for grade-specific ranges)
• Max CPU frequency: 100 MHz

Absolute Maximum Ratings:

• Max supply voltage: 4.0 V
• Max junction/storage temperature: 150 °C

Key Specs:

• Core: Arm Cortex-M33 with TrustZone, MPU, DSP, FPU
• Max CPU frequency: 100 MHz
• Flash memory: 1 Mbyte with ECC
• SRAM: 128 Kbyte with parity check
• Radio protocols: Bluetooth LE, IEEE 802.15.4-2015 (Thread, Matter, Zigbee)
• RX sensitivity: -96 dBm (Bluetooth LE at 1 Mbps), -97.5 dBm (IEEE 802.15.4 at 250 kbps)
• Programmable output power: up to +10 dBm
• ADC: 12-bit, 2.5 Msps
• Run mode current: 23 μA/MHz at 3.3 V

Features:

• Ultra-low power platform with FlexPowerControl
• Integrated balun for radio
• Isochronous channel (Auracast/Unicast), AOA/AOD, long range
• Embedded regulator LDO and SMPS step-down converter
• ART Accelerator: 8-Kbyte instruction cache
• Real time clock (RTC) with hardware calendar, alarms, and calibration
• Security: Arm TrustZone, AES co-processors, Public key accelerator, HASH accelerator, True random number generator, 96-bit unique ID, Active tampers
• Up to 35 I/Os (most 5 V-tolerant) with interrupt capability

Applications:

Package:

• UFQFPN32 (5 x 5 mm)
• UFQFPN48 (7 x 7 mm)
• WLCSP41 (2.76 x 2.98 mm)
• UFBGA59 (5 x 5 mm)

• Includes ST state-of-the-art patented technology

• Ultra-low power radio

• -2.4 GHz radio

• -RF transceiver supporting Bluetooth ® LE, IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee ®

• -RX sensitivity: -96 dBm (Bluetooth ® LE at 1 Mbps), -97.5 dBm (IEEE 802.15.4 at 250 kbps)

• -Programmable output power, +10 dBm with 1 dB steps

• -Support for external PA

• -Isochronous channel (Auracast/Unicast), AOA/AOD, long range

• -Packet traffic arbitration

• -Integrated balun to reduce BOM

• -Single crystal operation

• -Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66

• Bluetooth ® LE

• -LE 2M

• -LE coded

• -Direction finding

• -LE power control

• -Isochronous channels

• -Extended and periodic advertising

• -LE secure connections

• -LE audio

• -Mesh networking

• -Core Specification 6.0

• Operating conditions:

• -1.71 to 3.6 V power supply

• --40 to 85/105°C temperature range

• -Internal low frequency 32 kHz RC (500 ppm/°C)

• -Internal 16 MHz factory trimmed RC (±1%)

• -PLL for system clock, audio, and ADC

• Memories

• -1 Mbyte flash memory with ECC, including 256 Kbytes with 100k cycles

• -128-Kbyte SRAM, including 64 KB with parity check

• -512-byte (32 rows) OTP

• Rich analog peripherals (independent supply)

• -12-bit ADC 2.5 Msps, up to 16-bit with hardware oversampling

• -Two ultra-low power comparators

• Communication peripherals

• -One SAI (serial audio interface)

• -Three UARTs (ISO 7816, IrDA, modem)

• -Two SPIs

• -Two I2C Fm+ (1 Mbit/s), SMBus/PMBus ®

• System peripherals

• -Touch sensing controller, up to 20 sensors, supporting touch key, linear, and rotary touch sensors

• -One 16-bit, advanced motor control timer

• -Three 16-bit timers

• -One 32-bit timer

• -Two low-power 16-bit timers (available in Stop mode)

• -Two Systick timers

• -Two watchdogs

• -8-channel DMA controller, functional in Stop mode

• Security and cryptography

• -Arm ® TrustZone ® and securable I/Os, memories, and peripherals

• -Flexible life cycle scheme with RDP and password protected debug

• -Root of trust thanks to unique boot entry and secure hide protection area (HDP)

• -SFI (secure firmware installation) thanks to embedded RSS (root secure services)

• -Secure data storage with root hardware unique key (RHUK)

• -Secure firmware upgrade support with TF-M

• -Two AES co-processors, including one with DPA resistance

• -Public key accelerator, DPA resistant

• -HASH hardware accelerator

• -True random number generator, NIST SP800-90B compliant

• -96-bit unique ID

• -Active tampers

• -CRC calculation unit

• General purpose input/output:

• -Up to 35 I/Os (most of them 5 V-tolerant) with interrupt capability

• Development support

• -Serial wire debug (SWD), JTAG

• ECOPACK2 compliant packages

Table 1. Device summary

Table 1. Device summary

Figure 7. UFQFPN32 pinout (1) (2)

1. The above figure shows the package top view.
2. The exposed pad must be connected to ground plane.

Unless otherwise specified, the parameters given in Table 78 are at ambient temperature and under the supply voltage conditions summarized in Table 31 .

The definition and values of output AC characteristics are given, respectively, in Figure 23 and in Table 78 .

Table 78. Output AC characteristics (1)(2)

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Table 78. Output AC characteristics (1)(2) (continued)

1. PB15 and PH3 output and input frequency must not exceed 16 kHz, PC14 and PC15 output and input frequency must not exceed 250 kHz, for these IOs OSPEED must be kept at low speed.
2. The I/O speed is configured using the OSPEED bits, Fm+ is configured in SYSCFG. Refer to the product reference manual for the description.
3. I/O compensation system enabled.
4. The fall time is defined between 70% and 30% of the output waveform according to the I 2 C specification.

Figure 23. Output AC characteristics definition

Stresses above the absolute maximum ratings listed in Table 27 , Table 28 , and Table 29 can cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods can affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended mission profiles are available on demand.

Table 27. Voltage characteristics (1)

1. VIN maximum must always be respected. Refer to Table 28 for the maximum allowed injected current values.

2. To sustain a voltage higher than 4 V, the internal pull-up/pull-down resistors must be disabled.

3. This formula applies only to power supplies related to the I/O structure described by the pin definition table. The maximum I/O input voltage is the smallest value between min (V DD , V DDA ) + 4.0 V, and 6.0 V.

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Table 28. Current characteristics

1. Positive injection (when V IN > V DD ) is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
2. A negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer also to Table 27 for the maximum allowed input voltage values.
3. When several inputs are submitted to a current injection, the maximum ∑ |I INJ(PIN) | is the absolute sum of the negative injected currents (instantaneous values).

Table 29. Thermal characteristics

The maximum chip junction temperature (T J max) must never exceed the specified values.

T J max (in Celsius degrees), can be calculated using the equation:

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.