Skip to main content

STM32H743ZIT6

The STM32H743ZIT6 is an electronic component from STMicroelectronics. View the full STM32H743ZIT6 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.

Manufacturer

STMicroelectronics

Category

Integrated Circuits (ICs)

Package

144-LQFP

Lifecycle

Active

Key Specifications

ParameterValue
ConnectivityCANbus, EBI/EMI, Ethernet, I2C, IrDA, LINbus, MDIO, MMC/SD/SDIO, QSPI, SAI, SPDIF, SPI, SWPMI, UART/USART, USB OTG
Core ProcessorARM® Cortex®-M7
Core Size32-Bit
Data ConvertersA/D 36x16b; D/A 2x12b
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
Mounting TypeSurface Mount
Number of I/O114
Operating Temperature-40°C ~ 85°C (TA)
Oscillator TypeInternal
Oscillator TypeInternal
Oscillator TypeInternal
Package / Case144-LQFP
PackagingTray
PeripheralsBrown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT
Flash Memory Size2MB (2M x 8)
Program Memory TypeFLASH
RAM Size1M x 8 B
Clock Speed480MHz
Standard Pack Qty360
Supplier Device Package144-LQFP (20x20)
Supplier Device Package144-LQFP (20x20)
Supplier Device Package144-LQFP (20x20)
Supply Voltage1.62V ~ 3.6V

Overview

Part: STM32H743xI — STMicroelectronics

Type: ARM Cortex-M7 Microcontroller

Description: 32-bit ARM Cortex-M7 MCU running at up to 400 MHz with double-precision FPU, up to 2 MB Flash, 1 MB RAM, and a rich set of communication and analog interfaces.

Operating Conditions:

  • Supply voltage: 1.62 to 3.6 V
  • Max CPU frequency: 400 MHz

Absolute Maximum Ratings:

Key Specs:

  • Core: 32-bit Arm Cortex-M7 with double-precision FPU
  • Max CPU frequency: 400 MHz
  • Flash memory: Up to 2 Mbytes with read-while-write support
  • RAM: 1 Mbyte (192 Kbytes TCM, 864 Kbytes user SRAM, 4 Kbytes Backup SRAM)
  • I/O ports: Up to 168 with interrupt capability, up to 164 5 V-tolerant
  • ADC resolution: 16-bit max (14 bits 4 MSPS, 16 bits 3.6 MSPS)
  • DAC resolution: 12-bit (1 MHz)
  • Low-power consumption: Down to 4 μA total current consumption

Features:

  • L1 cache: 16 Kbytes data, 16 Kbytes instruction
  • Dual mode Quad-SPI memory interface up to 133 MHz
  • Flexible external memory controller (SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND Flash) up to 133 MHz
  • 4 DMA controllers (1 MDMA, 2 dual-port DMAs, 1 basic DMA)
  • Up to 35 communication peripherals (I2C, USART/UART, LPUART, SPI/I2S, SAI, SPDIFRX, SWPMI, MDIO, SD/SDIO/MMC, CAN FD, USB OTG, Ethernet MAC, HDMI-CEC, Camera interface)
  • 11 analog peripherals (temperature sensor, DACs, comparators, operational amplifiers, DFSDM, ADCs)
  • Graphics: LCD-TFT controller up to XGA, Chrom-ART graphical hardware Accelerator™, Hardware JPEG Codec
  • Up to 22 timers and watchdogs (high-resolution, 32-bit, 16-bit advanced motor control, 16-bit general-purpose, 16-bit low-power, watchdogs, SysTick, RTC)
  • Security features: ROP, PC-ROP, active tamper
  • Debug mode: SWD & JTAG interfaces, 4 Kbyte Embedded Trace Buffer
  • True random number generators

Applications:

Package:

  • TFBGA240+25 (14x14 mm)
  • TFBGA100 (8x8 mm)
  • UFBGA176+25 (10x10 mm)
  • UFBGA169 (7x7 mm)
  • LQFP208 (28x28 mm)
  • LQFP176 (24x24 mm)
  • LQFP144 (20x20 mm)
  • LQFP100 (14x14 mm)

Pin Configuration

Figure 3. LQFP100 pinout

  1. The above figure shows the package top view.

93

Figure 4. TFBGA100 pinout

  1. The above figure shows the package top view.

Figure 5. LQFP144 pinout

  1. The above figure shows the package top view.

93

Electrical Characteristics

Unless otherwise specified, the parameters given in Table 84 are derived from tests performed under the ambient temperature, f PCLK2 frequency and V DDA supply voltage conditions summarized in Table 23: General operating conditions .

Table 84. ADC characteristics (1)

SymbolParameterConditionsMinTypMaxUnit
V DDAAnalog power supply--1.62-3.6 DDAV
V REF+Positive reference voltageV DDA ≥ 2 VV DDA ≥ 2 V2-VV
V REF+Positive reference voltageV DDA < 2 VV DDA < 2 VV DDAV DDAV DDAV
V REF-Negative reference voltage--V SSAV SSAV SSAV
f ADCADC clock frequency2 V ≤ V DDA ≤ 3.3 VBOOST=1--36MHz
f ADCADC clock frequency2 V ≤ V DDA ≤ 3.3 VBOOST = 0--20MHz
f SSampling rate for Fast channels, BOOST = 1, f ADC = 36 MHz16-bit resolution16-bit resolution--3.60MSPS
f SSampling rate for Fast channels, BOOST = 1, f ADC = 36 MHz14-bit resolution14-bit resolution--4.00MSPS
f SSampling rate for Fast channels, BOOST = 1, f ADC = 36 MHz12-bit resolution12-bit resolution--4.50MSPS
f SSampling rate for Fast channels, BOOST = 1, f ADC = 36 MHz10-bit resolution10-bit resolution--5.00MSPS
f SSampling rate for Fast channels, BOOST = 1, f ADC = 36 MHz8-bit resolution8-bit resolution6.00MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 20 MHz16-bit resolution16-bit resolution--2.00MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 20 MHz14-bit resolution14-bit resolution--2.20MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 20 MHz12-bit resolution12-bit resolution--2.50MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 20 MHz10-bit resolution10-bit resolution--2.80MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 20 MHz8-bit resolution8-bit resolution3.30MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 10 MHz16-bit resolution16-bit resolution--1.00MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 10 MHz14-bit resolution14-bit resolution--1.00MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 10 MHz12-bit resolution12-bit resolution--1.00MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 10 MHz10-bit resolution10-bit resolution--1.00MSPS
f SSampling rate for Fast channels, BOOST = 0, f ADC = 10 MHz8-bit resolution8-bit resolution1.00MSPS

Table 84. ADC characteristics (1)

196

Table 84. ADC characteristics (1) (continued)

SymbolParameterConditionsMinTypMaxUnit
f TRIGExternal trigger frequencyf ADC = 36 MHz--3.6MHz
f TRIGExternal trigger frequency16-bit resolution--101/f ADC
V AIN (2)Conversion voltage range-0-V REF+V
V CMIVCommon mode input voltage-V REF /2 - 10%V REF /2V REF /2+ 10%
R AINExternal input impedanceSee Equation 1 for details--50
C ADCInternal sample and hold capacitor--4-pF
t ADCREG_ STUPADC LDO startup time--510μs
t STABADC power-up timeLDO already started111conversion cycle
t CALOffset and linearity calibration time-1638416384163841/f ADC
t OFF_CALOffset calibration time-1280128012801/f ADC
t LATRTrigger conversion latency for regular and injected channels without aborting the conversionCKMODE = 001.522.51/f ADC
t LATRTrigger conversion latency for regular and injected channels without aborting the conversionCKMODE = 01--21/f ADC
t LATRTrigger conversion latency for regular and injected channels without aborting the conversionCKMODE = 102.251/f ADC
t LATRTrigger conversion latency for regular and injected channels without aborting the conversionCKMODE = 112.1251/f ADC
t LATRINJTrigger conversion latency for regular and injected channels when a regular conversion is abortedCKMODE = 002.533.51/f ADC
t LATRINJTrigger conversion latency for regular and injected channels when a regular conversion is abortedCKMODE = 01--31/f ADC
t LATRINJTrigger conversion latency for regular and injected channels when a regular conversion is abortedCKMODE = 10--3.251/f ADC
t LATRINJTrigger conversion latency for regular and injected channels when a regular conversion is abortedCKMODE = 11--3.1251/f ADC
t SSampling time-1.5-640.51/f ADC
t CONVTotal conversion time (including sampling time)N-bit resolutiont S + 0.5 + N/2 (9 to 648 cycles in 14-bit mode)t S + 0.5 + N/2 (9 to 648 cycles in 14-bit mode)t S + 0.5 + N/2 (9 to 648 cycles in 14-bit mode)

Absolute Maximum Ratings

Stresses above the absolute maximum ratings listed in Table 20: Voltage characteristics , Table 21: Current characteristics , and Table 22: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and the functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Table 20. Voltage characteristics (1)

SymbolsRatingsMinMaxUnit
V DDX - V SSExternal main supply voltage (including V DD , V DDLDO , V DDA , V DD33USB , V BAT )- 0.34.0V
V IN (2)Input voltage on FT_xxx pinsV SS - 0.3Min(V DD , V DDA , V DD33USB , V BAT ) +4.0 (3)(4)V
Input voltage on TT_xx pinsV SS -0.34.0V
Input voltage on BOOT0 pinV SS9.0V
Input voltage on any other pinsV SS -0.34.0V
\∆ V DDX \Variations between different V DDX power pins of the same domain-
\V SSx -V SS \Variations between all the different ground pins-
  1. VIN maximum must always be respected. Refer to Table 57 for the maximum allowed injected current values.
  2. This formula has to be applied on power supplies related to the IO structure described by the pin definition table.
  3. To sustain a voltage higher than 4V the internal pull-up/pull-down resistors must be disabled.

Table 21. Current characteristics

Table 21. Current characteristics

SymbolsRatingsMaxUnit
Σ IV DDTotal current into sum of all V DD power lines (source) (1)620mA
Σ IV SSTotal current out of sum of all V SS ground lines (sink) (1)620mA
IV DDMaximum current into each V DD power pin (source) (1)100mA
IV SSMaximum current out of each V SS ground pin (sink) (1)100mA
I IOOutput current sunk by any I/O and control pin20mA
Σ I (PIN)Total output current sunk by sum of all I/Os and control pins (2)140mA
Σ I (PIN)Total output current sourced by sum of all I/Os and control pins (2)140mA
I INJ(PIN) (3)(4)Injected current on FT_xxx, TT_xx, RST and B pins except PA4, PA5- 5/+0mA
I INJ(PIN) (3)(4)Injected current on PA4, PA5- 0/0mA
Σ I INJ(PIN)Total injected current (sum of all I/Os and control pins) (5)±25mA
  1. All main power (V DD , V DDA , V DD33USB ) and ground (V SS , V SSA ) pins must always be connected to the external power supplies, in the permitted range.
  2. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count QFP packages.
  3. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
  4. A positive injection is induced by V IN >V DD while a negative injection is induced by V IN <V SS . I INJ(PIN) must never be exceeded. Refer also to Table 20: Voltage characteristics for the maximum allowed input voltage values.
  5. When several inputs are submitted to a current injection, the maximum ∑ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 22. Thermal characteristics

SymbolRatingsValueUnit
T STGStorage temperature range- 65 to +150°C
T JMaximum junction temperature125°C

196

Thermal Information

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max × Θ JA )

Package Information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at www.st.com. ECOPACK ® is an ST trademark.

Related Variants

The following components are covered by the same datasheet.

Part NumberManufacturerPackage
STM32H743AISTMicroelectronics
STM32H743BISTMicroelectronics
STM32H743IISTMicroelectronics
STM32H743VISTMicroelectronics
STM32H743XISTMicroelectronics
STM32H743XLSTMicroelectronicsTFBGA
STM32H743ZISTMicroelectronics
Data on this page is extracted from publicly available manufacturer datasheets using automated tools including AI. It may contain errors or omissions. Always verify specifications against the official manufacturer datasheet before making design or purchasing decisions. See our Terms of Service. Rights holders can submit a takedown request.

Get structured datasheet data via API

Get started free