Overview

Part: SN54HC245, SN74HC245 from Texas Instruments

Type: Octal Bus Transceivers With 3-State Outputs

Key Specs:

Operating Voltage Range: 2 V to 6 V
Max ICC: 80-μA
Typical tpd: 12 ns
Output Drive: ±6-mA at 5 V
Max Input Current: 1 μA

Features:

High-Current 3-State Outputs Drive Bus Lines Directly or Up to 15 LSTTL Loads
On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

Applications:

Servers
PCs and Notebooks
Network Switches
Wearable Health and Fitness Devices
Telecom Infrastructures
Electronic Points of Sale

Package:

DB (SSOP, 20): 7.20 mm × 5.30 mm
DW (SOIC, 20): 12.80 mm × 7.50 mm
N (PDIP, 20): 24.33 mm × 6.35 mm
NS (SO, 20): 12.60 mm × 5.30 mm
PW (TSSOP, 20): 6.50 mm × 4.40 mm

Features

Wide Operating Voltage Range of 2 V to 6 V
High-Current 3-State Outputs Drive Bus Lines Directly or Up to 15 LSTTL Loads
Low Power Consumption, 80-μA Max ICC
Typical tpd = 12 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 μA Max
On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

Applications

Servers
PCs and Notebooks
Network Switches
Wearable Health and Fitness Devices
Telecom Infrastructures
Electronic Points of Sale

Pin Configuration

Figure 5-1. DB, DGV, DW, N, J, W, or PW Package 20-Pin SSOP, TVSOP, SOIC, PDIP CDIP, CFP, or TSSOP Top View

Figure 5-2. FK Package 20-Pin LCCC Top View

	PIN	TVDE(1)	DESCRIPTION
NO.	NAME	- TYPE ⁽¹⁾	DESCRIPTION
1	DIR	I/O	Direction Pin
2	A1	I/O	A1 Input/Output
3	A2	I/O	A2 Input/Output
4	A3	I/O	A3 Input/Output
5	A4	I/O	A4 Input/Output
6	A5	I/O	A5 Input/Output
7	A6	I/O	A6 Input/Output
8	A7	I/O	A7 Input/Output
9	A8	I/O	A8 Input/Output
10	GND	_	Ground Pin
11	B8	I/O	B8 Input/Output
12	B7	I/O	B7 Input/Output
13	B6	I/O	B6 Input/Output
14	B5	I/O	B5 Input/Output
15	B4	I/O	B4 Input/Output
16	B3	I/O	B3 Input/Output
17	B2	I/O	B2 Input/Output
18	B1	I/O	B1 Input/Output
19	OE	I/O	Output Enable
20	VCC	_	Power Pin

(1) Signal Types: I = Input, O = Output, I/O = Input or Output

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

			MIN	MAX	UNIT
VCC	Supply voltage		−0.5	7	V
IIK	Input clamp current(2)	VI < 0 or VI > VCC		±20	mA
IOK	Output clamp current(2)	VO < 0 or VO > VCC		±20	mA
IO	Continuous output current	VO = 0 to VCC		±35	mA
	Continuous current through VCC or GND			±70	mA
Tstg	Storage temperature		–65	150	°C
TJ	Junction Temperature			150	°C

⁽¹⁾ Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
		Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)	±3000
V(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22- C101(2)	±1000	V

⁽¹⁾ JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)

| | | | | SN54HC245 | | SN74HC245 | |-------|-------------------------------------|-------------|------|-----------|------|-----------|-----|------|------| | | | | MIN | NOM | MAX | MIN | NOM | MAX | UNIT | | VCC | Supply voltage | | 2 | 5 | 6 | 2 | 5 | 6 | V | | | | VCC = 2 V | 1.5 | | | 1.5 | | VIH | High-level input voltage | VCC = 4.5 V | 3.15 | | | 3.15 | | | V | | | | VCC = 6 V | 4.2 | | | 4.2 | | | | VCC = 2 V | | | 0.5 | | | 0.5 | | VIL | Low-level input voltage | VCC = 4.5 V | | | 1.35 | | | 1.35 | V | | | | VCC = 6 V | | | 1.8 | | | 1.8 | | VI | Input voltage | | 0 | | VCC | 0 | | VCC | V | | VO | Output voltage | | 0 | | VCC | 0 | | VCC | V | | | | VCC = 2 V | | | 1000 | | | 1000 | | ∆t/∆v | Input transition rise and fall time | VCC = 4.5 V | | | 500 | | | 500 | ns | | | | VCC = 6 V | | | 400 | | | 400 | | TA | Operating free-air temperature | | –55 | | 125 | –40 | | 85 | °C |

⁽¹⁾ All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

⁽²⁾ The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

⁽²⁾ JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.4 Thermal Information

| | | SNx4HC245 | |-----------------------|----------------------------------------------|--------------|--------------|-------------|-------------|---------------|------|--|--| | THERMAL METRIC(1) | | DB
(SSOP) | DW
(SOIC) | N
(PDIP) | NS
(SOP) | PW
(TSSOP) | UNIT | | | | | | 20 PINS | | $R_{\theta JA}$ | Junction-to-ambient thermal resistance | 92.1 | 77.0 | 57.0 | 74.1 | 99.7 | °C/W | | R _0JC(top) | Junction-to-case (top) thermal resistance | 53.9 | 41.5 | 48.6 | 40.6 | 34.0 | °C/W | | R _0JB | Junction-to-board thermal resistance | 47.2 | 44.8 | 38.0 | 41.6 | 50.7 | °C/W | | ΨЈT | Junction-to-top characterization parameter | 16.5 | 16.8 | 25.4 | 14.8 | 1.8 | °C/W | | ΨЈB | Junction-to-board characterization parameter | 46.8 | 44.3 | 37.8 | 41.2 | 50.1 | °C/W | For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

	PARAME	TED	TEST CO	ONDITIONS	v	T,	_A = 25°C	;	SN54H	C245	SN74HC245		UNIT
	PARAIVIE	IEK	IESI CC	БИOППOИЗ	V _cc	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNIT
					2 V	1.9	1.998		1.9		1.9
				I _OH = -20 µA	4.5 V	4.4	4.499		4.4		4.4
			V _I = V _IH	μ, ,	6 V	5.9	5.999		5.9		5.9
V _OH	High-Level Out	put Voltage	or V _IL	I _OH = -6 mA	4.5 V	3.98	4.3		3.7		3.84		V
				I _OH = -7.8 mA	6 V	5.48	5.8		5.2		5.34
					2 V		0.002	0.1		0.1		0.1
				I _OL = 20 μΑ	4.5 V		0.001	0.1		0.1		0.1
	V	V _I = V _IH	F	6 V		0.001	0.1		0.1		0.1
V _OL	Low-Level Outp	out Voltage	or V _IL	I _OL = 6 mA	4.5 V		0.17	0.26		0.4		0.33	V
				I _OL = 7.8 mA	6 V		0.15	0.26		0.4		0.33
I _I	Input Current	DIR or OE	V _I = V _CC	or 0	6 V		±0.1	±100		±1000		±1000	nA
I _OZ	Off-State (High- Impedance State) Output Current	A or B	V _O = V _CC	or 0	6 V		±0.01	±0.5		±10		±5	μΑ
I _CC	Supply Current		V _I = V _CC or 0,	I _O = 0	6 V			8		160		80	μΑ
Ci	Input Capacitance	DIR or OE			2 V to 6 V		3	10		10		10	pF

6.6 Switching Characteristics, CL = 50 pF

over recommended operating free-air temperature range (unless otherwise noted)

(see Figure 7-1)

| | FROM | TO | | TA = 25°C | | | SN54HC245 | SN74HC245 | |-----------|---------|----------|-------|-----------|-----|-----|------------|------------|------|--| | PARAMETER | (INPUT) | (OUTPUT) | VCC | MIN | TYP | MAX | MIN
MAX | MIN
MAX | UNIT | | | | | 2 V | | 40 | 105 | 160 | 130 | | tpd | A or B | B or A | 4.5 V | | 15 | 21 | 32 | 26 | ns | | | | | 6 V | | 12 | 18 | 27 | 22 | | | | | 2 V | | 125 | 230 | 340 | 290 | | ten | OE | A or B | 4.5 V | | 23 | 46 | 68 | 58 | ns | | | | | | 6 V | | 20 | 39 | 58 | 49 | | | | | 2 V | | 74 | 200 | 300 | 250 | | tdis | OE | A or B | 4.5 V | | 25 | 40 | 60 | 50 | ns | | | | | 6 V | | 21 | 34 | 51 | 43 | | | | | 2 V | | 20 | 60 | 90 | 75 | | tt | | A or B | 4.5 V | | 8 | 12 | 18 | 15 | ns | | | | | 6 V | | 6 | 10 | 15 | 13 |

6.7 Switching Characteristics, CL = 150 pF

over recommended operating free-air temperature range (unless otherwise noted)

(see Figure 7-1)

| | FROM | TO | VCC | TA = 25°C | | | SN54HC245 | | SN74HC245 | |-----------|---------|--------------|-------|-----------|-----|-----|-----------|-----|-----------|-----|------| | PARAMETER | (INPUT) | (OUTPUT
) | | MIN | TYP | MAX | MIN | MAX | MIN | MAX | UNIT | | | | | 2 V | | 54 | 135 | | 200 | | 170 | | tpd | A or B | B or A | 4.5 V | | 18 | 27 | | 40 | | 34 | ns | | | | | 6 V | | 15 | 23 | | 34 | | 29 | | | | | 2 V | | 150 | 270 | | 405 | | 335 | | ten | OE | A or B | 4.5 V | | 31 | 54 | | 81 | | 67 | ns | | | | | 6 V | | 25 | 46 | | 69 | | 56 | | | | | 2 V | | 45 | 210 | | 315 | | 265 | | tt | | A or B | 4.5 V | | 17 | 42 | | 63 | | 53 | ns | | | | | 6 V | | 13 | 36 | | 53 | | 45 |

6.8 Operating Characteristics

TA = 25°C

	PARAMETER	TEST CONDITIONS	TYP	UNIT
Cpd	Power dissipation capacitance per transceiver	No load	40	pF

6.9 Typical Characteristics

Figure 6-2. TPD vs VCC at 25°C

7 Parameter Measurement Information

7.1

PARA	METER	R _L	CL	S1	S2
	t _PZH	1 k Ω	50 pF or	Open	Closed
t _en	t _PZL	1 K22	150 pF	Closed	Open
	t _PHZ	1 kΩ	50 pF	Open	Closed
t _dis	t _PLZ	1 K22	50 pr	Closed	Open
t _pd or	t _pd or t _t		50 pF or 150 pF	Open	Open

VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS

A. C_I includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR $\leq$ 1 MHz, $Z_O$ = 50 $\Omega$ , $t_r$ = 6 ns, $t_f$ = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. $t_{PLZ}$ and $t_{PHZ}$ are the same as $t_{dis}$ .
F. $t_{PZL}$ and $t_{PZH}$ are the same as $t_{en}$ .
G. t_PLH and t_PHL are the same as t_pd.

Figure 7-1. Load Circuit and Voltage Waveforms

8 Detailed Description

8.1 Overview

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. The SNx4HC245 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

8.2 Functional Block Diagram

Logic Diagram (Positive Logic)

8.3 Feature Description

The SNx4HC245 devices have a wide operating VCC range from 2 V to 6 V with slower edge rates to minimize output ringing.

8.4 Device Functional Modes

Table 8-1 lists the function modes of the SNx4HC245.

Table 8-1. Function Table

| | INPUTS (1) | |----|------------|-----------------| | OE | DIR | OPERATION | | L | L | B data to A bus | | L | H | A data to B bus | | H | X | Isolation |

(1) H = High Voltage Level, L = Low Voltage Level, X = Don't Care

9 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

9.1 Application Information

The SNx4HC245 is a low-drive CMOS device that can be used for a multitude of bus interface type applications where output ringing is a concern. The low drive and slow edge rates will minimize overshoot and undershoot on the outputs.

9.2 Typical Application

Figure 9-1. Typical Application Schematic

9.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. Outputs can be combined to produce higher drive but the high drive will also create faster edges into light loads, so routing and load conditions should be considered to prevent ringing.

9.2.2 Detailed Design Procedure

1. Recommended Input Conditions
- Rise time and fall time specs: See (Δt/ΔV) in the Section 6.3.
- Specified high and low levels: See (VIH and VIL) in the Section 6.3.
1. Recommend Output Conditions
- Load currents should not exceed 25 mA per output and 75 mA total for the part.
- Outputs should not be pulled above VCC.

9.2.3 Application Curve

Figure 9-2. Switching Characteristics Comparison

10 Power Supply Recommendations

The power supply can be any voltage between the MIN and MAX supply voltage rating located in the Section 6.3.

Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, 0.1 μF is recommended; if there are multiple VCC pins, then 0.01 μF or 0.022 μF is recommended for each power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μF and a 1 μF are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible for best results.

11 Layout

11.1 Layout Guidelines

When using multiple-bit logic devices, inputs should never float.

In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Figure 11-1 specifies the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is generally acceptable to float outputs, unless the part is a transceiver. If the transceiver has an output enable pin, it will disable the output section of the part when asserted. This will not disable the input section of the IOs, so they cannot float when disabled.

11.2 Layout Example

Figure 11-1. Layout Diagram

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

	PARAME	TED	TEST CO	ONDITIONS	v	T,	_A = 25°C	;	SN54H	C245	SN74HC245		UNIT
	PARAIVIE	IEK	IESI CC	БИOППOИЗ	V _cc	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNIT
					2 V	1.9	1.998		1.9		1.9
				I _OH = -20 µA	4.5 V	4.4	4.499		4.4		4.4
			V _I = V _IH	μ, ,	6 V	5.9	5.999		5.9		5.9
V _OH	High-Level Out	put Voltage	or V _IL	I _OH = -6 mA	4.5 V	3.98	4.3		3.7		3.84		V
				I _OH = -7.8 mA	6 V	5.48	5.8		5.2		5.34
					2 V		0.002	0.1		0.1		0.1
				I _OL = 20 μΑ	4.5 V		0.001	0.1		0.1		0.1
	V	V _I = V _IH	F	6 V		0.001	0.1		0.1		0.1
V _OL	Low-Level Outp	out Voltage	or V _IL	I _OL = 6 mA	4.5 V		0.17	0.26		0.4		0.33	V
				I _OL = 7.8 mA	6 V		0.15	0.26		0.4		0.33
I _I	Input Current	DIR or OE	V _I = V _CC	or 0	6 V		±0.1	±100		±1000		±1000	nA
I _OZ	Off-State (High- Impedance State) Output Current	A or B	V _O = V _CC	or 0	6 V		±0.01	±0.5		±10		±5	μΑ
I _CC	Supply Current		V _I = V _CC or 0,	I _O = 0	6 V			8		160		80	μΑ
Ci	Input Capacitance	DIR or OE			2 V to 6 V		3	10		10		10	pF

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

			MIN	MAX	UNIT
VCC	Supply voltage		−0.5	7	V
IIK	Input clamp current(2)	VI < 0 or VI > VCC		±20	mA
IOK	Output clamp current(2)	VO < 0 or VO > VCC		±20	mA
IO	Continuous output current	VO = 0 to VCC		±35	mA
	Continuous current through VCC or GND			±70	mA
Tstg	Storage temperature		–65	150	°C
TJ	Junction Temperature			150	°C

⁽¹⁾ Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)

| | | | | SN54HC245 | | SN74HC245 | |-------|-------------------------------------|-------------|------|-----------|------|-----------|-----|------|------| | | | | MIN | NOM | MAX | MIN | NOM | MAX | UNIT | | VCC | Supply voltage | | 2 | 5 | 6 | 2 | 5 | 6 | V | | | | VCC = 2 V | 1.5 | | | 1.5 | | VIH | High-level input voltage | VCC = 4.5 V | 3.15 | | | 3.15 | | | V | | | | VCC = 6 V | 4.2 | | | 4.2 | | | | VCC = 2 V | | | 0.5 | | | 0.5 | | VIL | Low-level input voltage | VCC = 4.5 V | | | 1.35 | | | 1.35 | V | | | | VCC = 6 V | | | 1.8 | | | 1.8 | | VI | Input voltage | | 0 | | VCC | 0 | | VCC | V | | VO | Output voltage | | 0 | | VCC | 0 | | VCC | V | | | | VCC = 2 V | | | 1000 | | | 1000 | | ∆t/∆v | Input transition rise and fall time | VCC = 4.5 V | | | 500 | | | 500 | ns | | | | VCC = 6 V | | | 400 | | | 400 | | TA | Operating free-air temperature | | –55 | | 125 | –40 | | 85 | °C |

⁽¹⁾ All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

⁽²⁾ The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

⁽²⁾ JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.4 Thermal Information

| | | SNx4HC245 | |-----------------------|----------------------------------------------|--------------|--------------|-------------|-------------|---------------|------|--|--| | THERMAL METRIC(1) | | DB
(SSOP) | DW
(SOIC) | N
(PDIP) | NS
(SOP) | PW
(TSSOP) | UNIT | | | | | | 20 PINS | | $R_{\theta JA}$ | Junction-to-ambient thermal resistance | 92.1 | 77.0 | 57.0 | 74.1 | 99.7 | °C/W | | R _0JC(top) | Junction-to-case (top) thermal resistance | 53.9 | 41.5 | 48.6 | 40.6 | 34.0 | °C/W | | R _0JB | Junction-to-board thermal resistance | 47.2 | 44.8 | 38.0 | 41.6 | 50.7 | °C/W | | ΨЈT | Junction-to-top characterization parameter | 16.5 | 16.8 | 25.4 | 14.8 | 1.8 | °C/W | | ΨЈB | Junction-to-board characterization parameter | 46.8 | 44.3 | 37.8 | 41.2 | 50.1 | °C/W | For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

	PARAME	TED	TEST CO	ONDITIONS	v	T,	_A = 25°C	;	SN54H	C245	SN74HC245		UNIT
	PARAIVIE	IEK	IESI CC	БИOППOИЗ	V _cc	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNIT
					2 V	1.9	1.998		1.9		1.9
				I _OH = -20 µA	4.5 V	4.4	4.499		4.4		4.4
			V _I = V _IH	μ, ,	6 V	5.9	5.999		5.9		5.9
V _OH	High-Level Out	put Voltage	or V _IL	I _OH = -6 mA	4.5 V	3.98	4.3		3.7		3.84		V
				I _OH = -7.8 mA	6 V	5.48	5.8		5.2		5.34
					2 V		0.002	0.1		0.1		0.1
				I _OL = 20 μΑ	4.5 V		0.001	0.1		0.1		0.1
	V	V _I = V _IH	F	6 V		0.001	0.1		0.1		0.1
V _OL	Low-Level Outp	out Voltage	or V _IL	I _OL = 6 mA	4.5 V		0.17	0.26		0.4		0.33	V
				I _OL = 7.8 mA	6 V		0.15	0.26		0.4		0.33
I _I	Input Current	DIR or OE	V _I = V _CC	or 0	6 V		±0.1	±100		±1000		±1000	nA
I _OZ	Off-State (High- Impedance State) Output Current	A or B	V _O = V _CC	or 0	6 V		±0.01	±0.5		±10		±5	μΑ
I _CC	Supply Current		V _I = V _CC or 0,	I _O = 0	6 V			8		160		80	μΑ
Ci	Input Capacitance	DIR or OE			2 V to 6 V		3	10		10		10	pF

Thermal Information

| | | SNx4HC245 | |-----------------------|----------------------------------------------|--------------|--------------|-------------|-------------|---------------|------|--|--| | THERMAL METRIC(1) | | DB
(SSOP) | DW
(SOIC) | N
(PDIP) | NS
(SOP) | PW
(TSSOP) | UNIT | | | | | | 20 PINS | | $R_{\theta JA}$ | Junction-to-ambient thermal resistance | 92.1 | 77.0 | 57.0 | 74.1 | 99.7 | °C/W | | R _0JC(top) | Junction-to-case (top) thermal resistance | 53.9 | 41.5 | 48.6 | 40.6 | 34.0 | °C/W | | R _0JB | Junction-to-board thermal resistance | 47.2 | 44.8 | 38.0 | 41.6 | 50.7 | °C/W | | ΨЈT | Junction-to-top characterization parameter | 16.5 | 16.8 | 25.4 | 14.8 | 1.8 | °C/W | | ΨЈB | Junction-to-board characterization parameter | 46.8 | 44.3 | 37.8 | 41.2 | 50.1 | °C/W | For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.