SN6505BDBVT
Low-Noise Push-Pull Transformer DriverThe SN6505BDBVT is a low-noise push-pull transformer driver from Texas Instruments. View the full SN6505BDBVT datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
SN6505BDBVT shares its datasheet with SN6505, whose page lists every part number it covers.
Official SN6505BDBVT datasheet (PDF) — the source this page was extracted from.
SN6505BDBVT Key Specifications
| Parameter | Value |
|---|---|
| Packaging | MouseReel |
| Standard Pack Qty | 250 |
| ESD HBM | ±6000V |
| Current Limit | 1.7A |
| UVLO Threshold | 2.25V positive-going |
| Shutdown Current | <1 μA (0.1 μA typical) |
| Package Dimensions | 2.90mm x 1.60mm |
| Output Drive Current | 1A (VCC 2.8V to 5.5V) |
| Supply Voltage Range | 2.25V to 5.5V |
| Supply Current (SN6505B) | 1.56mA typical, 2.3mA max |
| Switch On-Resistance (Max) | 0.25 Ω at VCC = 4.5V, 1A |
| Operating Temperature Range | -55°C to 125°C |
| External Clock Range (SN6505B) | 100kHz to 1600kHz |
| Absolute Max Switch Voltage (D1, D2) | 16V |
| Internal Oscillator Frequency (SN6505B) | 424kHz typical (363kHz to 517kHz) |
SN6505BDBVT Overview
Part: SN6505BDBVR — Texas Instruments (SN6505B, 420 kHz oscillator option)
Type: Low-Noise Push-Pull Transformer Driver
Description: 2.25–5.5 V supply, 1 A push-pull transformer driver for isolated power supplies with a 420 kHz internal oscillator (SN6505B), spread spectrum clocking, 1.7 A current limit and a 6-pin SOT23 package.
Operating Conditions:
- Supply voltage (VCC): 2.25–5.5 V
- Operating temperature (ambient): -55 to 125 °C
- Output switch current (D1, D2): up to 0.75 A for 2.25 V < VCC < 2.8 V; up to 1 A for 2.8 V < VCC < 5.5 V
Absolute Maximum Ratings:
- Max supply voltage (VCC): 6 V
- Output switch voltage (D1, D2): 16 V
- Peak output switch current (D1, D2): 2.4 A
- Max junction temperature: 150 °C
- Storage temperature: -65 to 150 °C
Key Specs:
- Output drive: 1 A at 5 V supply
- Low RON: 0.25 Ω max at 4.5 V supply
- Internal oscillator: 420 kHz (SN6505B); 160 kHz for SN6505A
- Current limit: 1.7 A
- Shutdown current: <1 μA
- Undervoltage lockout trips at VCC ≤ 2.25 V
- ESD: ±6000 V HBM, ±1500 V CDM (all pins)
Features:
- Push-pull driver for center-tapped transformers
- Ultra-low EMI through slew-rate control and spread spectrum clocking
- Synchronization of multiple devices with an external clock input
- Soft-start to reduce inrush current
- Thermal shutdown, undervoltage lockout, and break-before-make circuitry
- Two integrated 1 A power MOSFET switches
Applications:
- Isolated power supply for CAN, RS-485, RS-422, RS-232, SPI, I2C and low-power LAN
- Low-noise isolated USB supplies
- Process control
- Telecom supplies
- Medical and precision instruments
- Radio and distributed supplies
- Low-noise filament supplies
Package:
- SOT23 (DBV), 6-pin, 2.90 mm × 1.60 mm body
SN6505BDBVT Features
- Push-pull driver for transformers
- Wide input voltage range: 2.25 V to 5.5 V
- High output drive: 1 A at 5 V supply
- Low RON 0.25 Ω max at 4.5 V supply
- Ultra-low EMI
- Spread spectrum clocking
- Precision internal oscillator options: 160 kHz (SN6505A) and 420 kHz (SN6505B)
- Synchronization of multiple devices with external clock input
- Slew-rate control
- 1.7 A Current-limit
- Low shutdown current: <1 μA
- Thermal shutdown
- Wide temperature range: -55°C to 125°C
- Small 6-Pin SOT23 (DBV) package
- Soft-start to reduce In-rush current
SN6505BDBVT Applications
- Isolated power supply for CAN, RS-485, RS-422, RS-232, SPI, I2C, low-power LAN
- Low-noise isolated USB supplies
- Process control
- Telecom supplies
- Radio supplies
- Distributed supplies
- Medical instruments
- Precision instruments
- Low-noise filament supplies
SN6505BDBVT Pin Configuration
1
2 VCC EN 5
3 D2 GND 4
D1
CLK
6
Figure 5-1. DBV Package SOT-23 (6 Pin) Top View
Table 5-1. Pin Functions
| PIN - NAME | PIN - NO. | PIN - TYPE | DESCRIPTION |
|---|---|---|---|
| D1 | 1 | O | Open drain output of the first power MOSFETs. Typically connected to the outer terminals of the center tap transformer. Because large currents flow through these pins, their external traces should be kept short. |
| V CC | 2 | P | This is the device supply pin. It should be bypassed with a 4.7 μF or greater, low ESR capacitor. When V CC ≤ 2.25 V, an internal undervoltage lockout circuit trips and turns both outputs off. |
| D2 | 3 | O | Open drain output of the second power MOSFETs. Typically connected to the outer terminals of the center tap transformer. Because large currents flow through these pins, their external traces should be kept short. |
| GND | 4 | P | GND is connected to the source of the power MOSFET switches via an internal sense circuit. Because large currents flow through it, the GND terminals must be connected to a low-inductance quality ground plane. |
| EN | 5 | I | The EN pin turns the device on or off. Grounding or leaving this pin floating disables all internal circuitry. If unused this pin should be tied directly to V CC . |
| CLK | 6 | I | This pin is used to run the device with external clock. Internally it is pulled down to GND. If valid clock is not detected on this pin, the device shifts automatically to internal clock. |
SN6505BDBVT Electrical Characteristics
over full-range of recommended operating conditions, unless otherwise noted. All typical values are at T A = 25°C, V CC = 5 V.
| PARAMETER | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| VOLTAGE SUPPLY | VOLTAGE SUPPLY | |||||
| I (Vcc) | Supply Current (2.8 V < V C C < 5.5) (SN6505A) | R L = 50 Ω | 1 | 1.4 | mA | |
| Supply Current (2.8 V < V C C < 5.5) (SN6505B) | R L = 50 Ω | 1.56 | 2.3 | mA | ||
| I IH | Leakage Current on EN and CLK pin | EN / CLK = V CC | 10 | 20 | μA | |
| I DIS | V CC current for EN = 0 | 0.1 | μA | |||
| I LKG(D1) I LKG(D2) | Leakage Current on D1,D2 for EN=0 | Voltage of D1,D2 = V CC | 0.1 | μA | ||
| V CC+ (UVLO) | Positive-going UVLO threshold | 2.25 | V | |||
| V CC- (UVLO) | Negative-going UVLO threshold | 1.7 | V | |||
| V HYS (UVLO1) | UVLO threshold hysteresis | 0.3 | V | |||
| V IN(ON) | EN, CLK pin logic high threshold | 0.7 | V CC | |||
| V IN(OFF) | EN, CLK pin logic low threshold | 0.3 | V CC | |||
| V IN(HYS) | EN, CLK pin threshold hysteresis | 0.2 | V CC | |||
| CLK | ||||||
| F SW | D1, D2 average switching Frequency (SN6505A) | R L = 50 Ω to V CC ; Refer to Figure 7-3 | 138 | 160 | 203 | Khz |
| F SW | D1, D2 average switching Frequency (SN6505B) | R L = 50 Ω to V CC ; Refer to Figure 7-3. | 363 | 424 | 517 | kHz |
| F (EXT) | External clock frequency on CLK pin (SN6505A) | 100 | 600 | kHz | ||
| F (EXT) | External clock frequency on CLK pin (SN6505B) | 100 | 1600 | kHz | ||
| OUTPUT STAGE | OUTPUT STAGE | |||||
| DMM | Average ON time mismatch between D1 and D2 | R L = 50 Ω | 0% | |||
| R (ON) | Output switch on resistance | V CC = 4.5 V, ID1,ID2 = 1 A | 0.16 | 0.25 | Ω | |
| R (ON) | V CC = 2.8 V, ID1,ID2 = 1 A | 0.19 | 0.31 | Ω | ||
| R (ON) | V CC = 2.25 V, ID1,ID2 = 0.5 A | 0.21 | 0.45 | Ω | ||
| V (SLEW) | Voltage slew rates on D1 and D2 for SN6505A | R L = 50 Ω to V CC ; Refer to Figure 7-3 | 48 | V/μs | ||
| I (SLEW) | Current slew rates at D1 and D2 for SN6505A | R L = 5 Ω through transformer; Refer to Figure 7-4 | 11 | A/μs | ||
| V (SLEWHF) | Voltage slew rates on D1 and D2 for SN6505B | R L = 50 Ω to V CC ; Refer to Figure 7-3 | 152 | V/μs | ||
| I (SLEWHF) | Current slew rates at D1 and D2 for SN6505B | R L = 5 Ω through transformer; Refer to Figure 7-4 | 41 | A/μs | ||
| I LIM | Current clamp limit (2.8 V < V CC < 5.5V ) | 1.42 | 1.75 | 2.15 | A | |
| Current clamp limit (2.25 V < V CC < 2.8 V) | 0.65 | 1.85 | A | |||
| THERMAL SHUT DOWN | THERMAL SHUT DOWN | |||||
| T SD+ | T SD turn on temperature | 154 | 168 | 181 | °C | |
| T SD- | T SD turn off temperature | 135 | 150 | 166 | °C | |
| T SD- | T SD hysteresis | 13 | 17 | °C |
SN6505BDBVT Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) . All typical values are at TA = 25°C, VCC = 5 V.
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage (2) | V CC | -0.5 | 6 | V |
| Voltage | EN, CLK | -0.5 | V CC + 0.5 (3) | |
| Output switch voltage | D1, D2 | 16 | V | |
| Peak output switch current | I (D1)Pk , I (D2)Pk | 2.4 | A | |
| Junction temperature, T J | Junction temperature, T J | -55 | 150 | °C |
| Storage temperature range, T stg | Storage temperature range, T stg | -65 | 150 | °C |
SN6505BDBVT Recommended Operating Conditions
| MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| V CC | Supply voltage | 2.25 | 5.5 | V | ||
| I D1 , I D2 | Output switch current - Primary side | 2.25 V < V CC < 2.8 V 2.8 V < V CC < 5.5 V | 0.75 1 | A A | ||
| T A | Ambient temperature | -55 | 125 | °C |
SN6505BDBVT Thermal Information
| THERMAL METRIC (1) | THERMAL METRIC (1) | SN6505 DBV (SOT-23) 6 PINS | UNIT |
|---|---|---|---|
| R θJA | Junction-to-ambient thermal resistance | 137.7 | °C/W |
| R θJC(top) | Junction-to-case (top) thermal resistance | 57.7 | °C/W |
| R θJB | Junction-to-board thermal resistance | 46.0 | °C/W |
| ψ JT | Junction-to-top characterization parameter | 13.4 | °C/W |
| ψ JB | Junction-to-board characterization parameter | 44.9 | °C/W |
| R θJC(bottom) | Junction-to-case(bottom) thermal resistance | N/A | °C/W |
SN6505BDBVT Typical Application
The SN6505 is a transformer driver designed for low-cost, small form-factor, isolated DC/DC converters using the push-pull topology. The device includes an oscillator that feeds a gate-drive circuit. The gate-drive, comprising a frequency divider and a break-before-make (BBM) logic, provides two complementary output signals which alternately turn the two output transistors on and off.
Figure 9-1. Block Diagram and Output Timing With Break-Before-Make Action
The output frequency of the oscillator is divided down by an asynchronous divider that provides two complementary output signals, S and S, with a 50% duty cycle. A subsequent break-before-make logic inserts a dead-time between the high-pulses of the two signals. The resulting output signals, G1 and G2, present the gate-drive signals for the output transistors Q 1 and Q 2. As shown in Figure 9-2, before either one of the gates can assume logic high, there must be a short time period during which both signals are low and both transistors are high-impedance. This short period, known as break-before-make time, is required to avoid shorting out both ends of the primary.
Figure 9-2. Detailed Output Signal Waveforms
Figure 9-1. Block Diagram and Output Timing With Break-Before-Make Action
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| SN6505 | Texas Instruments | SOT-23 (DBV) |
| SN6505A | Texas Instruments | SOT-23-6 |
| SN6505ADBVR | Texas Instruments | SOT-23-6 |
| SN6505ADBVT | Texas Instruments | SOT-23-6 |
| SN6505B | Texas Instruments | SOT-23-6 |
| SN6505BDBVR | Texas Instruments | SOT-23-6 |
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