R7FA4M1AB3CFM
Features
Microcontroller UnitThe R7FA4M1AB3CFM is a microcontroller unit from Renesas Electronics. Features. View the full R7FA4M1AB3CFM datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Renesas Electronics
Category
Microcontroller Unit
Overview
Part: Renesas RA4M1 Group (e.g., R7FA4M1AB3CFP)
Type: Microcontroller Unit (MCU)
Description: A 48-MHz Arm Cortex-M4 core MCU with 256-KB code flash, 32-KB SRAM, integrated Segment LCD Controller, Capacitive Touch Sensing Unit, USB 2.0 Full-Speed, 14-bit ADC, and 12-bit DAC, operating from 1.6 V to 5.5 V.
Operating Conditions:
- Supply voltage: 1.6–5.5 V
- Operating temperature: -40 to +105 °C
- Max operating frequency: 48 MHz
Absolute Maximum Ratings:
- Max supply voltage: null
- Max continuous current: null
- Max junction/storage temperature: null
Key Specs:
- Core: Arm Cortex-M4 with FPU
- Max CPU frequency: 48 MHz
- Code Flash Memory: 256 KB
- Data Flash Memory: 8 KB (100,000 P/E cycles)
- SRAM: 32 KB (with ECC or parity)
- A/D Converter: 14-bit
- D/A Converter: 12-bit
- USB: USB 2.0 Full-Speed Module
Features:
- Segment LCD Controller (SLCDC)
- Capacitive Touch Sensing Unit (CTSU)
- USB 2.0 Full-Speed Module (USBFS)
- AES128/256 and True Random Number Generator (TRNG)
- Multiple low power modes
- Realtime Clock (RTC) with calendar and Battery Backup support
Applications:
- null
Package:
- 100-pin LGA (7 mm × 7 mm, 0.65 mm pitch)
- 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch)
- 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch)
- 64-pin QFN (8 mm × 8 mm, 0.4 mm pitch)
- 48-pin LQFP (7 mm × 7 mm, 0.5 mm pitch)
- 48-pin QFN (7 mm × 7 mm, 0.5 mm pitch)
- 40-pin QFN (6 mm × 6 mm, 0.5 mm pitch)
Features
■ Arm Cortex-M4 Core with Floating Point Unit (FPU)
- Armv7E-M architecture with DSP instruction set
- Maximum operating frequency: 48 MHz
- Support for 4-GB address space
- Arm Memory Protection Unit (Arm MPU) with 8 regions
- Debug and Trace: ITM, DWT, FPB, TPIU, ETB
- CoreSight™ Debug Port: JTAG-DP and SW-DP
■ Memory
- 256-KB code flash memory
- 8-KB data flash memory (100,000 program/erase (P/E) cycles)
- 32-KB SRAM
- Flash Cache (FCACHE)
- Memory Protection Unit (MPU)
- 128-bit unique ID
■ Connectivity
- USB 2.0 Full-Speed Module (USBFS)
- On-chip transceiver with voltage regulator
- Compliant with USB Battery Charging Specification 1.2
- Serial Communications Interface (SCI) × 4
- UART
- Simple IIC
- Simple SPI
- Serial Peripheral Interface (SPI) × 2
- I2C bus interface (IIC) × 2
- Controller Area Network (CAN) module
- Serial Sound Interface Enhanced (SSIE)
■ Analog
- 14-bit A/D Converter (ADC14)
- 12-bit D/A Converter (DAC12)
- 8-bit D/A Converter (DAC8) ×2 (for ACMPLP)
- Low-Power Analog Comparator (ACMPLP) × 2
- Operational Amplifier (OPAMP) × 4
- Temperature Sensor (TSN)
■ Timers
- General PWM Timer 32-Bit (GPT32) × 2
- General PWM Timer 16-Bit (GPT16) × 6
- Low Power Asynchronous General-Purpose Timer (AGT) × 2
- Watchdog Timer (WDT)
■ Safety
- Error Correction Code (ECC) in SRAM
- SRAM parity error check
- Flash area protection
- ADC self-diagnosis function
- Clock Frequency Accuracy Measurement Circuit (CAC)
- Cyclic Redundancy Check (CRC) calculator
- Data Operation Circuit (DOC)
- Port Output Enable for GPT (POEG)
- Independent Watchdog Timer (IWDT)
- GPIO readback level detection
- Register write protection
- Main oscillator stop detection
- Illegal memory access
■ System and Power Management
- Low power modes
- Realtime Clock (RTC) with calendar and Battery Backup support
- Event Link Controller (ELC)
- DMA Controller (DMAC) × 4
- Data Transfer Controller (DTC)
- Key Interrupt Function (KINT)
- Power-on reset
- Low Voltage Detection (LVD) with voltage settings
■ Security and Encryption
- AES128/256
- GHASH
- True Random Number Generator (TRNG)
■ Human Machine Interface (HMI)
- Segment LCD Controller (SLCDC)
- Up to 38 segments × 4 commons
- Up to 34 segments × 8 commons
- Capacitive Touch Sensing Unit (CTSU)
■ Multiple Clock Sources
- Main clock oscillator (MOSC)
- (1 to 20 MHz when VCC = 2.4 to 5.5 V)
- (1 to 8 MHz when VCC = 1.8 to 2.4 V)
- (1 to 4 MHz when VCC = 1.6 to 1.8 V)
- Sub-clock oscillator (SOSC) (32.768 kHz)
- High-speed on-chip oscillator (HOCO)
- (24, 32, 48, 64 MHz when VCC = 2.4 to 5.5 V) (24, 32, 48 MHz when VCC = 1.8 to 5.5 V)
- (24, 32 MHz when VCC = 1.6 to 5.5 V)
- Middle-speed on-chip oscillator (MOCO) (8 MHz)
- Low-speed on-chip oscillator (LOCO) (32.768 kHz)
- IWDT-dedicated on-chip oscillator (15 kHz)
- Clock trim function for HOCO/MOCO/LOCO
- Clock out support
■ General Purpose I/O Ports
- Up to 84 input/output pins
- Up to 3 CMOS input
- Up to 81 CMOS input/output
- Up to 9 input/output 5-V tolerant
- Up to 2 high current (20 mA)
■ Operating Voltage
VCC: 1.6 to 5.5 V
■ Operating Temperature and Packages
- Ta = -40°C to +85°C
- 100-pin LGA (7 mm × 7 mm, 0.65 mm pitch)
- Ta = -40°C to +105°C
- 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch)
- 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch)
- 64-pin QFN (8 mm × 8 mm, 0.4 mm pitch)
- 48-pin LQFP (7 mm × 7 mm, 0.5 mm pitch) - 48-pin QFN (7 mm × 7 mm, 0.5 mm pitch)
- 40-pin QFN (6 mm × 6 mm, 0.5 mm pitch)
Pin Configuration
Table 1.15 Pin functions (1 of 4)
| Product part number | Package code | Code flash | Data flash | SRAM | Operating temperature |
|---|---|---|---|---|---|
| R7FA4M1AB3CFP | PLQP0100KB-B | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| R7FA4M1AB2CLJ | PTLG0100JA-A | -40 to +85°C | |||
| R7FA4M1AB3CFM | PLQP0064KB-C | -40 to +105°C | |||
| R7FA4M1AB3CNB | PWQN0064LA-A | -40 to +105°C | |||
| PWQN0064LB-B | |||||
| R7FA4M1AB3CFL | PLQP0048KB-B | -40 to +105°C | |||
| R7FA4M1AB3CNE | PWQN0048KB-A | -40 to +105°C | |||
| PWQN0048KC-A | |||||
| R7FA4M1AB3CNF | PWQN0040KC-A | -40 to +105°C | |||
| PWQN0040KD-A |
Table 1.15 Pin functions (2 of 4)
| Product part number | Package code | Code flash | Data flash | SRAM | Operating temperature |
|---|---|---|---|---|---|
| R7FA4M1AB3CFP | PLQP0100KB-B | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| R7FA4M1AB2CLJ | PTLG0100JA-A | 256 KB | 8 KB | 32 KB | -40 to +85°C |
| R7FA4M1AB3CFM | PLQP0064KB-C | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| R7FA4M1AB3CNB | PWQN0064LA-A | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| PWQN0064LB-B | 256 KB | 8 KB | 32 KB | -40 to +105°C | |
| R7FA4M1AB3CFL | PLQP0048KB-B | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| R7FA4M1AB3CNE | PWQN0048KB-A | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| PWQN0048KC-A | 256 KB | 8 KB | 32 KB | -40 to +105°C | |
| R7FA4M1AB3CNF | PWQN0040KC-A | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| PWQN0040KD-A | 256 KB | 8 KB | 32 KB | -40 to +105°C |
Table 1.15 Pin functions (3 of 4)
| Product part number | Package code | Code flash | Data flash | SRAM | Operating temperature |
|---|---|---|---|---|---|
| R7FA4M1AB3CFP | PLQP0100KB-B | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| R7FA4M1AB2CLJ | PTLG0100JA-A | -40 to +85°C | |||
| R7FA4M1AB3CFM | PLQP0064KB-C | -40 to +105°C | |||
| R7FA4M1AB3CNB | PWQN0064LA-A | -40 to +105°C | |||
| PWQN0064LB-B | |||||
| R7FA4M1AB3CFL | PLQP0048KB-B | -40 to +105°C | |||
| R7FA4M1AB3CNE | PWQN0048KB-A | -40 to +105°C | |||
| PWQN0048KC-A | |||||
| R7FA4M1AB3CNF | PWQN0040KC-A | -40 to +105°C | |||
| PWQN0040KD-A |
Table 1.15 Pin functions (4 of 4)
| Product part number | Package code | Code flash | Data flash | SRAM | Operating temperature |
|---|---|---|---|---|---|
| R7FA4M1AB3CFP | PLQP0100KB-B | 256 KB | 8 KB | 32 KB | -40 to +105°C |
| R7FA4M1AB2CLJ | PTLG0100JA-A | -40 to +85°C | |||
| R7FA4M1AB3CFM | PLQP0064KB-C | -40 to +105°C | |||
| R7FA4M1AB3CNB | PWQN0064LA-A | -40 to +105°C | |||
| PWQN0064LB-B | |||||
| R7FA4M1AB3CFL | PLQP0048KB-B | -40 to +105°C | |||
| PWQN0048KB-A | |||||
| R7FA4M1AB3CNE | PWQN0048KC-A | -40 to +105°C | |||
| PWQN0040KC-A | |||||
| R7FA4M1AB3CNF | PWQN0040KC-A | -40 to +105°C | |||
| PWQN0040KD-A |
Electrical Characteristics
Unless otherwise specified, the electrical characteristics of the MCU are defined under the following conditions:
VCC\*1 = AVCC0 = VCC_USB\*2 = VCC_USB_LDO\*2 = 1.6 to 5.5V, VREFH = VREFH0 = 1.6 to AVCC0, VBATT = 1.6 to 3.6V, VSS = AVSS0 = VREFL = VREFL0 = VSS_USB = 0V, Ta = Topr.
Note 1. The typical condition is set to VCC = 3.3V.
Note 2. When USBFS is not used.
Figure 2.1 shows the timing conditions.
Figure 2.1 Input or output timing measurement conditions
The recommended measurement conditions for the timing specification of each peripheral provided are for the best peripheral operation. Make sure to adjust the driving abilities of each pin to meet your conditions.
Each function pin used for the same function must select the same drive ability. If the I/O drive ability of each function pin is mixed, the AC specification of each function is not guaranteed.
Absolute Maximum Ratings
Table 2.1 Absolute maximum ratings
| Parameter | Symbol | Value | Unit | |
|---|---|---|---|---|
| Power supply voltage | VCC | -0.5 to +6.5 | V | |
| Input voltage | 5 V-tolerant ports*1 | Vin | -0.3 to +6.5 | V |
| P000 to P008, P010 to P015 | Vin | -0.3 to AVCC0 + 0.3 | V | |
| Others | Vin | -0.3 to VCC + 0.3 | V | |
| Reference power supply voltage | VREFH0 VREFH | -0.3 to +6.5 | V V | |
| VBATT power supply voltage | VBATT | -0.5 to +6.5 | V | |
| Analog power supply voltage | AVCC0 | -0.5 to +6.5 | V | |
| USB power supply voltage | VCC_USB | -0.5 to +6.5 | V | |
| VCC_USB_LDO | -0.5 to +6.5 | V | ||
| Analog input voltage | When AN000 to AN014 are used | VAN | -0.3 to AVCC0 + 0.3 | V |
| When AN016 to AN025 are used | -0.3 to VCC + 0.3 | V | ||
| LCD voltage | VL1 voltage | VL1 | -0.3 to +2.8 | V |
| VL2 voltage | VL2 | -0.3 to +6.5 | V | |
| VL3 voltage | VL3 | -0.3 to +6.5 | V | |
| VL4 voltage | VL4 | -0.3 to +6.5 | V | |
| Operating temperature*2,*3,*4 | Topr | -40 to +105 -40 to +85 | °C | |
| Storage temperature | Tstg | -55 to +125 | °C |
Caution: Permanent damage to the MCU may result if absolute maximum ratings are exceeded.
To preclude any malfunctions due to noise interference, insert capacitors of high frequency characteristics between the VCC and VSS pins, between the AVCC0 and AVSS0 pins, between the VCC_USB and VSS_USB pins, between the VREFH0 and VREFL0 pins, and between the VREFH and VREFL pins. Place capacitors of about 0.1 μF as close as possible to every power supply pin and use the shortest and heaviest possible traces. Also, connect capacitors as stabilization capacitance.
Connect the VCL pin to a VSS pin by a 4.7 μF capacitor. The capacitor must be placed close to the pin. Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up might cause malfunction and the abnormal current that passes in the device at this time might cause degradation of internal elements.
- Note 1. Ports P205, P206, P400 to P404, P407, P408 are 5 V tolerant.
- Note 2. See section 2.2.1, Tj/Ta Definition.
- Note 3. Contact a Renesas Electronics sales office for information on derating operation under Ta = +85°C to +105°C. Derating is the systematic reduction of load for improved reliability.
- Note 4. The upper limit of operating temperature is +85°C or +105°C, depending on the product. For details, see section 1.3, Part Numbering.
Table 2.2 Recommended operating conditions
| Parameter | Symbol | Value | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Power supply voltages | VCC*1, *2 | When USBFS is not used | 1.6 | - | 5.5 | V |
| When USBFS is used USB Regulator Disable | VCC_USB | - | 3.6 | V | ||
| When USBFS is used USB Regulator Enable | VCC_USB _LDO | - | 5.5 | V | ||
| VSS | - | 0 | - | V | ||
| USB power supply voltages | VCC_USB | When USBFS is not used | - | VCC | - | V |
| When USBFS is used USB Regulator Disable (Input) | 3.0 | 3.3 | 3.6 | V | ||
| VCC_USB_LDO | When USBFS is not used | - | VCC | - | V | |
| When USBFS is used USB Regulator Disable | - | VCC | - | V | ||
| When USBFS is used USB Regulator Enable | 3.8 | - | 5.5 | V | ||
| VSS_USB | - | 0 | - | V | ||
| VBATT power supply voltage | VBATT | When the battery backup function is not used | - | VCC | - | V |
| When the battery backup function is used | 1.6 | - | 3.6 | V | ||
| Analog power supply voltages | AVCC0*1, *2 | 1.6 | - | 5.5 | V | |
| AVSS0 | - | 0 | - | V | ||
| VREFH0 | When used as | 1.6 | - | AVCC0 | V | |
| VREFL0 | ADC14 Reference | - | 0 | - | V | |
| VREFH | When used as | 1.6 | - | AVCC0 | V | |
| VREFL | DAC12 Reference | - | 0 | - | V |
Note 1. Use AVCC0 and VCC under the following conditions: AVCC0 and VCC can be set individually within the operating range when VCC ≥ 2.2 V and AVCC0 ≥ 2.2 V. AVCC0 = VCC when VCC < 2.2 V or AVCC0 < 2.2 V.
Note 2. When powering on the VCC and AVCC0 pins, power them on at the same time, or power the VCC pin first and then the AVCC0 pin.
2.2 DC Characteristics
Package Information
Information on the latest version of the package dimensions or mountings is shown in "Packages" on the Renesas Electronics Corporation website.
Figure 1.1 100-pin LGA
Figure 1.2 100-pin LQFP
Figure 1.3 64-pin LQFP
Figure 1.4 64-pin QFN (1)
Figure 1.5 64-pin QFN (2)
Figure 1.6 48-pin LQFP
Figure 1.7 48-pin QFN (1)
Figure 1.8 48-pin QFN (2)
Figure 1.9 40-pin QFN (1)
Figure 1.10 40-pin QFN (2)
RA4M1 Group Revision History
| Revision History | RA4M1 Group Datasheet |
|---|
Proprietary Notice
All text, graphics, photographs, trademarks, logos, artwork and computer code, collectively known as content, contained in this document is owned, controlled or licensed by or to Renesas, and is protected by trade dress, copyright, patent and trademark laws, and other intellectual property rights and unfair competition laws. Except as expressly provided herein, no part of this document or content may be copied, reproduced, republished, posted, publicly displayed, encoded, translated, transmitted or distributed in any other medium for publication or distribution or for any commercial enterprise, without prior written consent from Renesas.
Arm® and Cortex® are registered trademarks of Arm Limited. CoreSight™ is a trademark of Arm Limited.
CoreMark® is a registered trademark of the Embedded Microprocessor Benchmark Consortium.
Magic Packet™ is a trademark of Advanced Micro Devices, Inc.
SuperFlash® is a registered trademark of Silicon Storage Technology, Inc. in several countries including the United States and Japan.
Other brands and names mentioned in this document may be the trademarks or registered trademarks of their respective holders.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| R7FA4M1AB2CLJ | Renesas Electronics | — |
| R7FA4M1AB3CFL | Renesas Electronics | — |
| R7FA4M1AB3CFP | Renesas Electronics | — |
| R7FA4M1AB3CNB | Renesas Electronics | — |
| R7FA4M1AB3CNE | Renesas Electronics | — |
| R7FA4M1AB3CNF | Renesas Electronics | — |
| RA4M1 | Renesas | 100-pin LGA (7 mm × 7 mm, 0.65 mm pitch) |
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