PY32F030F28U6TR
The PY32F030F28U6TR is an electronic component from Puya Semiconductor. View the full PY32F030F28U6TR datasheet below including key specifications, pinout.
PY32F030F28U6TR shares its datasheet with PY32F030K28U6TR, whose page lists every part number it covers.
Official PY32F030F28U6TR datasheet (PDF) — the source this page was extracted from.
Manufacturer
Puya SemiconductorPackage
QFN-20-EP(3x3)
PY32F030F28U6TR Key Specifications
| Parameter | Value |
|---|---|
| Core | 32-bit ARM Cortex-M0+ |
| Max frequency | 48 MHz |
| Flash memory | Max 64 Kbytes |
| SRAM | Max 8 Kbytes |
| GPIOs | Up to 30, 8mA drive current, 4 GPIOs support up to 80mA/60mA/40mA/20mA sink current |
| ADC | 1 x 12-bit, up to 10 external input channels |
| I2C interface | 1, supports standard (100kHz) and fast (400kHz) modes, 7-bit addressing |
| USART interfaces | 2, supports automatic baud rate detection |
| SPI interfaces | 2 |
PY32F030F28U6TR Overview
Part: PY32F030 Type: ARM Cortex-M0+ Microcontroller
Description: 32-bit ARM Cortex-M0+ MCU at up to 48 MHz with up to 64 KB Flash and 8 KB SRAM, operating from 1.7 V to 5.5 V.
Operating Conditions:
- Supply voltage: 1.7V–5.5V
- Operating temperature: -40 to 85 °C
- Max clock frequency: 48 MHz
Key Specs:
- Core: 32-bit ARM Cortex-M0+
- Max frequency: 48 MHz
- Flash memory: Max 64 Kbytes
- SRAM: Max 8 Kbytes
- GPIOs: Up to 30, 8mA drive current, 4 GPIOs support up to 80mA/60mA/40mA/20mA sink current
- ADC: 1 x 12-bit, up to 10 external input channels
- I2C interface: 1, supports standard (100kHz) and fast (400kHz) modes, 7-bit addressing
- USART interfaces: 2, supports automatic baud rate detection
- SPI interfaces: 2
Features:
- Internal RC oscillators: 4/8/16/22.12/24MHz (HSI), 32.768KHz (LSI)
- External crystal oscillators: 4–32MHz (HSE), 32.768KHz (LSE)
- PLL (supports 2x HSI or HSE)
- Low power modes: Sleep, Stop
- Power management: POR/PDR, BOR, PVD
- All I/O can be used as external interrupts
- 3-channel DMA controller
- Timers: 1x 16-bit advanced (TIM1), 4x 16-bit general-purpose (TIM3/TIM14/TIM16/TIM17), 1x low-power (LPTIM), 1x independent watchdog (IWDT), 1x window watchdog (WWDT), 1x SysTick, 1x IRTIM
- Real-time clock (RTC)
- Supports 4-bit 7-segment common cathode LED display
- Hardware CRC-32 module
- 2 comparators
- Unique UID
- Serial Wire Debug (SWD)
Package:
- LQFP32
- QFN32
- TSSOP20
- QFN20
PY32F030F28U6TR Pin Configuration
PY32F030F28U6TR — QFN-20-EP(3x3) Pinout
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | PA15 | I/O | GPIO Port A, Pin 15 / SPI1_NSS / USART1_RX / TIM1_BKIN |
| 2 | PA14 | I/O | GPIO Port A, Pin 14 / SPI1_SCK / USART1_TX / TIM1_CH1 |
| 3 | PA13 | I/O | GPIO Port A, Pin 13 / SWD_IO / USART1_CTS |
| 4 | PA12 | I/O | GPIO Port A, Pin 12 / SPI1_MOSI / USART1_RTS / TIM1_ETR |
| 5 | PA11 | I/O | GPIO Port A, Pin 11 / SPI1_MISO / USART1_CK / TIM1_CH4 |
| 6 | PA10 | I/O | GPIO Port A, Pin 10 / USART1_RX / TIM1_CH3 |
| 7 | PA9 | I/O | GPIO Port A, Pin 9 / USART1_TX / TIM1_CH2 |
| 8 | PA8 | I/O | GPIO Port A, Pin 8 / MCO / TIM1_CH1 |
| 9 | NRST | I | Reset pin (active low) |
| 10 | VSS | P | Ground |
| 11 | VCC | P | Power supply (1.7V–5.5V) |
| 12 | PB7 | I/O | GPIO Port B, Pin 7 / I2C1_SDA / TIM17_CH1N |
| 13 | PB6 | I/O | GPIO Port B, Pin 6 / I2C1_SCL / TIM16_CH1N / USART1_TX |
| 14 | PB5 | I/O | GPIO Port B, Pin 5 / SPI1_MOSI / TIM16_BKIN / USART1_CK |
| 15 | PB4 | I/O | GPIO Port B, Pin 4 / SPI1_MISO / TIM3_CH1 |
| 16 | PB3 | I/O | GPIO Port B, Pin 3 / SPI1_SCK / TIM1_CH2 / USART1_CK |
| 17 | PB2 | I/O | GPIO Port B, Pin 2 / SPI2_MOSI / TIM2_CH2 |
| 18 | PB1 | I/O | GPIO Port B, Pin 1 / SPI2_MISO / TIM1_CH3N / TIM3_CH4 |
| 19 | PB0 | I/O | GPIO Port B, Pin 0 / SPI2_SCK / TIM1_CH2N / TIM3_CH3 |
| 20 | PA0 | I/O | GPIO Port A, Pin 0 / USART2_CK / ADC_IN0 / COMP1_INP |
| EP | EP | P | Exposed pad (ground connection) |
Notes
- Package: QFN-20-EP(3x3) with exposed pad (EP)
- Pin 9 (NRST): Active-low reset input; typically requires external pull-up and decoupling capacitor
- Pin 10 (VSS): Ground; multiple ground connections recommended for proper layout
- Pin 11 (VCC): Main power supply; requires decoupling capacitor (typically 100 nF ceramic + 10 µF bulk)
- Exposed Pad (EP): Should be connected to ground (VSS) for thermal and electrical performance
- Port A (PA0–PA15): 16 GPIO pins with multiple alternate functions (SPI, USART, TIM1, ADC, comparator)
- Port B (PB0–PB7): 8 GPIO pins with alternate functions (SPI, I2C, timers)
- Port F (PF0–PF4): Not present in QFN-20 package (available only in larger packages like LQFP32/QFN32)
- SWD Debug: PA13 (SWD_IO) and PA14 (SWD_CLK) support serial wire debug interface
- All GPIO pins support external interrupts (EXTI) and are 5V-tolerant when operating at 5V supply
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