PY32F003F18P6
The PY32F003F18P6 is an electronic component from Puya Semiconductor. View the full PY32F003F18P6 datasheet below including key specifications.
Official PY32F003F18P6 datasheet (PDF) — the source this page was extracted from.
Manufacturer
Puya SemiconductorPY32F003F18P6 Key Specifications
| Parameter | Value |
|---|---|
| Core | ARM Cortex-M0+, 32-bit |
| Internal clock sources | HSI (calibration values for 4/8/16/22.12/24 MHz) and LSI, plus an external HSE oscillator |
PY32F003F18P6 Overview
Part: PY32F003F18P6 — Puya Semiconductor (Shanghai) Co., Ltd
Type: 32-bit ARM Cortex-M0+ Microcontroller
Description: Member of the PY32F003 series of 32-bit ARM Cortex-M0+ microcontrollers. The supplied text is the series Reference Manual, which describes the architecture, memory, Flash, power, reset, clock and GPIO blocks.
Operating Conditions:
- Supply voltage, operating temperature and clock limits are not given in the supplied text. They are in the product datasheet, not the reference manual.
Absolute Maximum Ratings:
- Not given in the supplied text.
Key Specs:
- Core: ARM Cortex-M0+, 32-bit
- On-chip memory: embedded SRAM and Flash, with page, sector and mass erase operations
- Internal clock sources: HSI (calibration values for 4/8/16/22.12/24 MHz) and LSI, plus an external HSE oscillator
- Power monitoring: POR/PDR/BOR and a programmable voltage detector (PVD)
- Low-power modes: Sleep and Stop
- GPIO ports: A, B and F
Features:
- Embedded Flash with read protection, write protection, SDK area protection and option bytes
- Product Unique Identifier (UID)
- Clock security system (CSS) and clock-out capability
- HSI/LSI calibration using TIM14
- Several reset sources: power, NRST pin, watchdog, software and option byte loader
- GPIO with alternate function multiplexing, locking mechanism and external interrupt/wakeup lines
- Embedded boot loader and boot mode selection
Applications:
- Not listed in the supplied text.
Package:
- Package details are not given in the supplied text.
PY32F003F18P6 Features
- Main Flash block: maximum 64 KBytes (16 k x 32 bits)
- Information block: 4 KBytes (1 k x 32 bits)
- Page size: 128 Bytes
- Sector size: 4 KBytes
The Flash control interface circuit features:
- Flash write and erase
- Read protection
- Write protection
PY32F003F18P6 Pin Configuration
After reset (SYSRESETn or PORESETn), the pins used for the SW-DP are assigned as dedicated pins which are immediately usable by the debugger host.
However, the MCU offers the possibility to disable the SWD port and can then release the associated pins for general-purpose I/O (GPIO) usage.
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