PY32F002BF15U6TR
ARM Cortex-M0+ MCUThe PY32F002BF15U6TR is a arm cortex-m0+ mcu from Puya Semiconductor. View the full PY32F002BF15U6TR datasheet below including pinout.
Manufacturer
Puya Semiconductor
Category
ARM Cortex-M0+ MCU
Package
TSSOP20, QFN20, SOP16, SOP14, MSOP10
Overview
Part: PY32F002BF15U6TR — PangoMicro Type: ARM Cortex-M0+ MCU
Description: A 32-bit ARM Cortex-M0+ microcontroller operating at up to 24 MHz, featuring 24 KB Flash, 3 KB SRAM, a 12-bit ADC, and various communication interfaces, with a wide operating voltage range of 1.7 V to 5.5 V.
Operating Conditions:
- Supply voltage: 1.7–5.5 V
- Operating temperature: -40 to 85 °C
- Internal AHB clock frequency: 0–48 MHz
- Internal APB clock frequency: 0–48 MHz
Absolute Maximum Ratings:
- Max supply voltage: 6.25 V
- Max continuous current: 80 mA (total current into VCC pin)
- Max junction/storage temperature: 150 °C
Key Specs:
- CPU: 32-bit ARM Cortex-M0+
- Max CPU frequency: 24 MHz
- Flash memory: 24 Kbytes
- SRAM: 3 Kbytes
- ADC: 1 x 12-bit, up to 8 external + 2 internal channels
- I/O drive current: 8 mA
- Stop mode current (VCC 1.7-5.5V, LSI OFF, No peripherals): 1.1 μA
- Stop mode wake-up time (MR supply, HSI 24MHz): 6.4 μs
- External clock frequency (fHSE_ext): 0–32 MHz
Features:
- Internal 24 MHz RC oscillator (HSI)
- Internal 32.768 KHz RC oscillator (LSI)
- 32.768 KHz low-speed crystal oscillator (LSE)
- Low-power modes: Sleep/Stop
- Power-on/Power-down Reset (POR/PDR)
- Brown-out Reset (BOR)
- Up to 18 I/O pins, all configurable as external interrupts
- 1 x 16-bit advanced control timer (TIM1)
- 1 x 16-bit general-purpose timer (TIM14)
- 1 x low-power timer (LPTIM) with Stop mode wake-up
- 1 x independent watchdog timer (IWDT)
- 1 x SysTick timer
- 1 x SPI interface
- 1 x USART interface with auto-baud rate detection
- 1 x I2C interface (standard 100 KHz, fast 400 KHz, 7-bit addressing)
- Hardware CRC-32 module
- 2 x comparators
- Unique UID
- Serial Wire Debug (SWD)
Applications:
- Controllers
- Handheld devices
- PC peripherals
- Gaming and GPS platforms
- Industrial applications
Package:
- TSSOP20
- QFN20
- SOP16
- SOP14
- MSOP10
Pin Configuration
PY32F002BF15U6TR Pinout
Package: QFN-20-EP (3×3 mm)
| Pin Number | Pin Name | Type | Port Type | Description / Alternate Functions |
|---|---|---|---|---|
| 1 | PC0-NRST | I/O | RST | Reset; TIM1_CH1N, EVENTOUT, SWDIO; ADC_IN5, NRST |
| 2 | PC1-OSCIN | I/O | COM | Oscillator input; SPI_MISO, SPI_MOSI; OSCIN |
| 3 | PB7-OSCOUT | I/O | COM | Oscillator output; TIM14_CH1; OSCOUT |
| 4 | VSS | S | — | Ground |
| 5 | PB6(SWDIO) | I/O | COM | SPI_MISO, USART_TX, I2C_SDA, SWDIO; ADC_IN6 |
| 6 | VCC | S | — | Digital power supply |
| 7 | PB5 | I/O | COM | USART_RX, TIM1_CH3, TIM14_CH1, USART_TX |
| 8 | PB4 | I/O | COM | I2C_SDA, TIM1_BKIN, I2C_SCL |
| 9 | PB3 | I/O | COM | TIM1_ETR, CMP1_OUT, SPI_SCK |
| 10 | PB2 | I/O | COM | TIM1_CH1N, TIM1_CH3 |
| 11 | PB1 | I/O | COM | USART_RTS, TIM1_CH2N, TIM1_CH4; ADC_IN0, CMP1_INP, CMP1_INM |
| 12 | PB0 | I/O | COM | USART_CK, TIM1_CH2, TIM1_CH3N; ADC_IN0, CMP1_INM |
| 13 | PA0 | I/O | COM | USART_CK, TIM1_CH1, TIM1_CH2, TIM1_CH3N, SPI_MOSI |
| 14 | PA1 | I/O | COM | SPI_MISO, TIM1_CH2 |
| 15 | PA2(SWCLK) | I/O | COM | USART_RX, I2C_SCL, SWCLK, TIM1_CH4, CMP2_OUT |
| 16 | PA3 | I/O | COM | USART_TX, TIM1_CH2 |
| 17 | PA4 | I/O | COM | USART_RX, TIM1_CH3, TIM14_CH1; ADC_IN2, CMP2_INM |
| 18 | PA5 | I/O | COM | USART_CK, TIM1_CH1 |
| 19 | PA6 | I/O | COM | SPI_NSS, USART_TX, EVENTOUT; ADC_IN3, External_clock_in |
| 20 | PA7 | I/O | COM | SPI_MOSI, USART_RX, MCO, USART_TX, TIM1_CH4; ADC_IN4, NRST |
| EP | GND | S | — | Exposed pad (ground) |
Notes
- PC0-NRST (Pin 1): Pin function (PC0 vs. NRST/SWDIO) is configurable via option bytes.
- PA2(SWCLK) (Pin 15): After reset with option byte configuration 0/0, 0/1, or 1/0, PA2 is configured as SWCLK with internal pull-down resistor active.
- PB6(SWDIO) (Pin 5): After reset with option byte configuration 0/0, 0/1, or 1/0, PB6 is configured as SWDIO with internal pull-up resistor active.
- PC0 and PA2 alternate: When option byte is configured as 1/1, PC0 and PA2 are configured as SWDIO and SWCLK respectively (instead of PB6 and PA2).
- ADC channels: Multiple pins support analog input (ADC_IN0–ADC_IN6).
- Comparator inputs/outputs: CMP1 and CMP2 functions available on select pins.
Ordering Information
| MPN | Package | Temperature Range | Packing |
|---|---|---|---|
| PY32F002BF15 | TSSOP20 | -40 ~ 85° C | null |
| PY32F002BF15 | QFN20 | -40 ~ 85° C | null |
| PY32F002BW15 | SOP16 | -40 ~ 85° C | null |
| PY32F002BD15 | SOP14 | -40 ~ 85° C | null |
| PY32F010MA15 | MSOP10 | -40 ~ 85° C | null |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| PY32F002B | Puya Semiconductor | — |
| PY32F002BD15 | Puya Semiconductor | SOP14 |
| PY32F002BF15 | Puya Semiconductor | QFN20 |
| PY32F002BW15 | Puya Semiconductor | SOP16 |
| PY32F010MA15 | Puya Semiconductor | MSOP10 |
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