PCA9557PW,118
The PCA9557PW,118 is an electronic component from Texas Instruments. View the full PCA9557PW,118 datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Package
TSSOP-16
Overview
Part: PCA9557 — Texas Instruments
Type: 8-Bit I/O Expander
Description: An 8-bit I/O expander for I2C and SMBus, designed for 2.3V to 5.5V VCC operation, featuring 5V tolerant I/O ports, 400kHz Fast I2C bus, and high-current drive capability for directly driving LEDs.
Operating Conditions:
- Supply voltage: 2.3V to 5.5V
- Operating temperature: -40 to 85 °C
- I2C clock frequency: 100 kHz (Standard Mode), 400 kHz (Fast Mode)
Absolute Maximum Ratings:
- Max supply voltage: 6 V
- Max continuous output low current: 50 mA
- Max continuous output high current: -50 mA
- Max storage temperature: 150 °C
Key Specs:
- Standby current consumption: 0.9 μA (max, at 3.6V VCC, f SCL = 0 kHz)
- P-port high-level output current (P7-P1): -10 mA (max)
- P-port low-level output current (P7-P0): 25 mA (max)
- I/O configuration: Power up as inputs, configurable as inputs or outputs
- I2C bus capacitive load: 400 pF (max)
- ESD protection (HBM): ±2000 V
- ESD protection (CDM): ±1000 V
- Output data valid time (SCL to P1-P7): 200 ns (max)
Features:
- Low standby current consumption of 1μA maximum
- 5V Tolerant I/O ports
- 400kHz Fast I2C bus
- Three hardware address pins allow for use of up to eight devices on I2C/SMBus
- Input and output configuration register
- Polarity inversion register
- Active-low reset input
- Internal power-on reset
- High-impedance open drain on P0
- Latched outputs with high current drive maximum capability for directly driving LEDs
Applications:
- Telecom shelters: filter units
- Servers
- Routers (telecom switching equipment)
- Personal computers
- Personal electronics
- Industrial automation
- Products with GPIO-limited
Package:
- D (SOIC, 16)
- DB (SSOP, 16)
- DGV (TVSOP, 16)
- PW (TSSOP, 16)
- RGY (VQFN, 16)
- RGV (VQFN, 16)
Features
- Low standby current consumption of 1μA maximum
- I 2 C to parallel port expander
- Operating power-supply voltage range of 2.3V to 5.5V
- 5V Tolerant I/O ports
- 400kHz Fast I 2 C bus
- Three hardware address pins allow for use of up to eight devices on I 2 C/SMBus
- Lower-voltage higher-performance migration path for PCA9556
- Input and output configuration register
- Polarity inversion register
- Active-low reset input
- Internal power-on reset
- High-impedance open drain on P0
- Power up with all channels configured as inputs
- No glitch on power up
- Noise filter on SCL or SDA inputs
- Latched outputs with high current drive maximum capability for directly driving LEDs
- Latch-up performance exceeds 100mA per JESD 78, class II
- ESD protection exceeds JESD 22
- -2000V Human-body model (A114-A)
- -200V Machine model (A115-A)
- -1000V Charged-device model (C101)
Applications
- Telecom shelters: filter units
- Servers
- Routers (telecom switching equipment)
- Personal computers
- Personal electronics
- Industrial automation
- Products with GPIO-limited
Pin Configuration
Figure 4-1. D, DB, DGV, PW Package, 16-Pin SOIC, SSOP, TVSOP, or TSSOP (Top View)
Figure 4-2. RGY or RGV Package, 16-Pin VQFN or VQFN (Top View)
Table 4-1. Pin Functions
| PIN | PIN | TYPE (1) | DESCRIPTION |
|---|---|---|---|
| NAME | NO. | TYPE (1) | DESCRIPTION |
| SCL | 1 | I | Serial clock bus. Connect to V CC through a pullup resistor. |
| SDA | 2 | I/O | Serial data bus. Connect to V CC through a pullup resistor. |
| A0 | 3 | I | Address input. Connect directly to V CC or ground. |
| A1 | 4 | I | Address input. Connect directly to V CC or ground. |
| A2 | 5 | I | Address input. Connect directly to V CC or ground. |
| P0 | 6 | I/O | P-port input/output. High impedance open-drain design structure. Connect to V CC through a pullup resistor. |
| P1 | 7 | I/O | P-port input/output. Push-pull design structure |
| GND | 8 | G | Ground |
| P2 | 9 | I/O | P-port input/output. Push-pull design structure |
| P3 | 10 | I/O | P-port input/output. Push-pull design structure |
| P4 | 11 | I/O | P-port input/output. Push-pull design structure |
| P5 | 12 | I/O | P-port input/output. Push-pull design structure |
| P6 | 13 | I/O | P-port input/output. Push-pull design structure |
| P7 | 14 | I/O | P-port input/output. Push-pull design structure |
| RESET | 15 | I | Active-low reset input. Connect to V CC through a pullup resistor if no active connection is used. |
| V CC | 16 | P | Supply voltage |
(1) I = input, O = output, P = power, G = Ground
Table 4-1. Pin Functions
Figure 4-3. RGV Package, 16-Pin QFN (Top View)
Table 4-2. Pin Functions, RGV
| PIN | PIN | TYPE (1) | DESCRIPTION |
|---|---|---|---|
| NAME | NO. | TYPE (1) | DESCRIPTION |
| A0 | 1 | I | Address input. Connect directly to V CC or ground. |
| A1 | 2 | I | Address input. Connect directly to V CC or ground. |
| A2 | 3 | I | Address input. Connect directly to V CC or ground. |
| P0 | 4 | I/O | P-port input/output. High impedance open-drain design structure. Connect to V CC through a pullup resistor. |
| P1 | 5 | I/O | P-port input/output. Push-pull design structure |
| GND | 6 | G | Ground |
| P2 | 7 | I/O | P-port input/output. Push-pull design structure |
| P3 | 8 | I/O | P-port input/output. Push-pull design structure |
| P4 | 9 | I/O | P-port input/output. Push-pull design structure |
| P5 | 10 | I/O | P-port input/output. Push-pull design structure |
| P6 | 11 | I/O | P-port input/output. Push-pull design structure |
| P7 | 12 | I/O | P-port input/output. Push-pull design structure |
| RESET | 13 | I | Active-low reset input. Connect to V CC through a pullup resistor if no active connection is used. |
| V CC | 14 | P | Supply voltage |
| SCL | 15 | I | Serial clock bus. Connect to V CC through a pullup resistor. |
| SDA | 16 | I/O | Serial data bus. Connect to V CC through a pullup resistor. |
(1) I = input, O = output, P = power, G = Ground
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
| PARAMETER | PARAMETER | TEST CONDITIONS | VCC | MIN | TYP (1) | MAX | UNIT |
|---|---|---|---|---|---|---|---|
| V IK | Input diode clamp voltage | I I = -18mA | 2.3V to 5.5V | -1.2 | V | ||
| V POR | Power-on reset voltage (3) | V I = V CC or GND, I O = 0 I OH = -8mA | V POR 2.3V 3V 4.5V 4.75V | 1.8 2.6 3 4.1 | 1.65 | 2.1 | V |
| V OH | P-port high-level output voltage | I OH = -10mA | 2.3V 3V 4.5V 4.75V | 1.5 2.5 3 4 | V | ||
| SDA | V OL = 0.4V V OL = 0.5V | 2.3V to 5.5V | 3 8 | 20 | |||
| I OL | P port (2) | V OL = 0.55V V OL = 0.7V | 2.3V to 5.5V | 8 10 | 20 24 | mA | |
| P port, except for P0 (2) | V OH = 2.3V | 2.3V to 5.5V | -4 | mA | |||
| I OH | P0 (2) | V OH = 4.6V | 4.6V to 5.5V | 1 | |||
| SCL, SDA | V OH = 3.3V | 3.3V to 5.5V 2.3V to 5.5V | 1 ±1 | μA | |||
| I I | A2-A0, RESET | V I = V CC or GND | ±1 | μA | |||
| I IH | P port | V I = V CC | 2.3V to 5.5V | 1 | μA | ||
| I IL | P port | V I = GND | 2.3V to 5.5V 5.5V | 19 | 1 25 | μA | |
| V I = V CC or GND, I O = 0, I/O = inputs, f = 400 kHz | 3.6V | 12 | 22 | ||||
| SCL | 2.7V | 8 | 20 | ||||
| Operating mode | 5.5V | 1.5 | 5 | ||||
| I CC | V I = V CC or GND, I O = 0, I/O = inputs, f = 100 kHz | 3.6V | 1 | 4 | μA | ||
| SCL | 2.7V 5.5V | 0.6 0.25 | 3 1 | ||||
| Standby mode | V I = V CC or GND, I O = 0, I/O = | 3.6V | 0.25 | 0.9 | |||
| inputs, f SCL = 0 kHz | 2.7V | 0.2 | 0.8 |
over recommended operating free-air temperature range (unless otherwise noted)
| PARAMETER | PARAMETER | TEST CONDITIONS | VCC | MIN | TYP (1) | MAX | UNIT |
|---|---|---|---|---|---|---|---|
| ΔI CC | Additional current in standby mode | One input at V CC - 0.6 V, Other inputs at V CC or GND | 2.3V to 5.5V | 0.2 | mA | ||
| ΔI CC | Every LED I/O at V I = 4.3 V, f SCL = 0 kHz | 5.5V | 0.4 | mA | |||
| C I | SCL | V I = V CC or GND | 2.3V to 5.5 V | 4 | 6 | pF | |
| C io | SDA | V IO = V CC or GND | 2.3V to 5.5V | 5.5 | 8 | pF | |
| C io | P port | V IO = V CC or GND | 2.3V to 5.5V | 7.5 | 9.5 | pF |
- (1) All typical values are at nominal supply voltage (2.5, 3.3, or 5V VCC) and TA = 25°C.
- (2) Each I/O must be externally limited to a maximum of 25mA, and the P port (P7-P0) must be limited to a maximum current of 200mA.
(3) The total current sourced by all I/Os must be limited to 85mA per bit.
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) see (1)
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| V CC | Supply voltage | Supply voltage | -0.5 | 6 | V |
| V I | Input voltage (2) | Input voltage (2) | -0.5 | 6 | V |
| V O | Output voltage (2) | Output voltage (2) | -0.5 | 6 | V |
| I IK | Input clamp current | V I < 0 | -20 | mA | |
| I OK | Output clamp current | V O < 0 | -20 | mA | |
| I IOK | Input/output clamp current | V O < 0 or V O > V CC | -20 | μA | |
| I OL | Continuous output low current | V O = 0 to V CC | 50 | mA | |
| I OH | Continuous output high current | V O = 0 to V CC | -50 | mA | |
| I CC | Continuous current through GND | Continuous current through GND | -250 | mA | |
| I CC | Continuous current through V CC | Continuous current through V CC | 160 | mA | |
| T stg | Storage temperature | Storage temperature | -65 | 150 | °C |
Recommended Operating Conditions
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| V CC | Supply voltage | Supply voltage | 2.3 | 5.5 | V |
| V IH | High-level input voltage | SCL, SDA | 0.7 × V CC | 5.5 | V |
| A2-A0, P7-P0, RESET | 2.2 | 5.5 | V | ||
| V IL | SCL, SDA | -0.5 | 0.3 × V CC | V | |
| Low-level input voltage | A2-A0, P7-P0, (RESET V CC > 2.4V) | -0.5 | 0.8 | V | |
| RESET V CC ≤ 2.4V | -0.5 | 0.75 | V | ||
| I OH | High-level output current | P7-P1 | -10 | mA | |
| I OL | Low-level output current | P7-P0 | 25 | mA | |
| T A | Operating free-air temperature | Operating free-air temperature | -40 | 85 | °C |
Thermal Information
over operating free-air temperature range (unless otherwise noted)
| PCA9557 | PCA9557 | PCA9557 | PCA9557 | PCA9557 | PCA9557 | ||
|---|---|---|---|---|---|---|---|
| THERMAL METRIC (1) | THERMAL METRIC (1) | D (SSOP) | DB (SSOP) | DGV (SSOP) | PW (SSOP) | RGV (VQFN) | RGY (VQFN) |
| 16 PINS | 16 PINS | 16 PINS | 16 PINS | 16 PINS | 16 PINS | ||
| R θJA | Junction-to-ambient thermal resistance | 77.2 | 82 | 120 | 98.0 | 44.5 | 47 |
| R θJC(top) | Junction-to-case (top) thermal resistance | 40.0 | 30.7 | 40.1 | |||
| R θJB | Junction-to-board thermal resistance | 39.2 | 52.7 | 20.2 | |||
| ψ JT | Junction-to-top characterization parameter | 6.5 | 1.0 | 0.9 | |||
| ψ JB | Junction-to-board characterization parameter | 38.8 | 52.1 | 20.2 | |||
| R θJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | 5.7 |
Typical Application
Figure 8-1 shows an application in which the PCA9557 can be used.
Package Information
| PART NUMBER | PACKAGE (1) | PACKAGE SIZE (2) |
|---|---|---|
| PCA9557 | D (SOIC, 16) | 9.9mm × 6mm |
| PCA9557 | DB (SSOP, 16) | 6.2mm × 7.8mm |
| PCA9557 | DGV (TVSOP, 16) | 3.6mm × 6.4mm |
| PCA9557 | PW (TSSOP, 16) | 5mm × 6.4mm |
| PCA9557 | RGY (VQFN, 16) | 4mm × 3.5mm |
| PCA9557 | RGV (VQFN, 16) | 4mm × 4mm |
- (1) For more information, see Section 11.
- (2) The package size (length × width) is a nominal value and includes pins, where applicable.
Logic Diagram
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| PCA9557 | Texas Instruments | — |
| PCA9557D | Texas Instruments | — |
| PCA9557DB | Texas Instruments | — |
| PCA9557DB.A | Texas Instruments | — |
| PCA9557DBR | Texas Instruments | — |
| PCA9557DBR.A | Texas Instruments | — |
| PCA9557DGVR | Texas Instruments | — |
| PCA9557DGVR.A | Texas Instruments | — |
| PCA9557DR | Texas Instruments | — |
| PCA9557DR.A | Texas Instruments | — |
| PCA9557PW | Texas Instruments | D (SOIC, 16) |
| PCA9557PWR | Texas Instruments | — |
| PCA9557PWR.A | Texas Instruments | — |
| PCA9557PWRG4 | Texas Instruments | — |
| PCA9557PWRG4.A | Texas Instruments | — |
| PCA9557PWT | Texas Instruments | — |
| PCA9557RGVR | Texas Instruments | — |
| PCA9557RGVR.A | Texas Instruments | — |
| PCA9557RGYR | Texas Instruments | — |
| PCA9557RGYR.A | Texas Instruments | — |
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