OPA2277

Part: OPA277, OPA2277, OPA4277 from Texas Instruments

Type: High-Precision Operational Amplifiers

Key Specs:

• Ultra-low offset voltage: 10 μV
• Ultra-low drift: ±0.1 μV/°C
• High open-loop gain: 134 dB
• High common-mode rejection: 140 dB
• High power-supply rejection: 130 dB
• Low bias current: 1-nA maximum
• Wide supply range: ±2 V to ±18 V
• Low quiescent current: 800 μA/amplifier

Features:

• Ultra-low offset voltage: 10 μV
• Ultra-low drift: ±0.1 μV/°C
• High open-loop gain: 134 dB
• High common-mode rejection: 140 dB
• High power-supply rejection: 130 dB
• Low bias current: 1-nA maximum
• Wide supply range: ±2 V to ±18 V
• Low quiescent current: 800 μA/amplifier
• Single, dual, and quad versions
• Replaces OP-07, OP-77, and OP-177
• Unity-gain stable
• Free from phase inversion and overload problems
• Excellent dynamic behavior over a wide range of load conditions
• Dual and quad versions feature completely independent circuitry for lowest crosstalk

Applications:

• Analog input module
• Weigh scale
• Temperature transmitter
• Pressure transmitter
• Data acquisition (DAQ)
• Lab and field instrumentation
• Battery test

Package:

• D (SOIC, 8): 3.91 mm × 4.90 mm
• DRM (VSON, 8): 4.00 mm × 4.00 mm
• P (PDIP, 8): 6.35 mm × 9.81 mm
• D (SOIC, 14): 3.91 mm × 8.65 mm
• P (PDIP, 14): 6.35 mm × 19.30 mm

• Ultra-low offset voltage: 10 μV • Ultra-low drift: ±0.1 μV/°C • High open-loop gain: 134 dB

• High common-mode rejection: 140 dB

• High power-supply rejection: 130 dB • Low bias current: 1-nA maximum • Wide supply range: ±2 V to ±18 V

• Low quiescent current: 800 μA/amplifier

• Single, dual, and quad versions

• Replaces OP-07, OP-77, and OP-177

• For similar performance with ±40-V overvoltage protection, see the OPA2206

• Analog input module
• Weigh scale
• Temperature transmitter
• Pressure transmitter
• Data acquisition (DAQ)
• Lab and field instrumentation
• Battery test

0.1-Hz to 10-Hz Noise

3 Description

The OPAx277 series of precision operational amplifiers replace the industry standard OP-177. The OPAx277 devices offer improved noise, wider output voltage swing, and are twice as fast with half the quiescent current. Features include ultra-low offset voltage and drift, low bias current, high commonmode rejection, and high power supply rejection.

The OPAx277 operate from ±2-V to ±18-V supplies with excellent performance. Unlike most op amps that are specified at only one supply voltage, the OPAx277 series is specified for real-world applications; a single limit applies over the ±5-V (10-V) to ±15-V (30-V) supply range. High performance is maintained as the amplifiers swing to the specified limits. Because the initial offset voltage (±20 μV, maximum) is so low, user adjustment is usually not required. However, the single version (OPA277) provides external trim pins for special applications.

The OPAx277 are easy to use and free from phase inversion and the overload problems found in some other op amps. These devices are unity-gain stable and provide excellent dynamic behavior over a wide range of load conditions. Dual and quad versions feature completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded.

Device Information

PART NUMBER	PACKAGE(1)	BODY SIZE (NOM)
	D (SOIC, 8)	3.91 mm × 4.90 mm
OPA277, OPA2277	DRM (VSON, 8)	4.00 mm × 4.00 mm
	P (PDIP, 8)	6.35 mm × 9.81 mm
	D (SOIC, 14)	3.91 mm × 8.65 mm
OPA4277	P (PDIP, 14)	6.35 mm × 19.30 mm

(1) For all available packages, see the orderable addendum at the end of the data sheet.

Figure 5-1. OPA277 P Package, 8-Pin PDIP and D Package, 8-Pin SOIC (Top View)

Figure 5-2. OPA277 DRM Package, 8-Pin VSON (Top View)

Table 5-1. Pin Functions: OPA277

PIN
NAME
–In
+In
NC
Offset Trim
Offset Trim
Output
V–
V+

Figure 5-3. OPA2277 P Package, 8-Pin PDIP and D Package, 8-Pin SOIC (Top View)

Figure 5-4. OPA2277 DRM Package, 8-Pin VSON (Top View)

Table 5-2. Pin Functions: OPA2277

	PIN
NAME	D (SOIC), P (PDIP)
–In A	2
–In B	6
+In A	3
+In B	5
Out A	1
Out B	7
V–	4
V+	8

Figure 5-5. OPA4277 P Package, 14-Pin PDIP and D Package, 14-Pin SOIC (Top View)

Table 5-3. Pin Functions: OPA4277

	PIN
NAME	NO.
–In A	2
–In B	6
–In C	9
–In D	13
+In A	3
+In B	5
+In C	10
+In D	12
Out A	1
Out B	7
Out C	8
Out D	14
V+	4
V–	11

	PARAMETER		at TA = 25°C, VS = 10 V to 30 V, VCM = VOUT = VS / 2, and RL = 2 kΩ connected to VS / 2 (unless otherwise noted) TEST CONDITIONS	MIN	TYP	MAX	UNIT
	OFFSET VOLTAGE
		OPA277P, U			±10	±20
		OPA2277P, U			±10	±25
		OPAx277PA, UA		±20	±50
		OPAx277AIDRM			±35	±100
VOS	Input offset voltage		OPA277P, U			±30	µV
			OPA2277P, U			±50
		TA = –40°C to +85°C	OPAx277PA, UA			±100
			OPAx277AIDRM			±165
			OPA277P, U		±0.1	±0.15
dVOS/dT	Input offset voltage drift	TA = –40°C to +85°C	OPA2277P, U		±0.1	±0.25	µV/°C
			OPAx277AIDRM, PA, UA		±0.15	±1
	Long-term drift				0.2		µV/mo
			OPAx277P, U		±0.3	±0.5
	Power-supply rejection	VS = ±2 V to ±18 V	OPAx277AIDRM, PA, UA		±0.3	±1
PSRR	ratio	VS = ±2 V to ±18 V,	OPAx277P, U			±0.5	µV/V
		TA = –40°C to +85°C	OPAx277AIDRM, PA, UA			±1
	Channel separation	dc
	(dual, quad)				0.1		µV/V
	INPUT BIAS CURRENT
IB		OPAx277P, U			±0.5	±1
	Input bias current	OPAx277AIDRM, PA, UA			±0.5	±2.8	nA
		TA = –40°C to +85°C	OPAx277P, U			±2
					±4
		OPAx277P, U			±0.5	±1
IOS	Input offset current	OPAx277AIDRM, PA, UA			±0.5	±2.8	nA
		TA = –40°C to +85°C	OPAx277P, U			±2
			OPAx277AIDRM, PA, UA			±4
NOISE
	Input voltage noise	f = 0.1 Hz to 10 Hz			0.22		µVPP
		f = 10 Hz			12
en	Input voltage noise	f = 100 Hz			8		nV/√Hz
	density	f = 1 kHz			8
		f = 10 kHz			8
in	Input current noise density	f = 1 kHz			0.2		pA/√Hz
INPUT VOLTAGE
VCM	Common-mode voltage range			(V–) + 2		(V+) – 2	V
			OPAx277P, U	130	140
	Common-mode rejection	VCM = (V–) + 2 V to (V+) – 2 V	OPAx277AIDRM, PA, UA	115	140
CMRR	ratio	VCM = (V–) + 2 V to (V+) – 2 V,	OPAx277P, U	128			dB
		TA = –40°C to +85°C	OPAx277AIDRM, PA, UA	115
	INPUT IMPEDANCE
ZID	Differential				100 3		MΩ pF
ZIC	Common-mode	VCM = (V–) + 2 V to (V+) – 2 V			250 3		GΩ pF

6.7 Electrical Characteristics (continued)

at TA = 25°C, VS = 10 V to 30 V, VCM = VOUT = VS / 2, and RL = 2 kΩ connected to VS / 2 (unless otherwise noted)

	PARAMETER	TEST CONDITIONS		MIN	TYP	MAX	UNIT
	OPEN-LOOP GAIN
		VO = (V–) + 0.5 V to (V+) – 1.2 V, RL = 10 kΩ			140
AOL	Open-loop voltage gain	VO = (V–) + 1.5 V to (V+) – 1.5 V,		126	134		dB
		RL = 2 kΩ	TA = –40°C to +85°C	126
	FREQUENCY RESPONSE
GBW	Gain-bandwidth product				1		MHz
SR	Slew rate				0.8		V/µs
	Settling time		To 0.1%		14
ts		VS = ±15 V, G = 1, 10-V step	To 0.01%		16		µs
tOR	Overload recovery time	VIN × G = VS			3		µs
THD+N	Total harmonic distortion + noise	G = 1, f = 1 kHz, VO = 3.5 VRMS			0.002%
OUTPUT
				(V–) + 0.5		(V+) – 1.2
		RL = 10 kΩ	TA = –40°C to +85°C	(V–) + 0.5		(V+) – 1.2
VO	Voltage output			(V–) + 1.5		(V+) – 1.5	V
		RL = 2 kΩ	TA = –40°C to +85°C	(V–) + 1.5		(V+) – 1.5
ISC	Short-circuit current				±35		mA
CL	Capacitive load drive			See Typical Characteristics
ZO	Open-loop output impedance	f = 1 MHz			40		Ω
POWER SUPPLY
	Quiescent current per				±790	±825
IQ	amplifier	IO = 0 A	TA = –40°C to +85°C			±900	µA

6.8 Typical Characteristics

At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.

Figure 6-1. Open-Loop Gain and Phase vs Frequency

Figure 6-2. Power Supply and Common-Mode Rejection vs Frequency

Figure 6-3. Input Noise and Current Noise Spectral Density vs Frequency

Figure 6-4. Input Noise Voltage vs Time

Figure 6-5. Channel Separation vs Frequency

Figure 6-6. Total Harmonic Distortion + Noise vs Frequency

6.8 Typical Characteristics (continued)

At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.

6.8 Typical Characteristics (continued)

At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.

15 Common-Mode Voltage (V) –15 –10 –5 0 5 10 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 ∆IB (nA) V^S = ±5V V^S = ±15V Curve shows normalized change in bias current with respect to VCM = 0V. Typical I ^B may range from –0.5nA to +0.5nA at V CM = 0V.

Figure 6-13. Change in Input Bias Current vs Power-Supply Voltage

Figure 6-14. Change in Input Bias Current vs Common-Mode Voltage

Figure 6-15. Quiescent Current vs Supply Voltage

Figure 6-16. Settling Time vs Closed-Loop Gain

Figure 6-17. Maximum Output Voltage vs Frequency

Figure 6-18. Output Voltage Swing vs Output Current

6.8 Typical Characteristics (continued)

At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.

Figure 6-19. Small-Signal Overshoot vs Load Capacitance

Figure 6-20. Large-Signal Step Response

G = 1, CL = 1500 pF, VS = ±15 V

Figure 6-21. Small-Signal Step Response

G = 1, CL = 0, VS = ±15 V

Figure 6-22. Small-Signal Step Response

G = 1, CL = 1500 pF, VS = ±15 V

Figure 6-23. Open-Loop Output Impedance

7 Detailed Description

7.1 Overview

The OPAx277 series precision operational amplifiers replace the industry standard OP-177. These devices offer improved noise, wider output voltage swing, and are twice as fast with half the quiescent current. Features include ultra-low offset voltage and drift, low bias current, high common-mode rejection, and high power-supply rejection.

7.2 Functional Block Diagram

7.3 Feature Description

The OPAx277 series is unity-gain stable and free from unexpected output phase reversal, making these devices easy to use in a wide range of applications. Applications with noisy or high-impedance power supplies can require decoupling capacitors close to the device pins. In most cases 0.1-µF capacitors are adequate.

The OPAx277 series has low offset voltage and drift. To achieve highest performance, optimize the circuit layout and mechanical conditions. Offset voltage and drift can be degraded by small thermoelectric potentials at the operational amplifier inputs. Connections of dissimilar metals generate thermal potential, which can degrade the ultimate performance of the OPAx277 series. To cancel these thermal potentials, make sure that the thermal potentials are equal in both input pins.

• Keep the thermal mass of the connections to the two input pins similar
• · Locate heat sources as far as possible from the critical input circuitry
• · Shield operational amplifier and input circuitry from air currents, such as cooling fans

7.3.1 Operating Voltage

The OPAx277 series of operational amplifiers operate from $\pm 2\text{-V}$ to $\pm 18\text{-V}$ supplies with excellent performance. Unlike most operational amplifiers, which are specified at only one supply voltage, the OPAx277 series is specified for real-world applications; a single limit applies over the $\pm 5\text{-V}$ to $\pm 15\text{-V}$ supply range. This single limit allows a customer operating at $V_S = \pm 10$ V to have the same specified performance as a customer using $\pm 15\text{-V}$ supplies. In addition, key parameters are specified over the specified temperature range of $-40^{\circ}\text{C}$ to $+85^{\circ}\text{C}$ . Most behavior remains unchanged through the full operating voltage range of $\pm 2$ V to $\pm 18$ V. Parameters that vary significantly with operating voltage or temperature are shown in Section 6.8.

7.3.2 Offset Voltage Adjustment

The OPAx277 series is laser-trimmed for low offset voltage and drift, so most circuits do not require external adjustment. However, for the OPA277, offset voltage trim connections are provided on pins 1 and 8. Figure 7-1 shows how the offset voltage can be adjusted by connecting a potentiometer. Only use this adjustment to null the offset of the operational amplifier. Do not use this adjustment to compensate for offsets created elsewhere in a system, because additional temperature drift can be introduced.

Figure 7-1. OPA277 Offset Voltage Trim Circuit

7.3.3 Input Protection

The inputs of the OPAx277 devices protected with 1-kΩ series input resistors and diode clamps. The inputs can withstand ±30-V differential inputs without damage. The protection diodes conduct current when the inputs are overdriven. This conducted current can disturb the slewing behavior of unity-gain follower applications, but does not damage the operational amplifier.

Figure 7-2. OPAx277 Input Protection

7.3.4 Input Bias Current Cancellation

The input stage base current of the OPAx277 series is internally compensated with an equal and opposite cancellation circuit. The resulting input bias current is the difference between the input stage base current and the cancellation current. This residual input bias current can be positive or negative.

When the bias current is canceled in this manner, the input bias current and input offset current are approximately the same magnitude. As a result, a bias current cancellation resistor is not necessary, as is often done with other operational amplifiers. Figure 7-3 shows a conventional op amp with external bias current cancellation resistor compared to the OPA277 with no external bias current cancellation resistor. A resistor added to cancel input bias current errors can actually increase offset voltage and noise.

Figure 7-3. Input Bias Current Cancellation

7.3.5 EMI Rejection Ratio (EMIRR)

The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of operational amplifiers. An adverse effect that is common to many operational amplifiers is a change in the offset voltage as a result of RF signal rectification. An operational amplifier that is more efficient at rejecting this change in offset as a result of EMI has a higher EMIRR and is quantified by a decibel value. Measuring EMIRR can be performed in many ways, but this report provides the EMIRR IN+, which specifically describes the EMIRR performance when the RF signal is applied to the noninverting input pin of the operational amplifier. In general, only the noninverting input is tested for EMIRR for the following three reasons:

• 1. Operational amplifier input pins are known to be the most sensitive to EMI, and typically rectify RF signals better than the supply or output pins.
• 1. The noninverting and inverting operational amplifier inputs have symmetrical physical layouts and exhibit nearly matching EMIRR performance.
• 1. EMIRR is easier to measure on noninverting pins than on other pins because the noninverting input terminal can be isolated on a printed circuit board (PCB). This isolation allows the RF signal to be applied directly to the noninverting input terminal with no complex interactions from other components or connecting PCB traces.

A more formal discussion of the EMIRR IN+ definition and test method is provided in the EMI Rejection Ratio of Operational Amplifiers application note, available for download at www.ti.com. Figure 7-4 shows the EMIRR IN+ of the OPA277 plotted versus frequency.

Figure 7-4. OPA277 EMIRR IN+ vs Frequency

If available, any dual and quad operational amplifier device versions have nearly similar EMIRR IN+ performance. The OPA277 unity-gain bandwidth is 1 MHz. EMIRR performance below this frequency denotes interfering signals that fall within the operational amplifier bandwidth.

Table 7-1 shows the EMIRR IN+ values for the OPA277 at particular frequencies commonly encountered in real-world applications. Applications listed in Table 7-1 can be centered on or operated near the particular frequency shown. This information is of special interest to designers working with these types of applications, or working in other fields likely to encounter RF interference from broad sources, such as the industrial, scientific, and medical (ISM) radio band.

FREQUENCY	APPLICATION/ALLOCATION	EMIRR IN+
400 MHz	Mobile radio, mobile satellite-space operation, weather, radar, UHF	59.1 dB
900 MHz	GSM, radio com-nav-GPS (to 1.6 GHz), ISM, aeronautical mobile, UHF	77.9 dB
1.8 GHz	GSM, mobile personal comm. broadband, satellite, L-band	91.3 dB
2.4 GHz	802.11b/g/n, Bluetooth®, mobile personal comm, ISM, amateur radio-satellite, S-band	93.3 dB
3.6 GHz	Radiolocation, aero comm-nav, satellite, mobile, S-band	105.9 dB
5.0 GHz	802.11a/n, aero comm-nav, mobile comm, space-satellite operation, C-band	107.5 dB

7.3.5.1 EMIRR IN+ Test Configuration

Figure 7-5 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the operational amplifier noninverting input terminal using a transmission line. The operational amplifier is configured in a unity-gain buffer topology with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). A large impedance mismatch at the operational amplifier input causes a voltage reflection; however, this effect is characterized and accounted for when determining the EMIRR IN+. The resulting dc offset voltage is sampled and measured by the multimeter. The LPF isolates the multimeter from residual RF signals that can interfere with multimeter accuracy. See the EMI Rejection Ratio of Operational Amplifiers application note for more details.

Figure 7-5. EMIRR IN+ Test Configuration Schematic

7.4 Device Functional Modes

The OPAx277 has a single functional mode and is operational when the power-supply voltage is greater than 4 V (±2 V). The maximum power supply voltage for the OPAx277 is 36 V (±18 V).

over operating free-air temperature range (unless otherwise noted)(1)

		MIN	MAX	UNIT
VS	Supply voltage, VS = (V+) – (V–)		36	V
	Input voltage(2)	(V–) – 0.7	(V+) + 0.7	V
ISC	Output short circuit(3)	Continuous
TJ	Junction temperature		150	°C
TSTG	Storage temperature	–55	125	°C

• (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
• (2) Limit input signals that can swing more than 0.7 V beyond the supply rails to 10 mA or less.
• (3) Short-circuit to ground, one amplifier per package.

over operating free-air temperature range (unless otherwise noted)

			MIN	NOM	MAX	UNIT
		Single supply	4	30	36
VS	Supply voltage, VS = (V+) – (V–) Dual supply		±2	±15	±18	V
TA	Ambient temperature		–40		85	°C

THERMAL METRIC(1)		D (SOIC)	DRM (VSON)	P (PDIP)	UNIT
		8 PINS	8 PINS	8 PINS
RθJA	Junction-to-ambient thermal resistance	110.1	40.7	49.2	°C/W
RθJC(top)	Junction-to-case(top) thermal resistance	52.2	41.3	39.4	°C/W
RθJB	Junction-to-board thermal resistance	52.3	16.7	26.4	°C/W
ψJT	Junction-to-top characterization parameter	10.4	0.6	15.4	°C/W
ψJB	Junction-to-board characterization parameter	51.5	16.9	26.3	°C/W
RθJC(bot)	Junction-to-case(bottom) thermal resistance	N/A	3.3	N/A	°C/W

⁽¹⁾ For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report