NUC123SD4AN0

Part: NUC123 Series — Nuvoton Technology Corporation

Type: ARM Cortex-M0 32-bit Microcontroller

Description: A 32-bit ARM Cortex-M0 microcontroller with USB 2.0 Full-speed device, 10-bit ADC, operating up to 72 MHz, with up to 68 Kbytes Flash memory and 20 Kbytes SRAM.

Operating Conditions:

• Supply voltage: 2.5V ~ 5.5V
• Operating temperature: -40°C ~ +85°C (suffix-dependent — see Table 1-1 for grade-specific ranges)
• Max CPU frequency: 72 MHz

Absolute Maximum Ratings:

• Max supply voltage: 6.0 V
• Max junction/storage temperature: -55 to +150 °C

Key Specs:

• CPU: ARM Cortex-M0
• Max CPU frequency: 72 MHz
• Flash memory: Up to 68 Kbytes
• SRAM: Up to 20 Kbytes
• Operating voltage range: 2.5V to 5.5V
• ADC resolution: 10-bit SAR
• USB: USB 2.0 Full-speed device, 8 endpoints
• I/O supply voltage (VDDIO): 2.5V to 5.5V
• I/O sink/source current (per pin): ±25 mA

Features:

• 32-bit multiplier
• Nested Vectored Interrupt Controller (NVIC)
• Dual-channel APB
• Peripheral Direct Memory Access (PDMA) with CRC function
• 4 Kbytes loader ROM for ISP
• Multiple power modes
• Watchdog Timer (WDT) and Window Watchdog Timer (WWDT)
• UART, PS/2, I2C, SPI, I2S interfaces

Applications:

• Industrial control
• Consumer electronics
• Communication system applications (printers, touch panel, gaming keyboard, gaming joystick, USB audio, PC peripherals, alarm systems)

Package:

• 64L LQFP (7x7x1.4 mm)
• 48L LQFP (7x7x1.4 mm)
• 33L QFN (5x5x0.8 mm)

• Core
• -ARM ® Cortex ® -M0 core runs up to 72 MHz
• -One 24-bit system timer
• -Supports low power sleep mode
• -Single-cycle 32-bit hardware multiplier
• -NVIC for the 32 interrupt inputs, each with 4-levels of priority
• -Supports Serial Wire Debug with 2 watchpoints/4 breakpoints
• Built-in LDO for wide operating voltage ranges from 2.5 V to 5.5 V
• Flash Memory
• -36/68 KB Flash for program code
• -4 KB flash for ISP loader
• -Supports In-System Program (ISP) application code update
• -512 byte page erase for flash
• -Configurable Data Flash address and size for both 36KB and 68KB system
• -Supports 2-wire ICP update through SWD/ICE interface
• -Supports fast parallel programming mode by external programmer
• SRAM Memory
• -12/20 KB embedded SRAM
• -Supports PDMA mode
• PDMA (Peripheral DMA)
• -Supports 6 channels PDMA for automatic data transfer between SRAM and peripherals such as SPI, UART, I 2 S, USB 2.0 FS device, PWM and ADC
• -Supports CRC calculation with four common polynomials, CRC-CCITT, CRC-8, CRC16 and CRC-32
• Clock Control
• -Flexible selection for different applications
• -Built-in 22.1184 MHz high speed oscillator (Trimmed to 1%) for system operation, and low power 10 kHz low speed oscillator for watchdog and wake-up operation
• -Supports one PLL, up to 144 MHz, for high performance system operation
• -External 4~24 MHz high speed crystal input for precise timing operation
• GPIO
• -Four I/O modes:
• Quasi bi-direction
• Push-Pull output
• Open-Drain output
• Input only with high impendence
• -TTL/Schmitt trigger input selectable
• -I/O pin configured as interrupt source with edge/level setting
• -Supports High Driver and High Sink I/O mode
• Timer
• -Supports 4 sets of 32-bit timers with 24-bit up-timer and one 8-bit pre-scale counter
• -Independent clock source for each timer
• -Provides one-shot, periodic, toggle and continuous counting operation modes
• -Supports event counting function
• Watchdog/Windowed-Watchdog Timer
• -Multiple clock sources

• -8 selectable time-out period from 1.6ms ~ 26.0sec (depending on clock source)
• -Wake-up from Power-down or Idle mode
• -Interrupt or reset selectable on watchdog timer time-out
• -Interrupt on windowed-watchdog timer time-out
• -Reset on windowed-watchdog timer time-out or reload in an unexpected time window

Pin No	Pin No	Pin No	Pin Name	Type	Description
LQFP 64- pin	LQFP 48- pin	QFN 33- pin	Pin Name	Type	Description
1	3	1	PB.14	I/O	Digital GPIO pin
1	3	1	INT0	I	External interrupt 0 input pin
2			PB.13	I/O	Digital GPIO pin
3			PB.12	I/O	Digital GPIO pin
3			SPI1_SS0	I/O	SPI1 1 st slave select pin
3			CLKO	O	Frequency Divider output pin
4	4	2	PA.11	I/O	Digital GPIO pin
4	4	2	SPI1_CLK	I/O	SPI1 serial clock pin
4	4	2	SPI2_MOSI0	I/O	SPI2 1 st MOSI (Master Out, Slave In) pin
4	4	2	I2C1_SCL	I/O	I 2 C1 clock pin
5*	5*	3*	PA.10	I/O	Digital GPIO pin
5*	5*	3*	SPI1_MISO0	I/O	SPI1 1 st MISO (Master In, Slave Out) pin
5*	5*	3*	SPI2_MISO0	I/O	SPI2 1 st MISO (Master In, Slave Out) pin
5*	5*	3*	I2C1_SDA	I/O	I 2 C1 data input/output pin
6			PD.8	I/O	Digital GPIO pin
6			SPI1_MOSI0	I/O	SPI1 1 st MOSI (Master Out, Slave In) pin
7			PD.9	I/O	Digital GPIO pin
8			PD.10	I/O	Digital GPIO pin
8			CLKO	O	Frequency Divider output pin
9			PD.11	I/O	Digital GPIO pin
9			INT1	I	External interrupt 1 input pin
10	6	4	PB.4	I/O	Digital GPIO pin
10	6	4	UART1_RXD	I	UART1 data receiver input pin
10	6	4	SPI2_SS0	I/O	SPI2 1 st slave select pin
10	6	4	SPI1_SS1	I/O	SPI1 2 nd slave select pin
11	7	5	PB.5	I/O	Digital GPIO pin
11	7	5	UART1_TXD	O	UART1 data transmitter output pin
11	7	5	SPI2_CLK	I/O	SPI2 serial clock pin
12	8		PB.6	I/O	Digital GPIO pin
12	8		UART1_nRTS	O	UART1 request to send output pin
			SPI2_MOSI0	I/O	SPI2 1 st MOSI (Master Out, Slave In) pin
			PB.7	I/O	Digital GPIO pin
13	9		UART1_nCTS	I	UART1 clear to send input pin
			SPI2_MISO0	I/O	SPI2 1 st MISO (Master In, Slave Out) pin
14	10	6	LDO_CAP	P	LDO output pin
15	11	7	V DD	P	Power supply for I/O ports and LDO source for internal PLL and digital function. Voltage range is 2.5V ~ 5V.
16	12	8	V SS	P	Ground
17	13	9	USB_VBUS	USB	Power supply from USB host or hub
18	14	10	USB_VDD33_CAP	USB	Internal power regulator output 3.3V decoupling pin
19	15	11	USB_D-	USB	USB differential signal D-
20	16	12	USB_D+	USB	USB differential signal D+
21			PB.0	I/O	Digital GPIO pin
21			UART0_RXD	I	UART0 data receiver input pin
22			PB.1	I/O	Digital GPIO pin
22			UART0_TXD	O	UART0 data transmitter output pin
			PB.2	I/O	Digital GPIO pin
23			UART0_nRTS	O	UART0 request to send output pin
			TM2_EXT	I	Timer2 external capture input pin
			PB.3	I/O	Digital GPIO pin
24			UART0_nCTS	I	UART0 clear to send input pin
			TM3_EXT	I	Timer3 external capture input pin
			PC.5	I/O	Digital GPIO pin
25	17		SPI0_MOSI1	I/O	SPI0 2 nd MOSI (Master Out, Slave In) pin
			UART0_TXD	O	UART0 data transmitter output pin
			PC.4	I/O	Digital GPIO pin
26	18		SPI0_MISO1	I/O	SPI0 2 nd MISO (Master In, Slave Out) pin
			UART0_RXD	I	UART0 data receiver input pin
			PC.3	I/O	Digital GPIO pin
27	19	13	SPI0_MOSI0	I/O	SPI0 1 st MOSI (Master Out, Slave In) pin
			I2S_DO	O	I 2 S data output pin
			PC.2	I/O	Digital GPIO pin
28	20	14	SPI0_MISO0 I2S_DI	I/O	SPI0 1 st MISO (Master In, Slave Out) pin I 2 S data input pin
			PC.1	I	Digital GPIO pin
29	21	15	SPI0_CLK	I/O I/O	SPI0 serial clock pin

		I2S_BCLK	I/O	I 2 S bit clock pin
		PC.0	I/O	Digital GPIO pin
30	22	SPI0_SS0	I/O	SPI0 1 st slave select pin
		I2S_LRCLK	I/O	I 2 S left/right channel clock pin
		PB.10	I/O	Digital GPIO pin
31	23	SPI0_SS1	I/O	SPI0 2 nd slave select pin
		TM2	I/O	Timer2 event counter input / toggle output pin
		PB.9	I/O	Digital GPIO pin
		SPI1_SS1	I/O	SPI1 2 nd slave select pin
32	24	TM1	I/O	Timer1 event counter input / toggle output pin
		PWM1	I/O	PWM1 PWM output / capture input pin (NUC123xxxAEx Only)
		V SS	P	Ground
33		PC.13	I/O	Digital GPIO pin
		SPI1_MOSI1	I/O	SPI1 2 nd MOSI (Master Out, Slave In) pin
34	25	PWM3	I/O	PWM3PWM output / capture input pin
		CLKO	O	Frequency Divider output pin
		PC.12	I/O	Digital GPIO pin
		SPI1_MISO1	I/O	SPI1 2 nd MISO (Master In, Slave Out) pin
35	26	PWM2	I/O	PWM2PWM output / capture input pin
		I2S_MCLK	O	I 2 S master clock output pin
		PC.11	I/O	Digital GPIO pin
36	27	SPI1_MOSI0	I/O	SPI1 1 st MOSI (Master Out, Slave In) pin
		PC.10	I/O	Digital GPIO pin
37	28	SPI1_MISO0	I/O	SPI1 1 st MISO (Master In, Slave Out) pin
38		V DD	P	Power supply for I/O ports and LDO source for internal PLL and digital function. Voltage range is 2.5V ~ 5V.
		PC.9	I/O	Digital GPIO pin
39	29	SPI1_CLK	I/O	SPI1 serial clock pin
		PC.8	I/O	Digital GPIO pin
	30	SPI1_SS0	I/O	SPI1 1 st slave select pin
40		PWM0	I/O	PWM0 PWM output / capture input pin (NUC123xxxAEx Only)
		PA.15	I/O	Digital GPIO pin
41		PWM3	I/O	PWM3PWM output / capture input pin
	31	I2S_MCLK CLKO	O O	I 2 S master clock output pin Frequency Divider output pin
42		V SS	P	Ground
43	32	PA.14	I/O	Digital GPIO pin
43	32	PWM2	I/O	PWM2PWM output / capture input pin
44	33	PA.13	I/O	Digital GPIO pin
44	33	PWM1	I/O	PWM1PWM output / capture input pin
45	34	PA.12	I/O	Digital GPIO pin
45	34	PWM0	I/O	PWM0PWM output / capture input pin
46	35	ICE_DAT	I/O	Serial wired debugger data pin Note: It is recommended to use 100 kΩ pull-up resistor on ICE_DAT pin.
47	36	ICE_CLK	I	Serial wired debugger clock input pin Note: It is recommended to use 100 kΩ pull-up resistor on ICE_CLK pin.
48	37	AV DD	AP	Power supply for internal analog circuit
49	38	PD.0	I/O	Digital GPIO pin
49	38	ADC0	AI	ADC channel 0 analog input pin
49	38	SPI2_SS0	I/O	SPI2 1 st slave select pin
50	39	PD.1	I/O	Digital GPIO pin
50	39	SPI2_CLK	I/O	SPI2 serial clock pin
50	39	SPI0_SS1	I/O	SPI0 2 nd slave select pin
50	39	ADC1	AI	ADC channel 1 analog input pin
51	40	PD.2	I/O	Digital GPIO pin
51	40	SPI2_MISO0	I/O	SPI2 1 st MISO (Master In, Slave Out) pin
51	40	SPI0_MISO1	I/O	SPI0 2 nd MISO (Master In, Slave Out) pin
51	40	ADC2	AI	ADC channel 2 analog input pin
52	41	PD.3	I/O	Digital GPIO pin
52	41	SPI2_MOSI0	I/O	SPI2 1 st MOSI (Master Out, Slave In) pin
52	41	SPI0_MOSI1	I/O	SPI0 2 nd MOSI (Master Out, Slave In) pin
52	41	ADC3	AI	ADC channel 3 analog input pin
53	42	PD.4	I/O	Digital GPIO pin
53	42	ADC4	AI	ADC channel 4 analog input pin
53	42	SPI2_MISO1	I/O	SPI2 2 nd MISO (Master In, Slave Out) pin
54	43	PD.5	I/O	Digital GPIO pin
54	43	ADC5	AI	ADC channel 5 analog input pin
54	43	SPI2_MOSI1	I/O	SPI2 2 nd MOSI (Master Out, Slave In) pin
55		PB.15	I/O	Digital GPIO pin
55		INT1	I	External interrupt 1 input pin

			TM0_EXT	I	Timer0 external capture input pin
56	44	29	PF.0	I/O	Digital GPIO pin
56	44	29	XT1_OUT	O	External 4~24 MHz high speed crystal output pin
57	45	30	PF.1	I/O	Digital GPIO pin
57	45	30	XT1_IN	I	External 4~24 MHz high speed crystal input pin
58	46	31	nRESET	I	External reset input: Low active, set this pin low reset chip to initial state. With internal pull-up. Note: It is recommended to use 10 kΩ pull-up resistor and 10 μF capacitor on nRESET pin.
59			V SS	P	Ground
60			V DD	P	Power supply for I/O ports and LDO source for internal PLL and digital circuit. Voltage range is 2.5 V ~ 5V.
61	47		PF.2	I/O	Digital GPIO pin
61	47		ADC6	AI	ADC channel 6 analog input pin
61	47		I2C0_SDA	I/O	I 2 C0 data input/output pin
61	47		PS2_DAT	I/O	PS/2 data pin
62	48		PF.3	I/O	Digital GPIO pin
62	48		ADC7	AI	ADC channel 7 analog input pin
62	48		I2C0_SCL	I/O	I 2 C0 clock pin
62	48		PS2_CLK	I/O	PS/2 clock pin
63	1	32	PV SS	P	PLL ground
64	2		PB.8	I/O	Digital GPIO pin
64	2		TM0	I/O	Timer0 event counter input / toggle output pin

Note:

Pin Type I = Digital Input, O = Digital Output; AI = Analog Input; P = Power Pin; AP = Analog Power

(VDD -VSS = 5.5 V, TA = 25 C)

PARAMETER	SYM	SPECIFICATIONS	SPECIFICATIONS	SPECIFICATIONS	SPECIFICATIONS	TEST CONDITIONS
PARAMETER	SYM	MIN	TYP	MAX	UNIT	TEST CONDITIONS
Operation voltage	V DD	2.5		5.5	V	V DD = 2.5V ~ 5.5V up to 72 MHz
V DD rise rate to ensure internal operation correctly	V RISE	0.05			V/ms
Power ground	V SS AV SS	-0.3			V
LDO output voltage	V LDO	1.62	1.8	1.98	V	V DD > 2.5V
Analog operating voltage	AV DD	0	V DD		V	When system uses analog function, please refer to chapter 7.4 for corresponding analog operating voltage
Operating current Normal Run mode at 72 MHz	I DD1		36		mA	V DD = 5.5V at 72 MHz, All IP and PLL Enabled, XTAL = 12 MHz
Operating current Normal Run mode at 72 MHz	I DD2		21		mA	V DD = 5.5V at 72 MHz, All IP Disabled and PLL Enabled, XTAL = 12 MHz
Operating current Normal Run mode at 72 MHz	I DD3		35		mA	V DD = 3V at 72 MHz, All IP and PLL enabled, XTAL = 12 MHz
Operating current Normal Run mode at 72 MHz	I DD4		20		mA	V DD = 3V at 72 MHz, All IP Disabled and PLL Enabled, XTAL = 12 MHz
Operating current Normal Run mode at 12 MHz	I DD5		7		mA	V DD = 5.5V at 12 MHz, All IP Enabled and PLL Disabled, XTAL = 12 MHz
Operating current Normal Run mode at 12 MHz	I DD6		4		mA	V DD = 5.5V at 12 MHz, All IP and PLL Disabled, XTAL = 12 MHz
Operating current Normal Run mode at 12 MHz	I DD7		6		mA	V DD = 3V at 12 MHz, All IP Enabled and PLL Disabled, XTAL = 12 MHz
Operating current Normal Run mode at 12 MHz	I DD8		3		mA	V DD = 3V at 12 MHz, All IP and PLL Disabled, XTAL = 12 MHz
Operating current Normal Run mode	I DD9		4		mA	V DD = 5V at 4 MHz, All IP Enabled and PLL Disabled, XTAL = 4 MHz
PARAMETER		SPECIFICATIONS	SPECIFICATIONS	SPECIFICATIONS	SPECIFICATIONS	TEST CONDITIONS
	SYM	MIN	TYP	MAX	UNIT
at 4 MHz	I DD10		3		mA	V DD = 5V at 4 MHz, All IP and PLL Disabled, XTAL = 4 MHz
at 4 MHz	I DD11		4		mA	V DD = 3V at 4 MHz, All IP Enabled and PLL Disabled, XTAL = 4 MHz
at 4 MHz	I DD12		2		mA	V DD = 3V at 4 MHz, All IP and PLL Disabled, XTAL = 4 MHz
Operating current Idle mode at 72 MHz	I IDLE1		29		mA	V DD = 5.5V at 72 MHz, All IP and PLL Enabled, XTAL = 12 MHz
	I IDLE2		14		mA	V DD = 5.5V at 72 MHz, All IP Disabled and PLL Enabled, XTAL = 12 MHz
	I IDLE3		28		mA	V DD = 3V at 72 MHz, All IP and PLL Enabled, XTAL = 12 MHz
	I IDLE4		13		mA	V DD = 3V at 72 MHz, All IP Disabled and PLL Enabled, XTAL=12 MHz
Operating current Idle mode at 12 MHz	I IDLE5		6		mA	V DD = 5.5V at 12 MHz, All IP Enabled and PLL Disabled, XTAL = 12 MHz
Operating current Idle mode at 12 MHz	I IDLE6		3		mA	V DD = 5.5V at 12 MHz, All IP and PLL Disabled, XTAL = 12 MHz
Operating current Idle mode at 12 MHz	I IDLE7		5		mA	V DD = 3V at 12 MHz, All IP Enabled and PLL Disabled, XTAL = 12 MHz
Operating current Idle mode at 12 MHz	I IDLE8		2		mA	V DD = 3 V at 12 MHz, All IP and PLL Disabled, XTAL = 12 MHz
Operating current Idle mode at 4 MHz	I IDLE9		3		mA	V DD = 5V at 4 MHz, All IP Enabled and PLL Disabled, XTAL = 4 MHz
Operating current Idle mode at 4 MHz	I IDLE10		2		mA	V DD = 5V at 4 MHz, All IP and PLL Disabled, XTAL = 4 MHz
Operating current Idle mode at 4 MHz	I IDLE11		2		mA	V DD = 3V at 4 MHz, All IP Enabled and PLL Disabled, XTAL = 4 MHz
Operating current Idle mode at 4 MHz	I IDLE12		1		mA	V DD = 3V at 4 MHz, All IP and PLL Disabled, XTAL = 4 MHz
PARAMETER	SYM	SPECIFICATIONS	SPECIFICATIONS	SPECIFICATIONS	SPECIFICATIONS	TEST
		MIN	TYP	MAX	UNIT	CONDITIONS
	I IDLE5		131		μA	V DD = 5.5V at 10 kHz, All IP Enabled and PLL Disabled, LIRC 10 kHz Enabled
Operating current Idle mode	I IDLE6		129		μA	V DD = 5.5V at 10 kHz, All IP and PLL Disabled, LIRC 10 kHz Enabled
at 10 kHz	I IDLE7		125		μA	V DD = 3V at 10 kHz, All IP Enabled and PLL Disabled, LIRC 10 kHz Enabled
at 10 kHz	I IDLE8		124		μA	V DD = 3 V at 10 kHz, All IP and PLL Disabled, LIRC 10 kHz Enabled
Standby current	I PWD1		12		μA	V DD = 5.5V, No load when BOV function Disabled
Power-down mode	I PWD2		9		μA	V DD = 3.3V, No load when BOV function Disabled
Input Current PA, PB, PC, PD, PE, PF (Quasi-bidirectional mode)	I IN1		-64		μA	V DD = 5.5V, V IN = 0V or V IN = V DD
Input Current at /RESET [1]	I IN2	-55	-45	-30	μA	V DD = 3.3V, V IN = 0.45V
Input Leakage Current PA, PB, PC, PD, PE, PF	I LK	-2	-	+2	μA	V DD = 5.5V, 0 < V IN < V DD
Logic 1 to 0 Transition Current PA~PF (Quasi-bidirectional mode)	I TL [3]	-650	-	-200	μA	V DD = 5.5V, V IN < 2.0V
Input Low Voltage PA, PB, PC, PD, PE, PF (TTL input)	V IL1	-0.3	-	0.8	V	V DD = 4.5V
Input Low Voltage PA, PB, PC, PD, PE, PF (TTL input)	V IL1	-0.3	-	0.6		V DD = 2.5V
Input High Voltage PA, PB, PC, PD, PE, PF (TTL input)	V IH1	2.0	-	V DD +0.2	V	V DD = 5.5V
Input High Voltage PA, PB, PC, PD, PE, PF (TTL input)	V IH1	1.5	-	V DD +0.2		V DD = 3.0V
Input Low Voltage PA, PB, PC, PD, PE, PF (Schmitt input)	V IL2	-0.5	-	0.35 V DD	V
Input High Voltage PA, PB, PC, PD, PE, PF (Schmitt input)	V IH2	0.65 V DD	-	V DD +0.5	V
Hysteresis voltage of PA~PE (Schmitt input)	V HY		0.2 V DD		V
Input Low Voltage XT1 [*2]	V IL3	0	-	0.8	V	V DD = 4.5V
Input Low Voltage XT1 [*2]	V IL3	0	-	0.4		V DD = 3.0V
Input High Voltage XT1 [*2]	V IH3	3.5	-	V DD +0.2	V	V DD = 5.5V
Input High Voltage XT1 [*2]	V IH3	2.4	-	V DD +0.2		V DD = 3.0V
Negative going threshold (Schmitt input), /RESET	V ILS	-0.5	-	0.2 V DD	V
Positive going threshold (Schmitt input), /RESET	V IHS	0.6 V DD	-	V DD +0.5	V
PARAMETER	SYM	SPECIFICATIONS	SPECIFICATIONS	SPECIFICATIONS	SPECIFICATIONS	TEST CONDITIONS
PARAMETER	SYM	MIN	TYP	MAX	UNIT	TEST CONDITIONS
Source Current PA, PB, PC, PD, PE, PF (Quasi-bidirectional Mode)	I SR11	-300	-370	-450	μA	V DD = 4.5V, V S = 2.4V
Source Current PA, PB, PC, PD, PE, PF (Quasi-bidirectional Mode)	I SR12	-50	-70	-90	μA	V DD = 2.7V, V S = 2.2V
Source Current PA, PB, PC, PD, PE, PF (Quasi-bidirectional Mode)	I SR12	-40	-60	-80	μA	V DD = 2.5V, V S = 2.0V
Source Current PA, PB, PC, PD, PE, PF (Push-pull Mode)	I SR21	-20	-24	-28	mA	V DD = 4.5V, V S = 2.4V
Source Current PA, PB, PC, PD, PE, PF (Push-pull Mode)	I SR22	-4	-6	-8	mA	V DD = 2.7V, V S = 2.2V
Source Current PA, PB, PC, PD, PE, PF (Push-pull Mode)	I SR22	-3	-5	-7	mA	V DD = 2.5V, V S = 2.0V
Sink Current PA, PB, PC, PD, PE, PF (Quasi-bidirectional and Push- pull Mode)	I SK1	10	16	20	mA	V DD = 4.5V, V S = 0.45V
Sink Current PA, PB, PC, PD, PE, PF (Quasi-bidirectional and Push- pull Mode)	I SK1	7	10	13	mA	V DD = 2.7V, V S = 0.45V
Sink Current PA, PB, PC, PD, PE, PF (Quasi-bidirectional and Push- pull Mode)	I SK1	6	9	12	mA	V DD = 2.5V, V S = 0.45V
Brown-out voltage with BOV_VL [1:0] =00b	V BO2.2	2.1	2.2	2.3	V
Brown-out voltage with BOV_VL [1:0] =01b	V BO2.7	2.6	2.7	2.8	V
Brown-out voltage with BOV_VL [1:0] =10b	V BO3.8	3.7	3.8	3.9	V
Brown-out voltage with BOV_VL [1:0] =11b	V BO4.5	4.4	4.5	4.6	V
Hysteresis range of BOD voltage	V BH	30	-	150	mV	V DD = 2.5V - 5.5V

Symbol	Parameter	Min	Max	Unit
V DD V SS	DC Power Supply	-0.3	+7.0	V
V IN	Input Voltage	V SS - 0.3	V DD + 0.3	V
1/t CLCL	Oscillator Frequency	4	24	MHz
T A	Operating Temperature	-40	+85	°C
T ST	Storage Temperature	-55	+150	°C
I DD	Maximum Current into V DD	-	120	mA
I SS	Maximum Current out of V SS		120	mA
I IO	Maximum Current sunk by a I/O pin		35	mA
I IO	Maximum Current sourced by a I/O pin		35	mA
I IO	Maximum Current sunk by total I/O pins		100	mA
I IO	Maximum Current sourced by total I/O pins		100	mA

Note: Exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the lift and reliability of the device.

Figure 8-1 Typical Crystal Application Circuit

CRYSTAL	C1	C2	R
4 MHz ~ 24 MHz	10~20 pF	10~20 pF	without

Figure 8-1 Typical Crystal Application Circuit

MPN	Package	Temperature Range	Packing
NUC123SS4AN0	LQFP64	-40°C ~ 85°C	null
NUC123SS4AE0	LQFP64	-40°C ~ 105°C	null
NUC123SS2AN0	LQFP64	-40°C ~ 85°C	null
NUC123SS2AE0	LQFP