NE555

xx555 Precision Timers

Manufacturer

Texas Instruments

Overview

Part: xx555 Precision Timers

Type: Precision Timer

Key Specs:

  • Timing range: microseconds to hours
  • Output current: up to 200mA (sink or source)
  • Supply voltage: 5V to 15V

Features:

  • Astable or monostable operation
  • Adjustable duty cycle
  • TTL-compatible output
  • Timed interval controlled by a single external resistor and capacitor network
  • Frequency and duty cycle controlled independently with two external resistors and a single external capacitor
  • Trigger level: approximately one-third of the supply voltage
  • Threshold level: approximately two-thirds of the supply voltage
  • Control voltage pin (CONT) for altering levels
  • Reset input (RESET) overrides all other inputs

Applications:

  • Pulse-shaping circuits
  • Missing-pulse detectors
  • Pulse-width modulators
  • Pulse-position modulators
  • Sequential timers
  • Pulse generators
  • Frequency dividers
  • Industrial controls

Package:

  • D (SOIC, 8)
  • P (PDIP, 8)
  • PS (SO, 8)
  • PW (TSSOP, 8)
  • FK (LCCC, 20)
  • JG (CDIP, 8)

Features

  • Timing from microseconds to hours
  • Astable or monostable operation
  • Adjustable duty cycle
  • TTL-compatible output can sink or source up to 200mA
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

Applications

  • Pulse-shaping circuits
  • Missing-pulse detectors
  • Pulse-width modulators
  • Pulse-position modulators
  • Sequential timers
  • Pulse generators
  • Frequency dividers
  • Industrial controls

Simplified Schematic

Pin Configuration

NA555...D OR P PACKAGE NE555...D, P, PS, OR PW PACKAGE SA555...D OR P PACKAGE SE555...D, JG, OR P PACKAGE (TOP VIEW)

NC - No internal connection

Table 4-1. Pin Functions

| | PIN | |-----------------|----------------------------------------------------|------------------------------------------------|--------------|---------------------------------------------------------------------------------------| | | NO | D . | | NAME | D (SOIC), P (PDIP), PS (SO), PW (TSSOP), JG (CDIP) | | TYPE | DESCRIPTION | | CONT | 5 | 12 | Input/output | Controls comparator thresholds, Outputs 2/3 × VCC, allows bypass capacitor connection | | DISCH | 7 | 17 | Output | Open collector output to discharge timing capacitor | | GND | 1 | 2 | _ | Ground | | NC | _ | 1, 3, 4, 6, 8, 9,
11, 13, 14, 16,
18, 19 | _ | No internal connection | | OUT | 3 | 7 | Output | High current timer output signal | | RESET | 4 | 10 | Input | Active low reset input forces output and discharge low. | | THRES | 6 | 15 | Input | End of timing input. THRES > CONT sets output low and discharge low | | TRIG | 2 | 5 | Input | Start of timing input. TRIG < ½ CONT sets output high and discharge open | | V CC | 8 | 20 | _ | Input supply voltage, 4.5V to 16V. SE555 maximum is 18V. |

Electrical Characteristics

at VCC = 5V to 15V and TA = 25°C (unless otherwise noted)

| PARAMETER | TEST CONDITIONS | | MIN | TYP | MAX | UNIT | |--------------------------------|---------------------------------|---------------------|------|------|------|------|--| | | | NA555, NE555, SA555 | 8.8 | 10 | 11.2 | | | VCC = 15V | SE555 | 9.4 | 10 | 10.6 | | THRES voltage level | | NA555, NE555, SA555 | 2.4 | 3.3 | 4.2 | V | | | VCC = 5V | SE555 | 2.7 | 3.3 | 4 | | THRES current(1) | | | | 30 | 250 | nA | | | | NA555, NE555, SA555 | 4.5 | 5 | 5.6 | | | VCC = 15V | SE555 | 4.8 | 5 | 5.2 | | TRIG voltage level | VCC = 15V, TA = –55°C to +125°C | SE555
3 | | | | NA555, NE555, SA555 | 1.1 | 1.67 | 2.2 | V | | | VCC = 5V | SE555 | 1.45 | 1.67 | 1.9 | | | VCC = 5V, TA = –55°C to +125°C | SE555 | | | 1.9 | | | | NA555, NE555, SA555 | | 0.5 | 2 | μA | | TRIG current | TRIG at 0V | SE555 | | 0.5 | 0.9 | | RESET voltage level | | | 0.3 | 0.7 | 1 | V | | | TA = –55°C to +125°C | SE555 | | | 1.1 | | | RESET at VCC | | | 0.1 | 0.4 | | RESET current | | NA555, NE555, SA555 | | –0.4 | –1.5 | mA | | | RESET at 0V | SE555 | | –0.4 | –1 | | DISCH switch off-state current | | | | 20 | 100 | nA | | DISCH switch on-state voltage | VCC = 5V, IO = 8mA | NA555, NE555, SA555 | | 0.15 | 0.4 | V |

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MINMAXUNIT
VCCSupply voltage(2)18V
VIInput voltageCONT, RESET, THRES, TRIGVCCV
IOOutput current±225mA
TJOperating virtual junction temperature150°C
Case temperature for 60 secondsFK package260°C
Lead temperature 1.6mm (1/16 inch) from caseJG package, 60 seconds300°C
TstgStorage temperature–65150°C

(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MINMAXUNIT
NA555, NE555, SA5554.516
V
VCCSupply voltageSE5554.518
IOOutput current±200mA
NA555–40105
NE555070
TAOperating free-air temperatureSA555–4085°C
SE555–55125
(2) All voltage values are with respect to GND.

(2) JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.

5.4 Thermal Information

THERMAL METRIC(1)NA556,
NE556,
SA555,
SE555
SE555NA555,
NE555
NE555UNIT
D
(SOIC)
FK
(LCCC)
JG
(CDIP)
P
(PDIP)
PS
(SO)
PW
(TSSOP)
8 PINS20 PINS8 PINS8 PINS8 PINS8 PINS
RθJAJunction-to-ambient thermal resistance125.492.2125.098.5124.5164.2°C/W
RθJC(top)Junction-to-case (top) thermal resistance64.967.673.377.861.270.5°C/W
RθJBJunction-to-board thermal resistance73.266.7114.961.079.3104.8°C/W
ψJTJunction-to-top characterization
parameter
14.361.644.443.916.58.2°C/W
Junction-to-board characterization
ψJB
parameter
72.166.5106.660.377.8103.1°C/W
RθJC(bot)Junction-to-case (bottom) thermal
resistance
N/A14.229.3N/AN/AN/A°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report.

5.5 Electrical Characteristics

at VCC = 5V to 15V and TA = 25°C (unless otherwise noted)

| PARAMETER | TEST CONDITIONS | | MIN | TYP | MAX | UNIT | |--------------------------------|---------------------------------|---------------------|------|------|------|------|--| | | | NA555, NE555, SA555 | 8.8 | 10 | 11.2 | | | VCC = 15V | SE555 | 9.4 | 10 | 10.6 | | THRES voltage level | | NA555, NE555, SA555 | 2.4 | 3.3 | 4.2 | V | | | VCC = 5V | SE555 | 2.7 | 3.3 | 4 | | THRES current(1) | | | | 30 | 250 | nA | | | | NA555, NE555, SA555 | 4.5 | 5 | 5.6 | | | VCC = 15V | SE555 | 4.8 | 5 | 5.2 | | TRIG voltage level | VCC = 15V, TA = –55°C to +125°C | SE555
3 | | | | NA555, NE555, SA555 | 1.1 | 1.67 | 2.2 | V | | | VCC = 5V | SE555 | 1.45 | 1.67 | 1.9 | | | VCC = 5V, TA = –55°C to +125°C | SE555 | | | 1.9 | | | | NA555, NE555, SA555 | | 0.5 | 2 | μA | | TRIG current | TRIG at 0V | SE555 | | 0.5 | 0.9 | | RESET voltage level | | | 0.3 | 0.7 | 1 | V | | | TA = –55°C to +125°C | SE555 | | | 1.1 | | | RESET at VCC | | | 0.1 | 0.4 | | RESET current | | NA555, NE555, SA555 | | –0.4 | –1.5 | mA | | | RESET at 0V | SE555 | | –0.4 | –1 | | DISCH switch off-state current | | | | 20 | 100 | nA | | DISCH switch on-state voltage | VCC = 5V, IO = 8mA | NA555, NE555, SA555 | | 0.15 | 0.4 | V |

Thermal Information

THERMAL METRIC(1)NA556,
NE556,
SA555,
SE555
SE555NA555,
NE555
NE555UNIT
D
(SOIC)
FK
(LCCC)
JG
(CDIP)
P
(PDIP)
PS
(SO)
PW
(TSSOP)
8 PINS20 PINS8 PINS8 PINS8 PINS8 PINS
RθJAJunction-to-ambient thermal resistance125.492.2125.098.5124.5164.2°C/W
RθJC(top)Junction-to-case (top) thermal resistance64.967.673.377.861.270.5°C/W
RθJBJunction-to-board thermal resistance73.266.7114.961.079.3104.8°C/W
ψJTJunction-to-top characterization
parameter
14.361.644.443.916.58.2°C/W
Junction-to-board characterization
ψJB
parameter
72.166.5106.660.377.8103.1°C/W
RθJC(bot)Junction-to-case (bottom) thermal
resistance
N/A14.229.3N/AN/AN/A°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report.

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