MP2307

Part: MP2307, Monolithic Power Systems, Inc.

Type: Synchronous Rectified Step-Down Converter

Key Specs:

• Continuous Output Current: 3A
• Peak Output Current: 4A
• Operating Input Voltage: 4.75V to 23V
• Adjustable Output Voltage: 0.925V to 20V
• Integrated MOSFETs On-Resistance: 100mΩ
• Switching Frequency: Fixed 340KHz
• Efficiency: Up to 95%
• Shutdown Supply Current: Below 1μA

Features:

• 3A Continuous Output Current 4A Peak Output Current
• Wide 4.75V to 23V Operating Input Range
• Integrated 100mΩ Power MOSFET Switches
• Output Adjustable from 0.925V to 20V
• Up to 95% Efficiency
• Programmable Soft-Start
• Stable with Low ESR Ceramic Output Capacitors
• Fixed 340KHz Frequency
• Cycle-by-Cycle Over Current Protection
• Input Under Voltage Lockout
• Thermally Enhanced 8-Pin SOIC Package

Applications:

• Distributed Power Systems
• Networking Systems
• FPGA, DSP, ASIC Power Supplies
• Green Electronics/Appliances
• Notebook Computers

Package:

• 8-pin SOIC package
• Thermally Enhanced 8-Pin SOIC Package
• SOIC8N

• 3A Continuous Output Current 4A Peak Output Current
• Wide 4.75V to 23V Operating Input Range
• Integrated 100mΩ Power MOSFET Switches
• Output Adjustable from 0.925V to 20V
• Up to 95% Efficiency
• Programmable Soft-Start
• Stable with Low ESR Ceramic Output Capacitors
• Fixed 340KHz Frequency
• Cycle-by-Cycle Over Current Protection
• Input Under Voltage Lockout
• Thermally Enhanced 8-Pin SOIC Package

• Distributed Power Systems
• Networking Systems
• FPGA, DSP, ASIC Power Supplies
• Green Electronics/Appliances
• Notebook Computers

EFFICIENCY (%)

"MPS" and "The Future of Analog IC Technology" are Registered Trademarks of Monolithic Power Systems, Inc.

Efficiency vs Load Current

MP2307 Rev. 1.9 www.MonolithicPower.com 1 5/28/2008 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2008 MPS. All Rights Reserved.

PACKAGE REFERENCE

ABSOLUTE MAXIMUM RATINGS (1)

• Input Voltage VIN 4.75V to 23V
• Output Voltage VOUT 0.925V to 20V
• Ambient Operating Temp

(TA=25°C) SOIC8N*(4)*, POUT ....................... .......... ........ 2W

• 1. Exceeding these ratings may damage the device.
• 1. The device is not guaranteed to function outside of its operating conditions.
• 1. Measured on approximately 1" square of 1 oz copper. 4) Derating 20mW/°C at TA > 25°C

I appreciate the request, but I cannot extract a pinout table from the provided datasheet section. The text provided contains only:

1. A board dimensions table (not pin information)
2. A section header "PIN FUNCTIONS" with no actual pin data following it

Missing critical information:

• No pin name/function table
• No pin number assignments
• No pin diagram image attached

Per the extraction rules: Since there is no pin table with pin names/descriptions AND no pin diagram image is attached, I cannot reliably construct a pinout table. Setting all pin numbers to "?" without any pin names or functions would produce an empty/unusable result.

Recommendation: Please provide:

1. The actual PIN FUNCTIONS table from the MP2307 datasheet (the section that lists pin names, numbers, and descriptions), OR
2. A pin diagram/package drawing image showing the SOIC-8 pinout

Once either of these is available, I can extract a clean, accurate pinout table for the MP2307.

ELECTRICAL CHARACTERISTICS (continued)

REFER TO MP2393

MP2307 Rev. 1.9 www.MonolithicPower.com 4 5/28/2008 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2008 MPS. All Rights Reserved.

PIN FUNCTIONS

OPERATION

FUNCTIONAL DESCRIPTION

The MP2307 regulates input voltages from 4.75V to 23V down to an output voltage as low as 0.925V, and supplies up to 3A of load current.

The MP2307 uses current-mode control to regulate the output voltage. The output voltage is measured at FB through a resistive voltage divider and amplified through the internal transconductance error amplifier. The voltage at the COMP pin is compared to the switch current (measured internally) to control the output voltage.

The converter uses internal N-Channel MOSFET switches to step-down the input voltage to the regulated output voltage. Since the high side MOSFET requires a gate voltage greater than the input voltage, a boost capacitor connected between SW and BS is needed to drive the high side gate. The boost capacitor is charged from the internal 5V rail when SW is low.

When the FB pin voltage exceeds 20% of the nominal regulation value of 0.925V, the over voltage comparator is tripped and the COMP pin and the SS pin are discharged to GND, forcing the high-side switch off.

APPLICATIONS INFORMATION COMPONENT SELECTION

Setting the Output Voltage

The output voltage is set using a resistive voltage divider connected from the output voltage to FB. The voltage divider divides the output voltage down to the feedback voltage by the ratio:

mathsf{V}_mathsf{FB} = mathsf{V}_mathsf{OU^mathsf{T}} frac{mathsf{R2}}{mathsf{R1} + mathsf{R2}}.

Thus the output voltage is:

mathsf{V}_mathsf{OUL} = mathsf{0.925} × frac{mathsf{R1} + mathsf{R2}}{mathsf{R2}}

R2 can be as high as 100kΩ, but a typical value is 10kΩ. Using the typical value for R2, R1 is determined by:

mathsf{R1} = mathsf{I0.81} × (mathsf{V_Ocupmathsf{T}} - mathsf{O.925}) (kΩ)

For example, for a 3.3V output voltage, R2 is 10kΩ, and R1 is 26.1kΩ. Table 1 lists recommended resistance values of R1 and R2 for standard output voltages.

Table 1—Recommended Resistance Values

Inductor

The inductor is required to supply constant current to the load while being driven by the switched input voltage. A larger value inductor will result in less ripple current that will in turn result in lower output ripple voltage. However, the larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current. A good rule for determining inductance is to allow the peak-topeak ripple current to be approximately 30% of the maximum switch current limit. Also, make sure that the peak inductor current is below the maximum switch current limit.

The inductance value can be calculated by:

mathsf{L} = frac{mathsf{h}_mathsf{OVD}}{mathsf{f}_mathsf{S} × Δ mathsf{l}_mathsf{L}} × ≤ft( mathsf{l} - frac{mathsf{h}_mathsf{N} mathsf{w}}{mathsf{N}^mathsf{OMD}} right) Big|

Where VOUT is the output voltage, VIN is the input voltage, fS is the switching frequency, and ∆IL is the peak-to-peak inductor ripple current.

Choose an inductor that will not saturate under the maximum inductor peak current, calculated by:

⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ^⎛ -× ×× += IN OUT S OUT LP LOAD V ^{V 1} Lf2 ^V II

Where ILOAD is the load current.

The choice of which style inductor to use mainly depends on the price vs. size requirements and any EMI constraints.

Optional Schottky Diode

During the transition between the high-side switch and low-side switch, the body diode of the low-side power MOSFET conducts the inductor current. The forward voltage of this body diode is high. An optional Schottky diode may be paralleled between the SW pin and GND pin to improve overall efficiency. Table 2 lists example Schottky diodes and their Manufacturers. NOT RECOMMENDED FOR NEW DESIGNS REFER TO MP2393

Table 2—Diode Selection Guide

Input Capacitor

The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitors will also suffice. Choose X5R or X7R dielectrics when using ceramic capacitors.

Since the input capacitor (C1) absorbs the input switching current, it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by:

|_{rm C1} = |_{rm LOAD} × √{frac{underline{V}_{rm OUT}}{underline{V}_{rm IN}} ≤ft(1 - frac{underline{V}_{rm OUT}}{underline{V}_{rm IN}}right)}

The worst-case condition occurs at VIN = 2VOUT, where IC1 = ILOAD/2. For simplification, use an input capacitor with a RMS current rating greater than half of the maximum load current.

The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1μF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple for low ESR capacitors can be estimated by: NOT RECOMMENDED FOR NEW DESIGNS

Δmathsf{V}_mathsf{IN} = frac{mathsf{I}_mathsf{LOAD}}{mathsf{C}mathsf{I}×mathsf{f}_mathsf{S}} × frac{mathsf{V}_mathsf{OUL}}{mathsf{V}_mathsf{IN}} × ≤ft(1 - frac{mathsf{V}_mathsf{OUL}}{mathsf{V}_mathsf{IN}}right)^mathsf{L}

Where C1 is the input capacitance value.

Output Capacitor

The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by:

Δ_OUT = frac{lambda_OUT}{lambda_S × mathsf{L}} × ≤ft(1 - frac{lambda_OUT}{lambda_N}right) × ≤ft(mathsf{R}_ESR + frac{1}{mathsf{8} × mathsf{f}_S × mathsf{C} mathsf{L}}right)

Where C2 is the output capacitance value and RESR is the equivalent series resistance (ESR) value of the output capacitor.

When using ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance which is the main cause for the output voltage ripple. For simplification, the output voltage ripple can be estimated by:

Δmathsf{V}_mathsf{OUT} = frac{mathsf{V}_mathsf{OUL}}{mathsf{S} × mathsf{f}_mathsf{S} ² × mathsf{L} × mathsf{C} mathbf{2}} × ≤ft(mathsf{1} - frac{mathsf{V}_mathsf{OUL}}{mathsf{V}_mathsf{IN}}right)²

When using tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to:

Δmathsf{V}_mathsf{OUT} = frac{mathsf{V}_mathsf{OUT}}{mathsf{f}_mathsf{S} × mathsf{L}} × ≤ft(mathsf{I} - underbrace{frac{mathsf{V}_mathsf{OUT}}{mathsf{V}_mathsf{OUT}}}_{mathsf{Vmathsf{ESR}}}right) × mathsf{R}_mathsf{ESR}.

The characteristics of the output capacitor also affect the stability of the regulation system. The MP2307 can be optimized for a wide range of capacitance and ESR values.

Compensation Components

MP2307 employs current mode control for easy compensation and fast transient response. The system stability and transient response are controlled through the COMP pin. COMP is the output of the internal transconductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to govern the characteristics of the control system. REFER TO MP2393

The DC gain of the voltage feedback loop is given by:

mathbf{A}_mathsf{VDC} = mathbf{R}_mathsf{TOD} × mathbf{g}_mathsf{CS} × mathbf{A}_mathsf{EV} × frac{mathbf{h}_mathsf{VDC}}{lambda_mathsf{FC}}

Where VFB is the feedback voltage (0.925V), AVEA is the error amplifier voltage gain, GCS is the current sense transconductance and RLOAD is the load resistor value.

The system has two poles of importance. One is due to the compensation capacitor (C3) and the output resistor of the error amplifier, and the other is due to the output capacitor and the load resistor. These poles are located at:

mathbf{f_P1} = frac{mathbf{G_EA}}{2π × mathbf{C3} × mathbf{A_√{EA}}}

mathbf{f_P2} = frac{1}{2π × mathbf{C2} × mathbf{R_LOAD}}

Where GEA is the error amplifier transconductance.

The system has one zero of importance, due to the compensation capacitor (C3) and the compensation resistor (R3). This zero is located at:

mathbf{f₂₁} = frac{mathbf{1}}{2π × mathbf{C3} × mathbf{R3}}

The system may have another zero of importance, if the output capacitor has a large capacitance and/or a high ESR value. The zero, due to the ESR and capacitance of the output capacitor, is located at:

mathbf{f}_mathsf{ESR} = frac{mathbf{1}}{2π × mathbf{C2} × mathbf{R_ESR}}

In this case, a third pole set by the compensation capacitor (C6) and the compensation resistor (R3) is used to compensate the effect of the ESR zero on the loop gain. This pole is located at:

mathbf{f_P3} = frac{mathbf{1}}{2π × mathbf{C6} × mathbf{R3}}

The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where the feedback loop has the unity gain is important. Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies could cause system instability. A good standard is to set the crossover frequency below one-tenth of the switching frequency. NOT RECOMMENDED FOR NEW DESIGNS REFER TO MP2393

To optimize the compensation components, the following procedure can be used.

1. Choose the compensation resistor (R3) to set the desired crossover frequency.

Determine R3 by the following equation:

OUT S OUT C V f1.02C2 V f2C2 3R ^{× ×} ×××π ××π ⁼

EA CS FB EA CS GG V GG <× ^×

Where fC is the desired crossover frequency which is typically below one tenth of the switching frequency.

1. Choose the compensation capacitor (C3) to achieve the desired phase margin. For applications with typical inductor values, setting the compensation zero (fZ1) below one-forth of the crossover frequency provides sufficient phase margin.

Determine C3 by the following equation:

mathbf{c3} √{frac{mathbf{A}}{2π × mathbf{R3} × mathbf{f_C}}}

Where R3 is the compensation resistor.

1. Determine if the second compensation capacitor (C6) is required. It is required if the ESR zero of the output capacitor is located at less than half of the switching frequency, or the following relationship is valid:

R2C2 1 ^S ESR < ××π

If this is the case, then add the second compensation capacitor (C6) to set the pole fP3 at the location of the ESR zero. Determine C6 by the equation:

2 f

PCB Layout Guide

PCB layout is very important to achieve stable operation. It is highly recommended to duplicate EVB layout for optimum performance.

If change is necessary, please follow these guidelines and take Figure2 for reference.

• 1. Keep the path of switching current short and minimize the loop area formed by Input cap., high-side MOSFET and low-side MOSFET.
• 1. Bypass ceramic capacitors are suggested to be put close to the Vin Pin.
• 1. Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible.
• 1. ROUT SW away from sensitive analog areas such as FB.

FB

V

• Input Voltage VIN 4.75V to 23V
• Output Voltage VOUT 0.925V to 20V
• Ambient Operating Temp

PACKAGE INFORMATION

NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications.

NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications.