MCP4725A0T-E/CH

MCP4725

Manufacturer

microchip

Overview

Part: MCP4725

Type: 12-Bit Digital-to-Analog Converter with EEPROM Memory

Key Specs:

Resolution: 12-Bit
DNL: ±0.2 LSB (typical)
Settling Time: 6 µs (typical)
Supply Voltage: 2.7V to 5.5V
Operating Current: 210 µA (typical)
Power-Down Current: 0.06 µA (typical)
Extended Temperature Range: -40°C to +125°C

Features:

On-Board Nonvolatile Memory (EEPROM)
External A0 Address Pin
Normal or Power-Down Mode
External Voltage Reference (VDD)
Rail-to-Rail Output
Low Power Consumption
Single-Supply Operation
I2C Interface: Standard (100 kbps), Fast (400 kbps), and High-Speed (3.4 Mbps) Modes
Power-on-Reset (POR) circuit
On-board charge pump for EEPROM programming voltage

Applications:

Set Point or Offset Trimming
Sensor Calibration
Closed-Loop Servo Control
Low Power Portable Instrumentation
PC Peripherals
Data Acquisition Systems

Package:

6-Lead SOT-23
DFN Package

Features

12-Bit Resolution
On-Board Nonvolatile Memory (EEPROM)
±0.2 LSB DNL (typical)
External A0 Address Pin
Normal or Power-Down Mode
Fast Settling Time: 6 µs (typical)
External Voltage Reference (VDD)
Rail-to-Rail Output
Low Power Consumption
Single-Supply Operation: 2.7V to 5.5V
I2C Interface:
- Eight Available Addresses
- Standard (100 kbps), Fast (400 kbps), and High-Speed (3.4 Mbps) Modes
Small 6-Lead SOT-23 and DFN Package Options
Extended Temperature Range: -40°C to +125°C

Applications

Set Point or Offset Trimming
Sensor Calibration
Closed-Loop Servo Control
Low Power Portable Instrumentation
PC Peripherals
Data Acquisition Systems

Pin Configuration

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

MCP	4725	Name	Description
SOT-23	DFN	Name	Description
1	6	V _OUT	Analog Output Voltage
2	5	V _SS	Ground Reference
3	4	$V_{DD}$	Supply Voltage
4	3	SDA	I ² C Serial Data
5	2	SCL	I ² C Serial Clock Input
6	1	A0	$I^2C$ Address Bit Selection pin (A0 bit). This pin can be tied to $V_{SS}$ or $V_{DD}$ , or can be actively driven by the digital logic levels. The logic state of this pin determines what the A0 bit of the $I^2C$ address bits should be.
_	7	EP	Exposed Pad (Note 1)

Note 1: The DFN package has a contact on the bottom of the package. This contact is conductively connected to the die substrate, and therefore should be unconnected or connected to the same ground as the device's V_SS pin.

Electrical Characteristics

Electrical Specifications: Unless otherwise indicated, all parameters apply at VDD = + 2.7V to 5.5V, VSS = 0V, RL = 5 kΩ from VOUT to VSS, CL = 100 pF, TA = -40°C to +125°C. Typical values are at +25°C.

| | RL = 5 kΩ from VOUT to VSS, CL = 100 pF, TA = -40°C to +125°C. Typical values are at +25°C. | |-------------------------------------|---------------------------------------------------------------------------------------------|-------|------|-------|-----------|------------------------------------------------------------------------------------------------------|--|--|--|--|--| | Parameter | Sym. | Min. | Typ. | Max. | Units | Conditions | | Power Requirements | | Operating Voltage | VDD | 2.7 | — | 5.5 | V | | Supply Current | IDD | — | 210 | 400 | µA | Digital input pins are
grounded, Output pin (VOUT)
is not connected (unloaded),
Code = 000h | | Power-Down Current | IDDP | — | 0.06 | 2.0 | µA | VDD = 5.5V | | Power-On-Reset
Threshold Voltage | VPOR | — | 2 | — | V | | DC Accuracy | | Resolution | n | 12 | — | — | Bits | Code Range = 000h to FFFh | | INL Error | INL | — | ±2 | ±14.5 | LSB | Note 1 | | DNL | DNL | -0.75 | ±0.2 | ±0.75 | LSB | Note 1 | | Offset Error | VOS | | 0.02 | 0.75 | % of FSR | Code = 000h | | Offset Error Drift | ΔVOS/°C | — | ±1 | — | ppm/°C | -45°C to +25°C | | | | — | ±2 | — | ppm/°C | +25°C to +85°C | | Gain Error | GE | -2 | -0.1 | 2 | % of FSR | Code = FFFh,
Offset error is not included. | | Gain Error Drift | ΔGE/°C | — | -3 | — | ppm/°C | | Output Amplifier | | Phase Margin | pM | — | 66 | — | Degree(°) | CL = 400 pF, RL =  | | Capacitive Load Stability | CL | — | — | 1000 | pF | RL = 5 kΩ, Note 2 | | Slew Rate | SR | — | 0.55 | — | V/µs | | Short Circuit Current | ISC | — | 15 | 24 | mA | VDD = 5V, VOUT = Grounded | | Output Voltage Settling
Time | TS | — | 6 | — | µs | Note 3 |

Note 1: Test Code Range: 100 to 4000.
- 2: This parameter is ensured by design and not 100% tested.
- 3: Within 1/2 LSB of the final value when code changes from 1/4 to 3/4 (400h to C00h) of full scale range.
- 4: Logic state of external address selection pin (A0 pin).

Absolute Maximum Ratings

| VDD6.5V | |-------------------------------------------------------------------|-------------------| | All inputs and outputs w.r.t VSS | –0.3V to VDD+0.3V | | Current at Input Pins±2 mA | | Current at Supply Pins±50 mA | | Current at Output Pins±25 mA | | Storage Temperature65°C to +150°C | | Ambient Temp. with Power Applied55°C to +125°C | | ESD protection on all pins   6 kV HBM, 400V MM | | Maximum Junction Temperature (TJ)+150°C | † Notice: Stresses above those listed under "Absolute Maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability

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