MCP23017-E/SO
16-Bit I/O Expander with Serial Interface
Manufacturer
Microchip Technology
Overview
Part: MCP23017 / MCP23S17 (Manufacturer not specified)
Type: 16-Bit I/O Expander with Serial Interface
Key Specs:
- I/O Port: 16-Bit
- I2C Interface Speed (MCP23017): 100 kHz, 400 kHz, 1.7 MHz
- SPI Interface Speed (MCP23S17): 10 MHz (maximum)
- Operating Voltage: 1.8V to 5.5V (-40°C to +85°C); 2.7V to 5.5V (-40°C to +85°C); 4.5V to 5.5V (-40°C to +125°C)
- Standby Current: 1 µA (max) at -40°C to +85°C; 3 µA (max) at +85°C to +125°C
- Maximum Output Current (per pin): 25 mA
Features:
- AEC-Q100 Qualified
- 16-Bit Remote Bidirectional I/O Port (Pins GPA7, GPB7 are output only for MCP23017)
- I/O pins default to input
- High-Speed I2C Interface (MCP23017)
- High-Speed SPI Interface (MCP23S17)
- Three Hardware Address Pins to Allow Up to Eight Devices On the Bus
- Configurable Interrupt Output Pins (active-high, active-low or open-drain)
- INTA and INTB Can Be Configured to Operate Independently or Together
- Configurable Interrupt Source (interrupt-on-change)
- Polarity Inversion Register to Configure the Polarity of the Input Port Data
- External Reset Input
- Low Standby Current
Applications:
- null
Package:
- 28-pin QFN: 6 x 6 mm Body
- 28-pin SOIC, Wide: 7.50 mm Body
- 28-pin SPDIP: 300 mil Body
- 28-pin SSOP: 5.30 mm Body
Features
-
AEC-Q100 Qualified
-
16-Bit Remote Bidirectional I/O Port (Pins GPA7, GPB7 are output only for MCP23017):
- I/O pins default to input
-
High-Speed I2C Interface (MCP23017):
- 100 kHz
- 400 kHz
- 1.7 MHz
-
High-Speed SPI Interface (MCP23S17):
- 10 MHz (maximum)
-
Three Hardware Address Pins to Allow Up to Eight Devices On the Bus
-
· Configurable Interrupt Output Pins:
- Configurable as active-high, active-low or open-drain
-
INTA and INTB Can Be Configured to Operate Independently or Together
-
· Configurable Interrupt Source:
- Interrupt-on-change from configured register defaults or pin changes
-
Polarity Inversion Register to Configure the Polarity of the Input Port Data
-
External Reset Input
-
Low Standby Current: 1 μA (max.)
-
· Operating Voltage:
- 1.8V to 5.5V @ -40°C to +85°C
- 2.7V to 5.5V @ -40°C to +85°C
- 4.5V to 5.5V @ -40°C to +125°C
Pin Configuration
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PINOUT DESCRIPTION
| Pin Name | QFN | SOIC SPDIP SSOP | Pin Type | Function |
|---|---|---|---|---|
| GPB0 | 25 | 1 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPB1 | 26 | 2 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPB2 | 27 | 3 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPB3 | 28 | 4 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPB4 | 1 | 5 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPB5 | 2 | 6 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPB6 | 3 | 7 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPB7 | 4 | 8 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor./ Output only (MCP23017). |
| VDD | 5 | 9 | P | Power |
| VSS | 6 | 10 | P | Ground |
| NC/CS | 7 | 11 | I | NC (MCP23017)/Chip Select (MCP23S17) |
| SCK | 8 | 12 | I | Serial clock input |
| SDA/SI | 9 | 13 | I/O | Serial data I/O (MCP23017)/Serial data input (MCP23S17) |
| NC/SO | 10 | 14 | O | NC (MCP23017)/Serial data out (MCP23S17) |
| A0 | 11 | 15 | I | Hardware address pin. Must be externally biased. |
| A1 | 12 | 16 | I | Hardware address pin. Must be externally biased. |
| A2 | 13 | 17 | I | Hardware address pin. Must be externally biased. |
| RESET | 14 | 18 | I | Hardware reset. Must be externally biased. |
| INTB | 15 | 19 | O | Interrupt output for PORTB. Can be configured as active-high, active-low or open-drain. |
| INTA | 16 | 20 | O | Interrupt output for PORTA. Can be configured as active-high, active-low or open-drain. |
| GPA0 | 17 | 21 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPA1 | 18 | 22 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPA2 | 19 | 23 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPA3 | 20 | 24 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPA4 | 21 | 25 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPA5 | 22 | 26 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPA6 | 23 | 27 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. |
| GPA7 | 24 | 28 | I/O | Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor./ Output only (MCP23017). |
| EP | 29 | — | — | Exposed Thermal Pad. Either connect to VSS, or leave unconnected. |
Electrical Characteristics
Absolute Maximum Ratings †
| Ambient temperature under bias –40°C to +125°C |
|----------------------------------------------------------------------------------|--|
| Storage temperature –65°C to +150°C |
| Voltage on VDD with respect to VSS –0.3V to +5.5V |
| Voltage on all other pins with respect to VSS (except VDD) –0.6V to (VDD + 0.6V) |
| Total power dissipation700 mW |
| Maximum current out of VSS pin150 mA |
| Maximum current into VDD pin125 mA |
| Input clamp current, IIK (VI
< 0 or VI
> VDD)±20 mA |
| Output clamp current, IOK (VO < 0 or VO > VDD)±20 mA |
| Maximum output current sunk by any output pin25 mA |
| Maximum output current sourced by any output pin25 mA |
| ESD protection on all pins (HBM:MM)4 kV:400V |
† Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
1.1 DC Characteristics
TABLE 1-1: DC CHARACTERISTICS
| TABLE 1-1: | DC CHARACTERISTICS |
|---------------|---------------------------------------------------------------|-------|----------------|---------|----------------------|-------|-----------------------------------------------------------|
| | Electrical Specifications: Unless otherwise noted, 1.8V VDD | | | | 5.5V at –40C TA | | +125C |
| Param.
No. | Characteristic | Sym. | Min. | Typ.(1) | Max. | Units | Conditions |
| D001 | Supply Voltage | VDD | 1.8 | — | 5.5 | V |
| D002 | VDD Start Voltage to
ensure Power-on Reset | VPOR | — | VSS | — | V |
| D003 | VDD Rise Rate to ensure
Power-on Reset | SVDD | 0.05 | — | — | V/ms | Design guidance only.
Not tested. |
| D004 | Supply Current | IDD | — | — | 1 | mA | SCL/SCK = 1 MHz |
| D005 | Standby current | IDDS8 | — | — | 1 | µA | –40°C TA
+85°C |
| | | | — | — | 3 | µA | 4.5V VDD
5.5V
+85°C TA
+125C
(Note 1) |
| | Input Low Voltage |
| D030 | A0, A1, A2 (TTL buffer) | VIL | VSS | — | 0.15 VDD | V |
| D031 | CS, GPIO, SCL/SCK,
SDA, RESET
(Schmitt Trigger) | VIL | VSS | — | 0.2 VDD | V |
| | Input High Voltage |
| D040 | A0, A1, A2 (TTL buffer) | VIH | 0.25 VDD + 0.8 | — | VDD | V |
| D041 | CS, GPIO, SCL/SCK,
SDA, RESET
(Schmitt Trigger) | VIH | 0.8 VDD | — | VDD | V | For entire VDD range |
| | Input Leakage Current |
| D060 | I/O port pins | IIL | — | — | ±1 | µA | VPIN
VDD
VSS |
| | Output Leakage Current |
| D065 | I/O port pins | ILO | — | — | ±1 | µA | VSS
VPIN
VDD |
| D070 | GPIO weak pull-up
current | IPU | 40 | 75 | 115 | µA | VDD = 5V
GP pins = VSS |
| | Output Low-Voltage |
| D080 | GPIO | VOL | — | — | 0.6 | V | IOL = 8.0 mA
VDD = 4.5V |
| | INT | VOL | — | — | 0.6 | V | IOL = 1.6 mA
VDD = 4.5V |
| | SO, SDA | VOL | — | — | 0.6 | V | IOL = 3.0 mA
VDD = 1.8V |
| | SDA | VOL | — | — | 0.8 | V | IOL = 3.0 mA
VDD = 4.5V |
| | Output High-Voltage |
| D090 | GPIO, INT, SO | VOH | VDD – 0.7 | — | — | V | IOH = –3.0 mA
VDD = 4.5V |
| | | | VDD – 0.7 | — | — | | IOH = –400 µA
VDD = 1.8V |
| | Capacitive Loading Specs on Output Pins |
| D101 | GPIO, SO, INT | CIO | — | — | 50 | pF |
| D102 | SDA | CB | — | — | 400 | pF |
Note 1: This parameter is characterized, not 100% tested.
1.2 AC Characteristics
FIGURE 1-1: Load Conditions for device Timing Specifications.
FIGURE 1-2: RESET and Device Reset Timer Timing.
TABLE 1-2: DEVICE RESET SPECIFICATIONS
| | AC Characteristics: Unless otherwise noted, 1.8V VDD
5.5V at -40C TA
+125C |
|---------------|--------------------------------------------------------------------------------------------|-------|------|----------|------|-------|------------|--|--|--|--|
| Param.
No. | Characteristic | Sym. | Min. | Typ. (1) | Max. | Units | Conditions |
| 30 | RESET Pulse Width
(Low) | TRSTL | 1 | — | — | µs |
| 32 | Device Active After Reset
high | THLD | — | 0 | — | ns | VDD = 5.0V |
| 34 | Output High-Impedance
From RESET Low | TIOZ | — | — | 1 | µs |
Note 1: This parameter is characterized, not 100% tested.
FIGURE 1-3: I 2C Bus Start/Stop Bits Timing.
FIGURE 1-4: I 2C Bus Data Timing.
TABLE 1-3: I2C BUS DATA REQUIREMENTS
I 2C Interface AC Characteristics: Unless otherwise noted, 1.8V VDD 5.5V at –40C TA +125C**,** RPU (SCL, SDA) = 1 k, CL (SCL, SDA) = 135 pF
| Param. | Characteristic | Sym. | Min. | Typ. | Max. | Units | Conditions |
|---|---|---|---|---|---|---|---|
| No. | |||||||
| 100 | Clock High Time: | THIGH | |||||
| 100 kHz mode | 4.0 | — | — | µs | 1.8V – 5.5V | ||
| 400 kHz mode | 0.6 | — | — | µs | 2.7V – 5.5V | ||
| 1.7 MHz mode | 0.12 | — | — | µs | 4.5V – 5.5V | ||
| 101 | Clock Low Time: | TLOW | |||||
| 100 kHz mode | 4.7 | — | — | µs | 1.8V – 5.5V | ||
| 400 kHz mode | 1.3 | — | — | µs | 2.7V – 5.5V | ||
| 1.7 MHz mode | 0.32 | — | — | µs | 4.5V – 5.5V | ||
| 102 | SDA and SCL Rise Time: | TR (1) | |||||
| 100 kHz mode | — | — | 1000 | ns | 1.8V – 5.5V | ||
| 400 kHz mode | (2) 20 + 0.1 CB | — | 300 | ns | 2.7V – 5.5V | ||
| 1.7 MHz mode | 20 | — | 160 | ns | 4.5V – 5.5V | ||
| 103 | SDA and SCL Fall Time: | TF (1) | |||||
| 100 kHz mode | — | — | 300 | ns | 1.8V – 5.5V | ||
| 400 kHz mode | 20 + 0.1 CB (2) | — | 300 | ns | 2.7V – 5.5V | ||
| 1.7 MHz mode | 20 | — | 80 | ns | 4.5V – 5.5V |
Note 1: This parameter is characterized, not 100% tested.
2: CB is specified to be from 10 to 400 pF.
Absolute Maximum Ratings
| Ambient temperature under bias –40°C to +125°C |
|----------------------------------------------------------------------------------|--|
| Storage temperature –65°C to +150°C |
| Voltage on VDD with respect to VSS –0.3V to +5.5V |
| Voltage on all other pins with respect to VSS (except VDD) –0.6V to (VDD + 0.6V) |
| Total power dissipation700 mW |
| Maximum current out of VSS pin150 mA |
| Maximum current into VDD pin125 mA |
| Input clamp current, IIK (VI
< 0 or VI
> VDD)±20 mA |
| Output clamp current, IOK (VO < 0 or VO > VDD)±20 mA |
| Maximum output current sunk by any output pin25 mA |
| Maximum output current sourced by any output pin25 mA |
| ESD protection on all pins (HBM:MM)4 kV:400V |
† Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Get structured datasheet data via API
Get started free