MCP2200T

Part: MCP2200-E/SS — Microchip Technology

Type: USB 2.0 to UART Protocol Converter with GPIO

Description: Full-speed USB 2.0 (12 Mb/s) to UART converter with 3.0–5.5 V operation, eight GPIO pins, 256 bytes of user EEPROM, and baud rates from 300 to 1000k.

Operating Conditions:

• Supply voltage: 3.0–5.5 V
• Operating temperature: -40 to +85 °C
• Oscillator input: 12 MHz (±0.25% accuracy)

Absolute Maximum Ratings:

• Max supply voltage (VDD with respect to VSS): -0.3 to +6.0 V
• Voltage on MCLR with respect to VSS: -0.3 to +9.0 V
• Voltage on VUSB with respect to VSS: -0.3 to +4.0 V
• Max current into VDD pin: 95 mA
• Max current out of VSS pin: 95 mA
• Max output current sunk or sourced by any I/O pin: 25 mA each
• Max current sunk or sourced by all ports: 90 mA each
• Total power dissipation: 800 mW
• Storage temperature: -65 to +150 °C
• Ambient temperature under bias: -40 to +85 °C

Key Specs:

• USB: full-speed (12 Mb/s), composite CDC + HID device
• UART baud rates: 300–1000k; default 19200, 8, N, 1
• Buffers: 64-byte transmit and 64-byte receive
• GPIO: 8 pins, 4 with alternate functions (SSPND, USBCFG, RxLED, TxLED)
• EEPROM: 256 bytes, up to 100K erase/write cycles, data retention >40 years
• ESD protection: >4 kV HBM
• Internal USB transceiver LDO output (VUSB): 3.3 V
• Baud rate error: 0.00% up to 19200 baud, 0.16% at 38400 baud and above (primary rates)

Features:

• Full-Speed USB 2.0 compliant (TID 40001150)
• Composite device: CDC for communication, HID for I/O control and configuration
• Configurable VID, PID and string descriptors
• Bus-powered or self-powered
• Hardware flow control (RTS/CTS) and UART signal polarity option
• Responds to SET_LINE_CODING to change baud rate dynamically
• Integrated USB termination resistors
• USB activity LED outputs (TxLED, RxLED), SSPND and USBCFG output pins
• Uses standard Windows VCP drivers; configuration utility provided
• Passes AEC-Q100 reliability testing

Applications:

• Adding USB connectivity to applications with a UART interface

Package:

• 20-lead VQFN (5x5 mm) with exposed thermal pad
• 20-lead SOIC
• 20-lead SSOP

The pins can be configured as:

• GPIO - individually configurable general purpose input or output
• SSPND - USB Suspend state
• USBCFG - indicates USB configuration status
• RxLED - indicates USB receive traffic
• TxLED - indicates USB transmit traffic

Note 1: This parameter is characterized, but not tested.

DC Characteristics - Param. No.	DC Characteristics - Characteristic	Operating Conditions (unless otherwise indicated): 3.0V VDD 5.5V at -40 C TA +85 C (I-Temp) - Sym.	Operating Conditions (unless otherwise indicated): 3.0V VDD 5.5V at -40 C TA +85 C (I-Temp) - Min.	Operating Conditions (unless otherwise indicated): 3.0V VDD 5.5V at -40 C TA +85 C (I-Temp) - Typ.	Operating Conditions (unless otherwise indicated): 3.0V VDD 5.5V at -40 C TA +85 C (I-Temp) - Max.	Operating Conditions (unless otherwise indicated): 3.0V VDD 5.5V at -40 C TA +85 C (I-Temp) - Units	Operating Conditions (unless otherwise indicated): 3.0V VDD 5.5V at -40 C TA +85 C (I-Temp) - Conditions
D001	Supply Voltage	VDD	3.0	-	5.5	V
D001	Power-on Reset Release Voltage	VPOR		1.6		V
D001	Power-on Reset Rearm Voltage			0.8		V
D003	VDD Rise Rate to Ensure Power-on Reset	SVDD	0.05	-	-	V/ms	Design guidance only, Not tested
D004	Supply Current	IDD
D004	VDD = 3.0V		-	10	12	mA	FOSC = 12 MHz, (330 nF on VUSB)
D004	VDD = 5.0V		-	13	15	mA	FOSC = 12 MHz, (330 nF on VUSB)
D005	Standby Current	IDDS	-	9	-	μA
Input Low-Voltage	Input Low-Voltage	Input Low-Voltage	Input Low-Voltage	Input Low-Voltage	Input Low-Voltage	Input Low-Voltage	Input Low-Voltage
D031	Schmitt Trigger (GPIO) TTL (CTS pin)	VIL	-	-	0.2 VDD	V	3.0V VDD 5.5V
D031	Schmitt Trigger (GPIO) TTL (CTS pin)		-	-	0.8	V	4.5V VDD 5.5V
Input High-Voltage	Input High-Voltage	Input High-Voltage	Input High-Voltage	Input High-Voltage	Input High-Voltage	Input High-Voltage	Input High-Voltage
D041	Schmitt Trigger (GPIO) TTL (RTS pin)	VIH	0.8 VDD	-	V DD	V	3.0V VDD 5.5V
D041	Schmitt Trigger (GPIO) TTL (RTS pin)		2.0	-	V DD	V	4.5V VDD 5.5V
Input Leakage Current	Input Leakage Current	Input Leakage Current	Input Leakage Current	Input Leakage Current	Input Leakage Current	Input Leakage Current	Input Leakage Current
D060	GPIO, CTS	I IL	-	±50	±100	nA	VSS VPIN VDD, pin at high Z
D060	RST		-	±50	±200	nA
D060	OSC1		-	±50	±100	nA
Output Low-Voltage	Output Low-Voltage	Output Low-Voltage	Output Low-Voltage	Output Low-Voltage	Output Low-Voltage	Output Low-Voltage	Output Low-Voltage
D080	GPIO, UART Tx/Rx	VOL	-	-	0.6	V	IOL = 8.0 mA, VDD = 5.0V
D080			-	-	0.6	V	IOL = 6.0 mA, VDD = 3.3V
Output High-Voltage	Output High-Voltage	Output High-Voltage	Output High-Voltage	Output High-Voltage	Output High-Voltage	Output High-Voltage	Output High-Voltage
D090	GPIO, UART Tx/Rx	VOH	VDD - 0.7	-	-	V	IOH = -3.5 mA, VDD = 5.0V
D090			VDD - 0.7	-	-	V	IOH = -3.0 mA, VDD = 3.3V
Capacitive Loading Specifications on Output Pins	Capacitive Loading Specifications on Output Pins	Capacitive Loading Specifications on Output Pins	Capacitive Loading Specifications on Output Pins	Capacitive Loading Specifications on Output Pins	Capacitive Loading Specifications on Output Pins	Capacitive Loading Specifications on Output Pins	Capacitive Loading Specifications on Output Pins
D101	OSC2	COSC 2	-	-	15	pF	Note 1
D102	GPIO	CIO	-	-	50	pF	Note 1

Ambient temperature under bias........................................................................................................-40°C to	+85°C
Storage temperature .......................................................................................................................	-65°C to +150°C
Voltage on VDD with respect to VSS ..................................................................................................	-0.3V to +6.0V
Voltage on MCLR with respect to Vss ................................................................................................	-0.3V to +9.0V
Voltage on VUSB (1) pin with respect to VSS .......................................................................................	-0.3V to +4.0V
Voltage on D+ and D- pins with respect to VSS ..................................................................... -0.3V to	(VUSB + 0.3V)
Voltage on all other pins with respect to VSS .......................................................................... -0.3V to	(VDD + 0.3V)
Total power dissipation ( 2 ) ...............................................................................................................................800mW
Maximum current out of VSS pin ......................................................................................................................	95 mA
Maximum current into VDD pin .........................................................................................................................	95 mA
Clamp current, IK (VPIN < 0 or VPIN > VDD)	20 mA
Maximum output current sunk by any I/O pin....................................................................................................25	mA
Maximum output current sourced by any I/O pin...............................................................................................25	mA
Maximum current sunk by all ports....................................................................................................................90	mA
Maximum current sourced by all ports .............................................................................................................	90 mA
Note 1: VUSB must always be VDD + 0.3V.

2: Power dissipation is calculated as follows: PDIS = VDD x {IDD - IOH} + {(VDD - VOH) x IOH} + (VOl x IOL).

† NOTICE: Stresses above those listed under 'Absolute Maximum Ratings' may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure above maximum rating conditions for extended periods may affect device reliability.

Standard Operating Conditions (unless otherwise stated)

Operating temperature: -40 C TA +85 C (I-Temp)

Param. No.	Sym.	Characteristic	Typ.	Units	Conditions
TH01	θJA	Thermal Resistance Junction to Ambient	36.1	C/W	20-pin VQFN 5x5 mmpackage
TH01	θJA	Thermal Resistance Junction to Ambient	85.2	C/W	20-pin SOIC package
TH01	θJA	Thermal Resistance Junction to Ambient	108.1	C/W	20-pin SSOP package
TH02	θJC	Thermal Resistance Junction to Case	1.7	C/W	20-pin VQFN 5x5 mmpackage
TH02	θJC	Thermal Resistance Junction to Case	24	C/W	20-pin SOIC package
TH02	θJC	Thermal Resistance Junction to Case	24	C/W	20-pin SSOP package
TH03	TJMAX	Maximum Junction Temperature	150	C
TH04	PD	Power Dissipation	-	W	PD = PINTERNAL + PI/O
TH05	PINTERNAL	Internal Power Dissipation	-	W	PINTERNAL = IDD x VDD ( 1 )
TH06	PI/O	I/O Power Dissipation	-	W	PI/O = (IOL * VOL) + (IOH * (VDD - VOH))
TH07	PDER	Derated Power	-	W	PDER = PDMAX (TJ - TA)/θJA ( 2 , 3 )

Note 1: IDD is the current to run the chip alone without driving any load on the output pins.

• 2: TA = Ambient Temperature.
• 3: TJ = Junction Temperature.

Dimension Limits	Units - Dimension Limits	MILLIMETERS - MIN	MILLIMETERS - NOM	MILLIMETERS - MAX
Contact Pitch	E		0.65 BSC
Optional Center Pad Width	W2			3.35
Optional Center Pad Length	T2			3.35
Contact Pad Spacing	C1		4.50
Contact Pad Spacing	C2		4.50
Contact Pad Width (X20)	X1			0.40
Contact Pad Length (X20)	Y1			0.55
Distance Between Pads	G	0.20
Thermal Via Diameter	V		0.30
Thermal Via Pitch	EV		1.00