MCIMX7D3DVK10SD
Applications ProcessorThe MCIMX7D3DVK10SD is a applications processor from NXP Semiconductors. View the full MCIMX7D3DVK10SD datasheet below including key specifications, electrical characteristics.
Official MCIMX7D3DVK10SD datasheet (PDF) — the source this page was extracted from.
Manufacturer
NXP SemiconductorsCategory
Applications Processor
Lifecycle
Production (Last Updated: 2 months ago)
MCIMX7D3DVK10SD Key Specifications
| Parameter | Value |
|---|---|
| Case/Package | TFBGA |
| China RoHS | Compliant |
| Height - Seated (Max) | 1.1 mm |
| Introduction Date | 2017-07-25 |
| Length | 12 mm |
| Lifecycle Status | Production (Last Updated: 2 months ago) |
| Max Operating Temperature | 95 °C |
| Max Supply Voltage | 1.25 V |
| Min Operating Temperature | 0 °C |
| Min Supply Voltage | 1.2 V |
| Nominal Supply Voltage (DC) | 1.225 V |
| Number of Pins | 488 |
| Number of Terminals | 488 |
| Packaging | Tray |
| REACH SVHC | Yes |
| RoHS | Compliant |
| Standard Pack Qty | 152 |
| Terminal Pitch | 400 µm |
| Width | 12 mm |
MCIMX7D3DVK10SD Overview
Part: MCIMX7D3DVK10SD — NXP Semiconductors
Type: Arm Cortex-A7 / Cortex-M4 heterogeneous multicore applications processor (i.MX 7Dual family)
Description: Dual Arm Cortex-A7 (1 GHz) plus Cortex-M4 applications processor with up to 32-bit DDR3/DDR3L/LPDDR2/LPDDR3-1066 interface, 2x Gigabit Ethernet, and 1x 12-bit ADC, in a 12x12 mm 0.4 mm pitch BGA.
Operating Conditions:
- Operating temperature (Tj): 0 to +95 °C (Consumer tier, per Table 1 for this part number)
- Cortex-A7 CPU speed grade: 1 GHz
Absolute Maximum Ratings:
The provided absolute maximum ratings extract contains only MIPI DSI interface electrical limits and no supply voltage, current, or temperature ratings:
- DSI input signal voltage range: -50 to 1350 mV (transient range limited to -300 mV to 1600 mV)
- DSI ground shift: -50 to 50 mV
- DSI maximum transient output voltage level: 1.45 V (maximum transient time above this level: 20 ns)
Key Specs:
- CPU: two Cortex-A7 cores at 1 GHz, each with 32 KB L1 I-cache and 32 KB L1 D-cache, plus shared 512 KB L2 cache
- Cortex-M4 with FPU and MPU, 16 KB instruction cache, 16 KB data cache, 64 KB TCM
- On-chip memory: 96 KB boot ROM, 256 KB OCRAM, 32 KB secure RAM
- External memory: up to 32-bit LPDDR2/DDR3/DDR3L/LPDDR3-1066, NAND, NOR, QSPI
- Ethernet: 2x 10/100/1000 Mbps with IEEE 1588 and AVB
- USB: 2x HS OTG with PHY, 1x HS host with HSIC; PCIe 2.1 one lane
- ADC: one 2-channel 12-bit ADC (12x12 mm package; ENOB typically 9–10 bits)
- DSI HS transmit differential output voltage |VOD|: 140 / 200 / 270 mV (min/typ/max)
Features:
- Heterogeneous multicore: Linux/Android on Cortex-A7, RTOS on Cortex-M4
- NEON media processing engine and SDMA controller
- Three MMC/SD/SDIO ports (one supports HS400)
- Parallel 24-bit display port and MIPI-DSI; parallel camera port and MIPI-CSI
- Seven UARTs, four eCSPI, four I2C, three SAI, four PWM, quad SPI, 8x8 keypad port
- Security: TrustZone, CAAM, SNVS, CSU, HABv4, secure JTAG controller
- Integrated PMU with multiple LDOs and on-die temperature sensor
- This variant has no EPDC and no CAN, with 4 tamper pins
Applications:
- Audio
- Connected devices
- Access control panels
- Human-machine interfaces (HMI)
- Portable medical and health care
- IP phones
- Smart appliances
- Point of Sale
- eReaders
- Wearables
- Home energy management systems
Package:
- BGA 12 x 12 mm, 0.4 mm pitch (this part)
- BGA 19 x 19 mm, 0.75 mm pitch (other family variants)
MCIMX7D3DVK10SD Features
The i.MX 7Dual family of processors is based on Arm Cortex-A7 MPCore™ Platform, which has the following features:
-
Two Arm Cortex-A7 Cores (with TrustZone ® technology)
-
The core configuration is symmetric, where each core includes:
-
32 KByte L1 Instruction Cache
-
32 KByte L1 Data Cache
-
Private Timer and Watchdog
-
NEON MPE (media processing engine) coprocessor
MCIMX7D3DVK10SD Electrical Characteristics
This section provides the device and module -level electrical characteristics for the i.MX 7Dual family of processors.
MCIMX7D3DVK10SD Thermal Information
Table 8 displays the thermal resistance data.
Per JEDEC JESD51-2, the intent of thermal resistance measurements is solely for a thermal performance comparison of one package to another in a standardized environment. This methodology is not meant to and does not predict the performance of a package in an application-specific environment.
Table 8. Thermal Resistance Data
| Rating | Test conditions | Symbol | 12x12 pkg value | 19x19 pkg value | Unit |
|---|---|---|---|---|---|
| Junction to Ambient 1 | Single-layer board (1s); natural convection 2 Four-layer board (2s2p); natural convection 2 | R JA R JA | 55.4 32.6 | 44.4 30.2 | o C/W o C/W |
| Junction to Ambient 1 | Single-layer board (1s); airflow 200 ft/min 2,3 Four-layer board (2s2p); airflow 200 ft/min 2,3 | R JA R JA | 41.8 28.0 | 34.3 25.8 | o C/W o C/W |
| Junction to Board 1,4 | - | R ← JB | 16.0 | 17.4 | o C/W |
| Junction to Case 1,5 | - | R ← JC | 10.5 | 10.4 | o C/W |
| Junction to Package Top 1,6 | Natural Convection | JT | 0.2 | 0.2 | o C/W |
| Junction to Package Bottom | Natural Convection | R B_CSB | 15.3 | 17.3 | o C/W |
5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).
- 6 Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.
MCIMX7D3DVK10SD Package Information
Plastic Package
BGA 12 x 12 mm, 0.4 mm pitch BGA 19 x 19 mm, 0.75 mm pitch
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