MCIMX7D3DVK10SD

The MCIMX7D3DVK10SD is an electronic component from NXP Semiconductors. View the full MCIMX7D3DVK10SD datasheet below including key specifications, electrical characteristics.

Manufacturer

NXP Semiconductors

Key Specifications

Parameter	Value
Case/Package	TFBGA
China RoHS	Compliant
Height - Seated (Max)	1.1 mm
Introduction Date	2017-07-25
Length	12 mm
Lifecycle Status	Production (Last Updated: 2 months ago)
Max Operating Temperature	95 °C
Max Supply Voltage	1.25 V
Min Operating Temperature	0 °C
Min Supply Voltage	1.2 V
Nominal Supply Voltage (DC)	1.225 V
Number of Pins	488
Number of Terminals	488
Packaging	Tray
REACH SVHC	Yes
RoHS	Compliant
Standard Pack Qty	152
Terminal Pitch	400 µm
Width	12 mm

Overview

Microprocessor, 2 Cores, 32-bit, ARM Cortex-A7, 1 GHz, MAPBGA, 488 Pins

Features

The i.MX 7Dual family of processors is based on Arm Cortex-A7 MPCore™ Platform, which has the following features:

Two Arm Cortex-A7 Cores (with TrustZone ® technology)
The core configuration is symmetric, where each core includes:
32 KByte L1 Instruction Cache
32 KByte L1 Data Cache
Private Timer and Watchdog
NEON MPE (media processing engine) coprocessor

Electrical Characteristics

This section provides the device and module -level electrical characteristics for the i.MX 7Dual family of processors.

Thermal Information

Table 8 displays the thermal resistance data.

Per JEDEC JESD51-2, the intent of thermal resistance measurements is solely for a thermal performance comparison of one package to another in a standardized environment. This methodology is not meant to and does not predict the performance of a package in an application-specific environment.

Table 8. Thermal Resistance Data

Rating	Test conditions	Symbol	12x12 pkg value	19x19 pkg value	Unit
Junction to Ambient 1	Single-layer board (1s); natural convection 2 Four-layer board (2s2p); natural convection 2	R JA R JA	55.4 32.6	44.4 30.2	o C/W o C/W
Junction to Ambient 1	Single-layer board (1s); airflow 200 ft/min 2,3 Four-layer board (2s2p); airflow 200 ft/min 2,3	R JA R JA	41.8 28.0	34.3 25.8	o C/W o C/W
Junction to Board 1,4	-	R ← JB	16.0	17.4	o C/W
Junction to Case 1,5	-	R ← JC	10.5	10.4	o C/W
Junction to Package Top 1,6	Natural Convection	JT	0.2	0.2	o C/W
Junction to Package Bottom	Natural Convection	R B_CSB	15.3	17.3	o C/W

5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).

6 Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.

Package Information

Plastic Package

BGA 12 x 12 mm, 0.4 mm pitch BGA 19 x 19 mm, 0.75 mm pitch

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