MCIMX7D2DVK12SD
The MCIMX7D2DVK12SD is an electronic component from NXP USA Inc.. View the full MCIMX7D2DVK12SD datasheet below including key specifications, electrical characteristics.
Manufacturer
NXP USA Inc.
Category
Integrated Circuits (ICs)
Package
488-TFBGA
Lifecycle
Active
Key Specifications
| Parameter | Value |
|---|---|
| Additional Interfaces | AC'97, CAN, eCSPI, I2C, I2S, MMC/SD/SDIO, PCIe, QSPI, SAI, UART |
| Additional Interfaces | AC'97, CAN, eCSPI, I2C, I2S, MMC/SD/SDIO, PCIe, QSPI, SAI, UART |
| Case/Package | TFBGA |
| China RoHS | Compliant |
| Co-Processors/DSP | Multimedia; NEON™ MPE |
| Co-Processors/DSP | Multimedia; NEON™ MPE |
| Core Processor | ARM® Cortex®-A7, ARM® Cortex®-M4 |
| Display & Interface Controllers | Keypad, LCD, MIPI |
| Display & Interface Controllers | Keypad, LCD, MIPI |
| Ethernet | 10/100/1000Mbps (2) |
| Ethernet | 10/100/1000Mbps (2) |
| Graphics Acceleration | No |
| Graphics Acceleration | No |
| Height - Seated (Max) | 1.1 mm |
| Introduction Date | 2017-07-25 |
| Length | 12 mm |
| Lifecycle Status | Production (Last Updated: 2 months ago) |
| Max Operating Temperature | 85 °C |
| Max Supply Voltage | 1.25 V |
| Min Operating Temperature | 0 °C |
| Min Supply Voltage | 1.2 V |
| Mounting Type | Surface Mount |
| Nominal Supply Voltage (DC) | 1.225 V |
| Number of Cores/Bus Width | 2 Core, 32-Bit |
| Number of Cores/Bus Width | 2 Core, 32-Bit |
| Number of Pins | 488 |
| Number of Terminals | 488 |
| Operating Temperature | 0°C ~ 85°C (TJ) |
| Package / Case | 488-TFBGA |
| Packaging | Tray |
| RAM Controllers | LPDDR2, LPDDR3, DDR3, DDR3L |
| RAM Controllers | LPDDR2, LPDDR3, DDR3, DDR3L |
| REACH SVHC | Yes |
| RoHS | Compliant |
| Security Features | A-HAB, ARM TZ, CAAM, CSU, SJC, SNVS |
| Security Features | A-HAB, ARM TZ, CAAM, CSU, SJC, SNVS |
| Clock Speed | 1.2GHz |
| Standard Pack Qty | 152 |
| Supplier Device Package | 488-TFBGA (12x12) |
| Supplier Device Package | 488-TFBGA (12x12) |
| Terminal Pitch | 400 µm |
| USB | USB 2.0 + PHY (1), USB 2.0 OTG + PHY (2) |
| USB | USB 2.0 + PHY (1), USB 2.0 OTG + PHY (2) |
| Voltage - I/O | 1.8V, 3.3V |
| Voltage - I/O | 1.8V, 3.3V |
| Width | 12 mm |
Overview
IC MPU I.MX7D 1.2GHZ 488TFBGA
Features
The i.MX 7Dual family of processors is based on Arm Cortex-A7 MPCore™ Platform, which has the following features:
-
Two Arm Cortex-A7 Cores (with TrustZone ® technology)
-
The core configuration is symmetric, where each core includes:
-
32 KByte L1 Instruction Cache
-
32 KByte L1 Data Cache
-
Private Timer and Watchdog
-
NEON MPE (media processing engine) coprocessor
Electrical Characteristics
This section provides the device and module -level electrical characteristics for the i.MX 7Dual family of processors.
Thermal Information
Table 8 displays the thermal resistance data.
Per JEDEC JESD51-2, the intent of thermal resistance measurements is solely for a thermal performance comparison of one package to another in a standardized environment. This methodology is not meant to and does not predict the performance of a package in an application-specific environment.
Table 8. Thermal Resistance Data
| Rating | Test conditions | Symbol | 12x12 pkg value | 19x19 pkg value | Unit |
|---|---|---|---|---|---|
| Junction to Ambient 1 | Single-layer board (1s); natural convection 2 Four-layer board (2s2p); natural convection 2 | R JA R JA | 55.4 32.6 | 44.4 30.2 | o C/W o C/W |
| Junction to Ambient 1 | Single-layer board (1s); airflow 200 ft/min 2,3 Four-layer board (2s2p); airflow 200 ft/min 2,3 | R JA R JA | 41.8 28.0 | 34.3 25.8 | o C/W o C/W |
| Junction to Board 1,4 | - | R ← JB | 16.0 | 17.4 | o C/W |
| Junction to Case 1,5 | - | R ← JC | 10.5 | 10.4 | o C/W |
| Junction to Package Top 1,6 | Natural Convection | JT | 0.2 | 0.2 | o C/W |
| Junction to Package Bottom | Natural Convection | R B_CSB | 15.3 | 17.3 | o C/W |
5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).
- 6 Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.
Package Information
Plastic Package
BGA 12 x 12 mm, 0.4 mm pitch BGA 19 x 19 mm, 0.75 mm pitch
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