MCIMX7D2DVK12SD

Part: MCIMX7D2DVK12SD — NXP Semiconductors

Type: Applications Processor (dual Arm Cortex-A7 plus Cortex-M4)

Description: i.MX 7Dual applications processor with two Arm Cortex-A7 cores at up to 1.2 GHz, a Cortex-M4 core, and up to 32-bit DDR3/DDR3L/LPDDR2/LPDDR3-1066 memory interface, in a 12x12 mm 0.4 mm pitch BGA.

Operating Conditions:

• Operating temperature (Tj): 0 to 85 °C (Consumer grade, 1.2 GHz part)
• Cortex-A7 speed grade: 1.2 GHz

Absolute Maximum Ratings:

The provided absolute maximum ratings section contains only MIPI DSI interface specifications; no supply voltage, current, or temperature limits are given there.

• DSI input signal voltage range: -50 to 1350 mV (transient limited to -300 to 1600 mV)
• DSI ground shift: -50 to 50 mV
• DSI maximum transient output voltage level (VOH(absmax)): 1.45 V
• DSI maximum transient time above VOH(absmax): 20 ns

Key Specs:

• CPU: two Cortex-A7 cores at 1.2 GHz, each with 32 KB L1 I-cache and 32 KB L1 D-cache, plus a shared 512 KB L2 cache
• Cortex-M4 with FPU and MPU, 16 KB I-cache, 16 KB D-cache, 64 KB TCM
• On-chip memory: 96 KB boot ROM, 256 KB OCRAM, 32 KB secure/nonsecure RAM
• External memory: up to 32-bit LPDDR2-1066, DDR3-1066, DDR3L-1066, LPDDR3-1066; 8-bit NAND; 16/32-bit NOR
• Ethernet: two 10/100/1000 Mbps controllers with IEEE 1588 and AVB
• USB: two HS USB 2.0 OTG with PHY, one HS USB 2.0 host with HSIC
• ADC: one 2-channel 12-bit ADC in the 12x12 package
• Options on this part: no EPDC, no CAN, 4 tamper pins

Features:

• Heterogeneous multicore: Linux/Android on Cortex-A7, RTOS on Cortex-M4
• NEON media processing engine on the Cortex-A7 cores
• Displays: parallel 24-bit and MIPI-DSI
• Cameras: parallel and MIPI-CSI
• PCIe 2.1 one lane
• Three MMC/SD/SDIO ports, up to 208 MHz
• Seven UARTs, four eCSPI, four I2C, three SAI, four PWM, one quad SPI, four watchdog timers
• Security: TrustZone, CAAM, SNVS, CSU, HABv4, SJC
• Integrated PMU with LDO regulators, die temperature sensor, and state retention and power gating
• PXP pixel processing pipeline

Applications:

• Audio
• Connected devices
• Access control panels
• Human-machine interfaces (HMI)
• Portable medical and health care
• IP phones
• Smart appliances
• Point of Sale
• eReaders
• Wearables
• Home energy management systems

Package:

• 12x12 mm, 0.4 mm pitch BGA (MCIMX7D2DVK12SD)
• 19x19 mm, 0.75 mm pitch BGA (other family variants)

The i.MX 7Dual family of processors is based on Arm Cortex-A7 MPCore™ Platform, which has the following features:

• Two Arm Cortex-A7 Cores (with TrustZone ® technology)

• The core configuration is symmetric, where each core includes:

• 32 KByte L1 Instruction Cache

• 32 KByte L1 Data Cache

• Private Timer and Watchdog

• NEON MPE (media processing engine) coprocessor

This section provides the device and module -level electrical characteristics for the i.MX 7Dual family of processors.

Table 8 displays the thermal resistance data.

Per JEDEC JESD51-2, the intent of thermal resistance measurements is solely for a thermal performance comparison of one package to another in a standardized environment. This methodology is not meant to and does not predict the performance of a package in an application-specific environment.

Table 8. Thermal Resistance Data

5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).

• 6 Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.

Plastic Package

BGA 12 x 12 mm, 0.4 mm pitch BGA 19 x 19 mm, 0.75 mm pitch