MAX98357A

Part: MAX98357A/ MAX98357B, Maxim Integrated

Type: PCM Class D Amplifier

Key Specs:

• Supply Voltage: 2.5V to 5.5V
• Output Power: 3.2W into 4Ω at 5V
• Quiescent Current: 2.4mA
• Efficiency: 92% (RL = 8Ω, POUT = 1W)
• Output Noise: 22.8μVRMS (AV = 15dB)
• THD+N: 0.013% at 1kHz
• Sample Rates: 8kHz to 96kHz
• PSRR: 77dB at 1kHz
• BCLK and LRCLK Jitter Tolerance: 12ns (typ)

Features:

• Easy-to-use, low-cost digital PCM input
• Industry-leading Class AB audio performance with Class D efficiency
• Automatically recognizes up to 35 different PCM and TDM clocking schemes
• Eliminates need for I2C programming
• Eliminates need for external MCLK signal
• MAX98357A supports I2S data
• MAX98357B supports left-justified data
• Supports 8 channel TDM data
• Supports 16/24/32-bit data for I2S and left-justified modes
• Supports 16-bit or 32-bit data using TDM mode
• Configurable to produce left channel, right channel, or (left/2 + right/2) output
• Very high wideband jitter tolerance (12ns typ) on BCLK and LRCLK
• Active emissions-limiting, edge-rate limiting, and overshoot control circuitry
• Filterless spread-spectrum modulation scheme
• Sophisticated Edge Rate Control Enables Filterless Class D Outputs
• Low RF Susceptibility Rejects TDMA Noise from GSM Radios
• Extensive Click-and-Pop Reduction Circuitry
• Robust Short-Circuit and Thermal Protection
• Solution Size with Single Bypass Capacitor is 4.32mm2

Applications:

• Single Li-ion Cell/5V Devices
• Smart Speakers
• Notebook Computers
• IoT Devices
• Gaming Devices (Audio and Haptics)
• Smartphones
• Tablets
• Cameras

Package:

• 9-pin WLP: 1.345mm x 1.435mm x 0.64mm (0.4mm Pitch)
• 16-pin TQFN: 3mm x 3mm x 0.75mm

• Single-Supply Operation (2.5V to 5.5V)
• 3.2W Output Power into 4Ω at 5V
• 2.4mA Quiescent Current
• 92% Efficiency (RL = 8Ω, POUT = 1W)
• 22.8μVRMS Output Noise (AV = 15dB)
• Low 0.013% THD+N at 1kHz
• No MCLK Required
• Sample Rates of 8kHz to 96kHz
• Supports Left, Right, or (Left/2 + Right/2) Output
• Sophisticated Edge Rate Control Enables Filterless Class D Outputs
• 77dB PSRR at 1kHz
• Low RF Susceptibility Rejects TDMA Noise from GSM Radios
• Extensive Click-and-Pop Reduction Circuitry
• Robust Short-Circuit and Thermal Protection
• Available in Space-Saving Packages: 1.345mm x 1.435mm WLP (0.4mm Pitch) and 3mm x 3mm TQFN
• Solution Size with Single Bypass Capacitor is 4.32mm2

Applications

• Single Li-ion Cell/5V Devices
• Smart Speakers
• Notebook Computers
• IoT Devices
• Gaming Devices (Audio and Haptics)
• Smartphones
• Tablets
• Cameras

Simplified Block Diagram

19-6779; Rev 16; 2/26

TABLE OF CONTENTS

| LIST OF FIGURES | |---------------------------------------------------------------------------------------|----| | Figure 1. I2S Audio Interface Timing Diagram (MAX98357A) | 8 | | Figure 2. Left-Justified Audio Interface Timing Diagram (MAX98357B) | 8 | | Figure 3. TDM Audio Interface Timing Diagram | 8 | | Figure 4. SD_MODE Resistor Connected Using Open-Drain Driver | 18 | | Figure 5. SD_MODE Resistor Connected Using Push-Pull Driver | 18 | | Figure 6. Required startup sequence when using BCLK = 256kHz | 19 | | Figure 7. MAX98357A I2S Digital Audio Interface Timing, 16-Bit Resolution | 20 | | Figure 8. MAX98357A I2S Digital Audio Interface Timing, 32-Bit Resolution | 21 | | Figure 9. MAX98357B Left-Justified Digital Audio Interface Timing, 16-Bit Resolution | 22 | | Figure 10. MAX98357B Left-Justified Digital Audio Interface Timing, 32-Bit Resolution | 23 | | Figure 11. MAX98357A TDM 16-Bit DAI Timing | 24 | | Figure 12. MAX98357A TDM 32-Bit DAI Timing | 25 | | Figure 13. MAX98357B TDM 16-Bit DAI Timing | 26 | | Figure 14. MAX98357B TDM 32-Bit DAI Timing | 27 | | Figure 15. EMI with 12in of Speaker Cable and No Output Filtering | 28 | | Figure 16. Left-Channel PCM Operation with 6dB Gain | 29 | | Figure 17. Left-Channel PCM Operation with 12dB Gain | 29 | | Figure 18. Right-Channel PCM Operation with 6dB Gain | 30 | | Figure 19. (Left/2 + Right/2) PCM Operation with 6dB Gain | 30 | | Figure 20. Stereo PCM Operation Using Two ICs | 31 | | Figure 21. Channel TDM Operation (Gain Fixed at 12dB) | 32 | | Figure 22. WLP Pin Connect for set 12dB Gain Without Via | 34 | | Figure 23. Example Layout Configured for Left-Channel Audio and Gain of 12dB | 34 | | Figure 24. MAX98357A/MAX98357B WLP Ball Dimensions | 34 | | LIST OF TABLES | | Table 1. RMS Jitter Tolerance | 16 | | Table 2. BCLK Polarity | 16 | | Table 3. LRCLK Polarity | 16 | | Table 4. Digital Filter Settings | 17 | | Table 5. SD_MODE Control | 17 | | Table 6. Examples of SD_MODE Pullup Resistor Values | 17 | | Table 7. TDM Mode Channel Selection | 20 | | Table 8. Gain Selection | 28 |

• Single Li-ion Cell/5V Devices
• Smart Speakers
• Notebook Computers
• IoT Devices
• Gaming Devices (Audio and Haptics)
• Smartphones
• Tablets
• Cameras

$(V_{DD}$ = 5V, $V_{GND}$ = 0V, GAIN_SLOT = $V_{DD}$ . BCLK = 3.072MHz, LRCLK = 48kHz, speaker loads ( $Z_{SPK}$ ) connected between OUTP and OUTN, $Z_{SPK}$ = $\infty$ , $T_A$ = $T_{MIN}$ to $T_{MAX}$ , unless otherwise noted. Typical values are at $T_A$ = +25°C.) (Note 2)

| PARAMETER | SYMBOL | CONE | MIN | TYP | MAX | UNITS | |------------------------------|-----------------|---------------------------------------------------|-------------------------------------------|-----|------|-------|-------| | Supply Voltage Range | V _DD | Guaranteed by PSS | Guaranteed by PSSR test | | | 5.5 | V | | Undervoltage Lockout | UVLO | | | 1.5 | 1.8 | 2.3 | V | | Outcoant Current | | T _A = +25°C | | | 2.75 | 3.35 | Л | | Quiescent Current | I _DD | T _A = +25°C, V _DD = | = +25°C, V _DD = 3.7V | | 2.4 | 2.85 | mA | | Shutdown Current | ISHDN | SD_MODE = 0V, TA | (= +25°C | | 0.6 | 2 | μA | | Standby Current | ISTNDBY | SD_MODE = 1.8V, | no BCLK, T _A = +25°C | | 340 | 400 | μA | | Turn-On Time | t _ON | | | | 7 | 7.5 | ms | | Output Offset Voltage | V _OS | T _A = +25°C, gain = | 15dB | | ±0.3 | ±2.5 | mV | | Click-and-Pop Level | W | Peak voltage, T _A = +25°C, A-weighted, | IIIIO Oliataowiii | | -72 | | - dBV | | Click-and-Pop Level | K _CP | 32 samples per second (Note 3) | Out of shutdown | | -66 | | dbv | | | | $V_{DD} = 2.5V \text{ to } 5.5V,$ | T _A = +25°C | 60 | 75 | | Power-Supply Rejection Ratio | PSRR | T _A = +25°C
(Notes 3, 4) | f = 217Hz,
200mV _P-P ripple | | 77 | | dB | | | | | f = 10kHz,
200mV _P-P ripple | | 60 |

Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

WI P

Junction-to-Ambient Thermal Resistance ( $\theta_{JA}$ ).........73°C/W Junction-to-Case Thermal Resistance ( $\theta_{JC}$ )......50°C/W

TQFN

Junction-to-Ambient Thermal Resistance ( $\theta_{JA}$ ).......48°C/W Junction-to-Case Thermal Resistance ( $\theta_{JC}$ ).......7°C/W

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.analog.com/thermal-tutorial.

Electrical Characteristics

$(V_{DD}$ = 5V, $V_{GND}$ = 0V, GAIN_SLOT = $V_{DD}$ . BCLK = 3.072MHz, LRCLK = 48kHz, speaker loads ( $Z_{SPK}$ ) connected between OUTP and OUTN, $Z_{SPK}$ = $\infty$ , $T_A$ = $T_{MIN}$ to $T_{MAX}$ , unless otherwise noted. Typical values are at $T_A$ = +25°C.) (Note 2)

| PARAMETER | SYMBOL | CONE | MIN | TYP | MAX | UNITS | |------------------------------|-----------------|---------------------------------------------------|-------------------------------------------|-----|------|-------|-------| | Supply Voltage Range | V _DD | Guaranteed by PSS | Guaranteed by PSSR test | | | 5.5 | V | | Undervoltage Lockout | UVLO | | | 1.5 | 1.8 | 2.3 | V | | Outcoant Current | | T _A = +25°C | | | 2.75 | 3.35 | Л | | Quiescent Current | I _DD | T _A = +25°C, V _DD = | = +25°C, V _DD = 3.7V | | 2.4 | 2.85 | mA | | Shutdown Current | ISHDN | SD_MODE = 0V, TA | (= +25°C | | 0.6 | 2 | μA | | Standby Current | ISTNDBY | SD_MODE = 1.8V, | no BCLK, T _A = +25°C | | 340 | 400 | μA | | Turn-On Time | t _ON | | | | 7 | 7.5 | ms | | Output Offset Voltage | V _OS | T _A = +25°C, gain = | 15dB | | ±0.3 | ±2.5 | mV | | Click-and-Pop Level | W | Peak voltage, T _A = +25°C, A-weighted, | IIIIO Oliataowiii | | -72 | | - dBV | | Click-and-Pop Level | K _CP | 32 samples per second (Note 3) | Out of shutdown | | -66 | | dbv | | | | $V_{DD} = 2.5V \text{ to } 5.5V,$ | T _A = +25°C | 60 | 75 | | Power-Supply Rejection Ratio | PSRR | T _A = +25°C
(Notes 3, 4) | f = 217Hz,
200mV _P-P ripple | | 77 | | dB | | | | | f = 10kHz,
200mV _P-P ripple | | 60 |