LTC4257CDD-1

Part: LTC4257CDD-1 — Linear Technology (LTC4257-1 family)

Type: IEEE 802.3af PoE Powered Device (PD) Interface Controller with Dual Current Limit

Description: IEEE 802.3af PD interface controller with an onboard 100V, 400mA power MOSFET, 25k signature resistor, programmable Class 0–4 classification current, and a dual-level current limit (140 mA low / 375 mA high typical).

Operating Conditions:

• Supply voltage (VIN, with respect to GND): -1.5V to -57V (maximum operating voltage -57V)
• Operating ambient temperature: 0 to 70 °C (C grade); -40 to 85 °C (I grade)
• UVLO turn-on -36.0V typ and turn-off -30.5V typ (hysteresis)

Absolute Maximum Ratings:

• VIN voltage: -0.3V to -100V
• VOUT, SIGDISA, PWRGD voltage: VIN + 100V to VIN - 0.3V
• RCLASS voltage: VIN + 7V to VIN - 0.3V
• PWRGD current: 10 mA
• RCLASS current: 100 mA
• Storage temperature: -65 to 125 °C (DD package)
• Lead temperature (soldering, 10 sec): 300 °C

Key Specs:

• IC supply current when ON (VIN = -48V): 3 mA max
• Classification supply current (VIN = -17.5V): 0.35 / 0.50 / 0.65 mA (min/typ/max)
• Classification current accuracy: ±3.5% max (10 mA < ICLASS < 40 mA); ICLASS = 1.237/RCLASS
• Signature resistance: 23.25 to 26.00 kΩ (-1.5V ≤ VIN ≤ -9.5V)
• Invalid signature resistance (SIGDISA tied to GND): 9 kΩ typ, 11.8 kΩ max
• MOSFET on-resistance (I = 350 mA, VIN = -48V): 1.0 Ω typ, 1.6 Ω max at 25 °C, 2.0 Ω max over temperature
• Input current limit, high level (VIN = -48V, VOUT = -43V): 350 / 375 / 400 mA (0–70 °C); 340 mA min over -40 to 85 °C
• Input current limit, low level: 100 / 140 / 180 mA
• Power good trip points: 1.3 / 1.5 / 1.7 V (VOUT falling); 2.7 / 3.0 / 3.3 V (VOUT rising)
• VOUT leakage (MOSFET off, VOUT = 57V): 150 μA max
• Thermal shutdown trip: 140 °C typ

Features:

• Complete power interface port for IEEE 802.3af PDs
• Onboard 100V, 400mA power MOSFET
• Precision dual-level current limit
• Onboard 25k signature resistor with disable
• Programmable classification current (Class 0–4)
• Undervoltage lockout
• Thermal overload protection
• Power good signal (open-drain)

Applications:

• IP phone power management
• Wireless access points
• Telecom power control

Package:

• 8-pin DFN, 3mm × 3mm (LTC4257CDD-1 / LTC4257IDD-1, marking LBFZ)
• 8-pin SO (S8) also available in the family

• ■ Complete Power Interface Port for IEEE 802 ® .3af Powered Devices (PDs)
• ■ Onboard 100V, 400mA Power MOSFET
• ■ Precision Dual Level Current Limit
• ■ Onboard 25k Signature Resistor with Disable
• ■ Programmable Classification Current (Class 0-4)
• ■ Undervoltage Lockout
• ■ Thermal Overload Protection
• ■ Power Good Signal
• ■ Available in 8-Pin SO and Low Profile (3mm × 3mm) DFN Packages

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T A = 25 ° C. (Note 3)

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The LTC4257-1 includes thermal overload protection in order to provide full device functionality in a miniature package while maintaining safe operating temperatures. Several factors create the possibility for tremendous power dissipation within the LTC4257-1. At turn on, before the load capacitor has charged up, the instantaneous power dissipated by the LTC4257-1 can be 10W. As the load capacitor charges up, the power dissipation in the LTC4257-1 will decrease until it reaches a steady-state value dependent on the DC load current. The size of the load capacitor determines how fast the power dissipation in the LTC4257-1 will subside. At room temperature, the LTC4257-1 can handle load capacitors as large as 800 μ F without going into thermal shutdown. With a large load capacitor like this, the LTC4257-1 die temperature will increase by about 50 ° C during a single turn-on sequence. If for some reason power were removed from the part and then quickly reapplied so that the LTC4257-1 has to charge up the load capacitor again, the temperature rise would be excessive if safety precautions were not implemented.

The LTC4257-1 protects itself from thermal damage by monitoring the die temperature. If the die temperature exceeds the overtemperature trip point, the current is reduced to zero and very little power is dissipated in the part until it cools below the overtemperature set point.

Once the LTC4257-1 has charged up the load capacitor and the PD is powered and running, there will be some residual heating due to the DC load current of the PD flowing through the internal MOSFET. In some applications, the LTC4257-1 power dissipation may be significant and if dissipated in the S8 package, excessive package heating could occur. This problem can be solved with the use of the DD package which has superior thermal performance. The DD package includes an exposed pad which should be soldered to an isolated heatsink on the printed circuit board.

During classification, excessive heating of the LTC4257-1 can occur if the PSE violates the 75ms probing time limit. To protect the LTC4257-1, thermal protection circuitry will disable classification current if the die temperature exceeds

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the overtemperature trip point. When the die cools down below the trip point, classification current is enabled again.

If the PD is designed to operate at a high ambient temperature and with the maximum allowable supply (57V), there will be a limit to the size load capacitor that can be charged up before the LTC4257-1 reaches the overtemperature trip point. Hitting the overtemperature trip point intermittently does not harm the LTC4257-1, but it will delay completion of capacitor charging. Capacitors up to 200 μ F can be charged without a problem.