LMR14006

Part: LMR14006 Type: Buck Regulator

Key Specs:

• Standby Current: 28 µA in Sleep Mode
• Input Voltage Range: 4 V to 40 V
• Shutdown Current: 1 µA
• Output Current: up to 600 mA
• Switching Frequency: 1.1 MHz and 2.1 MHz
• Feedback Voltage: 0.765 V (typical)

Features:

• Ultra Low 28 µA Standby Current in Sleep Mode
• Input Voltage Range 4 V to 40 V
• 1 μA Shutdown Current
• High Duty Cycle Operation Supported
• Output Current up to 600 mA
• 1.1 MHz and 2.1 MHz Switching Frequency
• Internal Compensation
• High Voltage Enable Input
• Internal Soft Start
• Over Current Protection
• Over Temperature Protection
• Small Overall Solution Size (TSOT-6L Package)
• Pulse by pulse current limit
• Thermal sensing and shutdown

Applications:

• Industrial Distributed Power Systems
• Automotive
• Battery Powered Equipment
• Portable Handheld Instruments
• Portable Media Players

Package:

• TSOT-6L: 2.9mm × 1.6 mm

• Ultra Low 28 µA Standby Current in Sleep Mode
• Input Voltage Range 4 V to 40 V
• 1 μA Shutdown Current
• High Duty Cycle Operation Supported
• Output Current up to 600 mA
• 1.1 MHz and 2.1 MHz Switching Frequency
• Internal Compensation
• High Voltage Enable Input
• Internal Soft Start
• Over Current Protection
• Over Temperature Protection
• Small Overall Solution Size (TSOT-6L Package)

• Industrial Distributed Power Systems
• Automotive
• Battery Powered Equipment
• Portable Handheld Instruments
• Portable Media Players

$V_{IN} = /SHDN = 12V$ , $T_A = 25$ °C, unless otherwise specified.

over operating free-air temperature range (unless otherwise noted) (1)

⁽¹⁾ Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

Over operating free-air temperature range (unless otherwise noted)

⁽¹⁾ Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.4 Thermal Information

⁽²⁾ JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.5 Electrical Characteristics

$V_{IN} = /SHDN = 12V$ , $T_A = 25$ °C, unless otherwise specified.

6.6 Switching Characteristics

Over operating free-air temperature range (unless otherwise noted)

| | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |---------------------|----------------------|---------------------------|------|------|------|-------|--|--|--| | SW (SW PIN) | | f _SW | Curitahing fraguanay | LMR14006X | 935 | 1100 | 1285 | 1.11- | | | Switching frequency | LMR14006Y | 1785 | 2100 | 2415 | kHz | | T _{ON_MIN} | Minimum turn-on time | f _SW = 2.1 MHz | | 95 | | ns | | D _MAX | Maximum duty avala | LMR14006X | | 96% | | | Maximum duty cycle | LMR14006Y | | 97% |

6.7 Typical Characteristics

VIN = 12V, T^A = 25°C, unless otherwise specified.

Typical Characteristics (continued)

VIN = 12V, T^A = 25°C, unless otherwise specified.

7 Detailed Description

7.1 Overview

The LMR14006 device is a 40 V, 600 mA, step-down (buck) regulator. The buck regulator has a very low quiescent current during light load to prolong the battery life.

For LMR14006, to improve performance during line and load transients it implements a constant frequency, current mode control which requires less output capacitance and simplifies frequency compensation design. Two switching frequency options, 1.1 MHz and 2.1 MHz, are available, thus smaller inductor and capacitor can be used. The LMR14006 reduces the external component count by integrating the boot recharge diode. The bias voltage for the integrated high side MOSFET is supplied by a capacitor on the CB to SW pin. The boot capacitor voltage is monitored by an UVLO circuit and will turn the high side MOSFET off when the boot voltage falls below a preset threshold. The LMR14006 can operate at high duty cycles because of the boot UVLO and refresh wimp FET. The output voltage can be stepped down to as low as the 0.8 V reference. Internal soft start is featured to minimize inrush currents.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Continuous Conduction Mode

The LMR14006 steps the input voltage down to a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady state), the buck regulator operates in two cycles. The power switch is connected between VIN and SW. In the first cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and the load current is supplied by Cout and the rising current through the inductor. During the second cycle the transistor is open and the diode is forward biased due to the fact that the inductor current cannot instantaneously change direction. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as: D = VOUT/VIN and D' = (1-D) where D is the duty cycle of the switch, D and D' will be required for design calculations.

Feature Description (continued)

7.3.2 Fixed Frequency Pwm Control

The LMR14006 has two fixed frequency options, and it implements peak current mode control. The output voltage is compared through external resistors on the VFB pin to an internal voltage reference by an error amplifier which drives the internal COMP node. An internal oscillator initiates the turn on of the high side power switch. The error amplifier output is compared to the high side power switch current. When the power switch current reaches the level set by the internal COMP voltage, the power switch is turned off. The internal COMP node voltage will increase and decrease as the output current increases and decreases. The device implements a current limit by clamping the COMP node voltage to a maximum level.

7.3.3 Sleep Mode

The LMR14006 operates in sleep mode at light load currents to improve efficiency by reducing switching and gate drive losses. The LMR14006 is designed so that if the output voltage is within regulation and the peak switch current at the end of any switching cycle is below the sleep current threshold, IINDUCTOR ≤ 80 mA, the device enters sleep mode. For sleep mode operation, the LMR14006 senses peak current, not average or load current, so the load current where the device enters sleep mode is dependent on the output inductor value. When the load current is low and the output voltage is within regulation, the device enters a sleep mode and draws only 28 µA input quiescent current.

7.3.4 Bootstrap Voltage (CB)

The LMR14006 has an integrated boot regulator, and requires a small ceramic capacitor between the CB and SW pins to provide the gate drive voltage for the high side MOSFET. The CB capacitor is refreshed when the high side MOSFET is off and the low side diode conducts. To improve drop out, the LMR14006 is designed to operate at 100% duty cycle as long as the CB to SW pin voltage is greater than 3 V. When the voltage from CB to SW drops below 3V, the high side MOSFET is turned off using an UVLO circuit which allows the low side diode to conduct and refresh the charge on the CB capacitor. Since the supply current sourced from the CB capacitor is low, the high side MOSFET can remain on for more switching cycles than are required to refresh the capacitor, thus the effective duty cycle of the switching regulator is high. Attention must be taken in maximum duty cycle applications with light load. To ensure SW can be pulled to ground to refresh the CB capacitor, an internal circuit will charge the CB capacitor when the load is light or the device is working in dropout condition.

7.3.5 Output Voltage Setting

The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in Functional Block Diagram. The feedback pin voltage 0.765V, so the ratio of the feedback resistors sets the output voltage according to the following equation: VOUT = 0.765V (1+(R1/R2)) Typically R2 will be given as 100 Ω - 10 kΩ for a starting value. To solve for R1 given R2 and Vout uses R1 = R2 ((VOUT/0.765V)-1).

7.3.6 Enable (/SHDN) and VIN Under Voltage Lockout

LMR14006 /SHDN pin is a high voltage tolerant input with an internal pull up circuit. The device can be enabled even if the /SHDN pin is floating. The regulator can also be turned on using 1.23V or higher logic signals. If the use of a higher voltage is desired due to system or other constraints, a 100 kΩ or larger resistor is recommended between the applied voltage and the /SHDN pin to protect the device. When /SHDN is pulled down to 0V, the chip is turned off and enters the lowest shutdown current mode. In shutdown mode the supply current will be decreased to approximately 1 µA. If the shutdown function is not to be used the /SHDN pin may be tied to VIN. The maximum voltage to the SHDN pin should not exceed 40V. LMR14006 has an internal UVLO circuit to shutdown the output if the input voltage falls below an internally fixed UVLO threshold level. This ensures that the regulator is not latched into an unknown state during low input voltage conditions. The regulator will power up when the input voltage exceeds the voltage level. If there is a requirement for a higher UVLO voltage, the /SHDN can be used to adjust the input voltage UVLO by using external resistors.

Feature Description (continued)

7.3.7 Current Limit

The LMR14006 implements current mode control which uses the internal COMP voltage to turn off the high side MOSFET on a cycle-by-cycle basis. Each cycle the switch current and internal COMP voltage are compared, when the peak switch current intersects the COMP voltage, the high side switch is turned off. During overcurrent conditions that pull the output voltage low, the error amplifier will respond by driving the COMP node high, increasing the switch current. The error amplifier output is clamped internally, which functions as a switch current limit.

7.3.8 Overvoltage Transient Protection

The LMR14006 incorporates an overvoltage transient protection (OVTP) circuit to minimize voltage overshoot when recovering from output fault conditions or strong unload transients on power supply designs with low value output capacitance. For example, when the power supply output is overloaded the error amplifier compares the actual output voltage to the internal reference voltage. If the FB pin voltage is lower than the internal reference voltage for a considerable time, the output of the error amplifier will respond by clamping the error amplifier output to a high voltage. Thus, requesting the maximum output current. Once the condition is removed, the regulator output rises and the error amplifier output transitions to the steady state duty cycle. In some applications, the power supply output voltage can respond faster than the error amplifier output can respond, this actuality leads to the possibility of an output overshoot. The OVTP feature minimizes the output overshoot, when using a low value output capacitor, by implementing a circuit to compare the FB pin voltage to OVTP threshold which is 108% of the internal voltage reference. If the FB pin voltage is greater than the OVTP threshold, the high side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the FB voltage drops lower than the OVTP threshold, the high side MOSFET is allowed to turn on at the next clock cycle.

7.3.9 Thermal Shutdown

The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 170°C(typ). The thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal trip threshold. Once the junction temperature decreases below 160°C(typ), the device reinitiates the power up sequence.

8 Applications and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Typical Applications

Figure 9. LMR14006 Design Example with 2.1 MHz Switching Frequency

Below are the recommended typical output voltage inductor/capacitor combinations for optimized total solution size.

Figure 10. Application Circuit, 12 V Output

8.1.1 Design Requirements

This example details the design of a high frequency switching regulator using ceramic output capacitors. A few parameters must be known in order to start the design process. These parameters are typically determined at the system level:

Table 1. Design Parameters

Table 1. Design Parameters (continued)

8.1.2 Detailed Design Procedure

8.1.2.1 Selecting The Switching Frequency

The first step is to decide on a switching frequency for the regulator. Typically, the user will want to choose the highest switching frequency possible since this will produce the smallest solution size. The high switching frequency allows for lower valued inductors and smaller output capacitors compared to a power supply that switches at a lower frequency. The switching frequency that can be selected is limited by the minimum on-time of the internal power switch, the input voltage and the output voltage and the frequency shift limitation. For this example, the output voltage is 5V and the maximum input voltage is 16 V, a switching frequency of 2100 kHz is used.

8.1.2.2 Output Inductor Selection

The most critical parameters for the inductor are the inductance, peak current and the DC resistance. The inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages. Since the ripple current increases with the input voltage, the maximum input voltage is always used to determine the inductance. To calculate the minimum value of the output inductor, use Equation 1. KIND is a coefficient that represents the amount of inductor ripple current relative to the maximum output current. A reasonable value is setting the ripple current to be 30% of the DC output current. For this design example, the minimum inductor value is calculated to be 9.1 μH, and a nearest standard value was chosen: 10 μH. For the output filter inductor, it is important that the RMS current and saturation current ratings not be exceeded. The RMS and peak inductor current can be found from Equation 3 and Equation 4. The inductor ripple current is 0.16 A, and the RMS current is 0.602 A. As the equation set demonstrates, lower ripple currents will reduce the output voltage ripple of the regulator but will require a larger value of inductance. A good starting point for most applications is a 10 µH with 2 A current rating. Using a rating near 2 A will enable the LMR14006 to current limit without saturating the inductor. This is preferable to the LMR14006 going into thermal shutdown mode and the possibility of damaging the inductor if the output is shorted to ground or other long-term overload.

$$L_{o,\text{min}} = \frac{V_{in,\text{max}} - V_{out}}{I_o \times K_{IND}} \times \frac{V_{out}}{V_{in,\text{max}} \times f_{sw}} \tag{1}$$

$$I_{ripple} = \frac{V_{out} \times (V_{in \max} - V_{out})}{V_{in \max} \times L_o \times f_{sw}}$$

$$I_{L-RMS} = \sqrt{I_o^2 + \frac{1}{12} I_{ripple}^2}$$ (2)

$$I_{L-RMS} = \sqrt{I_o^2 + \frac{1}{12}I_{ripple}^2}$$ (3)

$$I_{L-peak} = I_o + \frac{I_{ripple}}{2} \tag{4}$$

8.1.2.3 Output Capacitor

The selection of C_OUT is mainly driven by three primary considerations. The output capacitor will determine the modulator pole, the output voltage ripple, and how the regulator responds to a large change in load current. The output capacitance needs to be selected based on the most stringent of these three criteria.

The desired response to a large change in the load current is the first criteria. The regulator usually needs two or more clock cycles for the control loop to see the change in load current and output voltage and adjust the duty cycle to react to the change. The output capacitance must be large enough to supply the difference in current for 2 clock cycles while only allowing a tolerable amount of droop in the output voltage. Equation 5 shows the minimum output capacitance necessary to accomplish this. For this example, the transient load response is specified as a 3% change in $V_{OUT}$ for a load step from 0.03A to 0.6A (full load). For this example, $\Delta I_{OUT} = 0.6 - 0.03 = 0.57$ A and $\Delta V_{OUT} = 0.03 \times 5 = 0.15$ V. Using these numbers gives a minimum capacitance of 3.6µF. For ceramic capacitors, the ESR is usually small enough to ignore in this calculation. Aluminum electrolytic and tantalum capacitors have higher ESR that should be taken into account.

The stored energy in the inductor will produce an output voltage overshoot when the load current rapidly decreases. The output capacitor must also be sized to absorb energy stored in the inductor when transitioning from a high load current to a lower load current. Equation 6 is used to calculate the minimum capacitance to keep the output voltage overshoot to a desired value. Where L is the value of the inductor, $I_{OH}$ is the output current under heavy load, $I_{OL}$ is the output under light load, Vf is the final peak output voltage, and Vi is the initial capacitor voltage. For this example, the worst case load step will be from 0.6 A to 0.03 A. The output voltage will increase during this load transition and the stated maximum in our specification is 3% of the output voltage. This will make Vo_overshoot = $1.03 \times 5 = 5.15 \text{ V}$ . V; is the initial capacitor voltage which is the nominal output voltage of 5V. Using these numbers in Equation 6 yields a minimum capacitance of $2.36 , \mu\text{F}$ .

Equation 7 calculates the minimum output capacitance needed to meet the output voltage ripple specification. Where $f_{sw}$ is the switching frequency, Vo_ripple is the maximum allowable output voltage ripple, and I__ripple is the inductor ripple current. Equation 7 yields 0.21 $\mu$ F.

Equation 8 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple specification. Equation 8 indicates the ESR should be less than $277m\Omega$ .

Additional capacitance de-ratings for aging, temperature and dc bias should be factored in which will increase this minimum value. For this example, $10\mu F$ ceramic capacitors will be used. Capacitors in the range of $4.7\mu F$ $100\mu F$ are a good starting point with an ESR of $0.1\Omega$ or less.

$$C_{out} > \frac{2 \times \Delta I_{out}}{fsw \times \Delta V_{out}} \tag{5}$$

$$C_{out} > L_o \times \frac{(Ioh^2 - Iol^2)}{(Vf^2 - Vi^2)} \tag{6}$$

$$C_{out} > \frac{1}{8 \times fsw} \times \frac{1}{\frac{V_{o_ripple}}{I_{L_ripple}}}$$ (7)

$$R_{ESR} < \frac{V_{o_ripple}}{I_{L_ripple}} \tag{8}$$

8.1.2.4 Schottky Diode

The breakdown voltage rating of the diode is preferred to be 25% higher than the maximum input voltage. The current rating for the diode should be equal to the maximum output current for best reliability in most applications. In cases where the input voltage is much greater than the output voltage the average diode current is lower. In this case it is possible to use a diode with a lower average current rating, approximately (1-D) $\times$ I_OUT however the peak current rating should be higher than the maximum load current. A 0.5A to 1A rated diode is a good starting point.

8.1.2.5 Input Capacitor

A low ESR ceramic capacitor is needed between the $V_{IN}$ pin and ground pin. This capacitor prevents large voltage transients from appearing at the input. Use a $1\mu\text{F}-10\mu\text{F}$ value with X5R or X7R dielectric. Depending on construction, a ceramic capacitor's value can decrease up to 50% of its nominal value when rated voltage is applied. Consult with the capacitor manufactures data sheet for information on capacitor derating over voltage and temperature. The capacitor must also have a ripple current rating greater than the maximum input current ripple of the LMR14006. The input ripple current can be calculated using below Equation 9.

For this example design, one $2.2\mu\text{F}$ , 50V capacitor is selected. The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 10. Using the design example values, $I_{\text{OUT}}$ max = 0.6A, $C_{\text{IN}}$ = 2.2 $\mu\text{F}$ , $f_{\text{SW}}$ = 2100kHz, yields an input voltage ripple of 32.5mV and a rms input ripple current of 0.3A.

$$I_{cirms} = I_{out} \times \sqrt{\frac{V_{out}}{V_{in,\text{min}}} \times \frac{(V_{in,\text{min}} - V_{out})}{V_{in,\text{min}}}}$$ (9)

$$\Delta V_{in} = \frac{I_{out , \text{max}} \times 0.25}{C_{in} \times fsw} \tag{10}$$

8.1.2.6 Bootstrap Capacitor Selection

A 0.1 $\mu$ F ceramic capacitor or larger is recommended for the bootstrap capacitor ( $C_{BOOT}$ ). For applications where the input voltage is close to output voltage a larger capacitor is recommended, generally 0.1 $\mu$ F to 1 $\mu$ F to ensure plenty of gate drive for the internal switches and a consistently low $R_{DSON}$ . A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10V or higher is recommended because of the stable characteristics over temperature and voltage.

8.1.3 Application Performance Curves

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9 Layout

9.1 Layout Guidelines

To reduce problems with conducted noise pick up the ground side of feedback network should be connected directly to the GND pin with its own connection. The feedback network, resistors R1 and R2, should be kept close to the FB pin, and away from the inductor to minimize coupling noise into the feedback pin. The input bypass capacitor $C_{\text{IN}}$ must be placed close to the VIN pin. This will reduce copper trace resistance which effects input voltage ripple of the IC. The inductor L1 should be placed close to the SW pin to reduce magnetic and electrostatic noise. The output capacitor, $C_{\text{OUT}}$ should be placed close to the junction of L1 and the diode D1. The L1, D1, and $C_{\text{OUT}}$ trace should be as short as possible to reduce conducted and radiated noise and increase overall efficiency. The ground connection for the diode, $C_{\text{IN}}$ , and $C_{\text{OUT}}$ should be as small as possible and tied to the system ground plane in only one spot (preferably at the $C_{\text{OUT}}$ ground point) to minimize conducted noise in the system ground plane. For more detail on switching power supply layout considerations see Application Note AN-1149.

10 Device and Documentation Support

10.1 Trademarks

SIMPLE SWITCHER is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.

10.2 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

10.3 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 31-Oct-2025

PACKAGING INFORMATION

⁽¹⁾ Status: For more details on status, see our product life cycle.

⁽²⁾ Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind.

⁽³⁾ RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition.

⁽²⁾ JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.