LD39050

Part: LD39050 — STMicroelectronics

Type: Low Dropout (LDO) Voltage Regulator

Description: 500 mA low quiescent current and low noise voltage regulator with an input voltage range from 1.5 V to 5.5 V, 200 mV typical dropout, and available in fixed or adjustable output versions.

Operating Conditions:

• Supply voltage: 1.5 to 5.5 V
• Operating junction temperature: -40 to 125 °C
• Output current: up to 500 mA

Absolute Maximum Ratings:

• Max supply voltage: 7 V
• Max junction/storage temperature: 150 °C

Key Specs:

• Dropout voltage: 200 mV typ. at 500 mA (V OUT fixed to 1.5 V)
• Output noise voltage: 30 μV RMS typ. (10 Hz to 100 kHz, I OUT = 100 mA, V OUT = 0.8 V)
• Quiescent current (no load): 20 μA typ.
• Quiescent current (500 mA load): 100 μA typ.
• Quiescent current (OFF mode): 0.001 μA typ., 1 μA max.
• Supply voltage rejection: 65 dB typ. at 1 kHz (V OUT = 0.8 V, I OUT = 10 mA)
• Short-circuit current: 800 mA typ.
• Thermal shutdown: 160 °C typ.

Features:

• Ultra low-dropout voltage
• Very low quiescent current
• Very low noise without bypass capacitor
• Output voltage tolerance: ± 2.0% @ 25 °C
• Logic-controlled electronic shutdown
• Compatible with ceramic capacitor C OUT = 1 μF
• Internal current and thermal limit
• Power Good function

Applications:

• Mobile phones
• Hard disks
• Battery-powered systems

Package:

• DFN6 (3x3 mm)
• DFN6 (2x2 mm)

• Input voltage from 1.5 to 5.5 V
• Ultra low-dropout voltage (200 mV typ. at 500 mA load)
• Very low quiescent current (20 μA typ. at no load, 100 μA typ. at 500 mA load, 1 μA max. in OFF mode)
• Very low noise without bypass capacitor
• Output voltage tolerance: ± 2.0% @ 25 °C
• 500 mA guaranteed output current
• Wide range of output voltages available on request: 0.8 V to 4.5 V with 100 mV step and adjustable from 0.8 V
• Logic-controlled electronic shutdown
• Compatible with ceramic capacitor C OUT = 1 μF
• Internal current and thermal limit
• Package DFN6 (3x3 mm) and DFN6 (2x2 mm)
• Temperature range: from -40 °C to 125 °C

Figure 3. DFN6 (3x3 mm) pin connection (top view)

Figure 4. DFN6 (2x2 mm) pin connection (top view)

Table 1. Pin description

Table 1. Pin description

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T J = 25 °C, V IN = 1.8 V, C IN = C OUT = 1 μF, I OUT = 10 mA, V EN = V IN , unless otherwise specified.

Table 5. Electrical characteristics for the LD39050 (adjustable)

Table 5. Electrical characteristics for the LD39050 (adjustable)

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Table 5. Electrical characteristics for the LD39050 (adjustable) (continued)

TJ = 25 °C, V IN = V OUT(NOM) + 1 V, C IN = C OUT = 1 μF, I OUT = 10 mA, V EN = V IN , unless otherwise specified.

Table 6. Electrical characteristics for the LD39050 (fixed output)

Table 6. Electrical characteristics for the LD39050 (fixed output)

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Table 6. Electrical characteristics for the LD39050 (fixed output) (continued)

1. Turn-on time is time measured between the enable input just exceeding V EN high value and the output voltage just reaching 95% of its nominal value

Table 2. Absolute maximum ratings

Note:

Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All values are referred to GND.

Table 3. Thermal data

Table 4. ESD performance

Table 4. ESD performance

The LD39050 is an ultra low-dropout linear regulator. It provides up to 500 mA with a 200 mV dropout. The input voltage range is from 1.5 V to 5.5 V. The device is available in fixed and adjustable output versions.

The regulator is equipped with internal protection circuitry, such as short-circuit current limiting and thermal protection.

The regulator is designed to be stable with ceramic capacitors on the input and the output. The recommended values of the input and output ceramic capacitors are from 1 μF to 22 μF with 1 μF typical. The input capacitor must be connected within 0.5 inches of the V IN terminal. The output capacitor must also be connected within 0.5 inches of output pin. There is no upper limit to the value of the input capacitor.

Figure 35 and Figure 36 illustrate the typical application schematics:

Figure 35. Application schematic for fixed version

Figure 36. Application schematic for adjustable version

Regarding to the adjustable version, the output voltage can be adjusted from 0.8 V up to the input voltage minus the voltage drop across the PMOS (dropout voltage), by connecting a resistor divider between the ADJ pin and the output, thus allowing the remote voltage sensing.

The resistor divider should be selected using the following equation:

V_OUT= V_ADJ≤ft(1 + R₁/ R₂right)withV_ADJ= 0 . 8 vee(typ.)

Resistors should be used with values in the range from 10 k Ω to 50 k Ω . Lower values can also be suitable, but they increase current consumption.

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

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