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INA2181A3

INAx181 Bidirectional, Low- and High-Side Voltage Output, Current-Sense Amplifiers

Current-Sense Amplifier

The INA2181A3 is a current-sense amplifier from Texas Instruments. INAx181 Bidirectional, Low- and High-Side Voltage Output, Current-Sense Amplifiers. View the full INA2181A3 datasheet below including electrical characteristics, absolute maximum ratings.

Manufacturer

Texas Instruments

Category

Current-Sense Amplifier

Overview

Part: INA181, INA2181, INA4181 from Texas Instruments

Type: Bidirectional, Low- and High-Side Voltage Output, Current-Sense Amplifiers

Description: The INAx181 is a family of bidirectional current-sense amplifiers that sense voltage drops across current-sense resistors at common-mode voltages from –0.2 V to +26 V, offering fixed gain options from 20 V/V to 200 V/V, with a maximum offset voltage of ±150 μV at VCM = 0 V.

Operating Conditions:

  • Supply voltage: 2.7 V to 5.5 V
  • Operating temperature: –40°C to +125°C
  • Common-mode input voltage: –0.2 V to 26 V

Absolute Maximum Ratings:

  • Max supply voltage: 6 V
  • Max continuous current: 8 mA (output)
  • Max junction/storage temperature: 150 °C

Key Specs:

  • Common-mode rejection ratio (CMRR): 84 dB (min) at VIN+ = 0 V to 26 V, VSENSE = 0 mV, TA = –40°C to +125°C
  • Offset voltage (VOS, RTI): ±150 μV (max) at VSENSE = 0 mV, VIN+ = 0 V
  • Offset drift (dVOS/dT, RTI): 1 μV/°C (max) at VSENSE = 0 mV, TA = –40°C to +125°C
  • Gain options (G): 20 V/V, 50 V/V, 100 V/V, 200 V/V
  • Gain error (EG): ±1% (max) at VOUT = 0.5 V to VS – 0.5 V, TA = –40°C to +125°C
  • Bandwidth (BW): 350 kHz (A1 devices, CLOAD = 10 pF)
  • Slew rate (SR): 2 V/μs
  • Quiescent current (IQ): 260 μA (max, INA181, VSENSE = 0 mV, TA = –40°C to +125°C)

Features:

  • Common-mode range (VCM): –0.2 V to +26 V
  • High bandwidth: 350 kHz (A1 devices)
  • Offset voltage: ±150 μV (maximum) at VCM = 0 V
  • Output slew rate: 2 V/μs
  • Bidirectional current-sensing capability
  • Accuracy: ±1% gain error (maximum), 1-μV/°C offset drift (maximum)
  • Gain options: 20 V/V, 50 V/V, 100 V/V, 200 V/V
  • Quiescent current: 260 μA maximum (INA181)

Applications:

  • Motor control
  • Battery monitors and balancers
  • Power management
  • Lighting control
  • Solar inverters

Package:

  • INA181: DBV (SOT-23, 6), DCK (SC70, 6)
  • INA2181: DGS (VSSOP, 10), DSQ (WSON, 10)
  • INA4181: PW (TSSOP, 20)

Features

  • Common-mode range (VCM): –0.2 V to +26 V
  • High bandwidth: 350 kHz (A1 devices)
  • Offset voltage:
    • ±150 μV (maximum) at VCM = 0 V
    • ±500 μV (maximum) at VCM = 12 V
  • Output slew rate: 2 V/μs
  • Bidirectional current-sensing capability
  • Accuracy:
    • ±1% gain error (maximum)
    • 1-μV/°C offset drift (maximum)
  • Gain options:
    • 20 V/V (A1 devices)
    • 50 V/V (A2 devices)
    • 100 V/V (A3 devices)
    • 200 V/V (A4 devices)
  • Quiescent current: 260 μA maximum (INA181)

Applications

Typical Application Circuit

3 Description

The INA181, INA2181, and INA4181 (INAx181) current sense amplifiers are designed for costoptimized applications. These devices are part of a family of bidirectional, current-sense amplifiers (also called current-shunt monitors) that sense voltage drops across current-sense resistors at commonmode voltages from –0.2 V to +26 V, independent of the supply voltage. The INAx181 family integrates a matched resistor gain network in four, fixed-gain device options: 20 V/V, 50 V/V, 100 V/V, or 200 V/V. This matched gain resistor network minimizes gain error and reduces the temperature drift.

These devices operate from a single 2.7-V to 5.5- V power supply. The single-channel INA181 draws a maximum supply current of 260 μA; whereas, the dual-channel INA2181 draws a maximum supply current of 500 μA, and the quad-channel INA4181 draws a maximum supply current of 900 μA.

The INA181 is available in both the 6-pin, SOT-23 and SC70 packages. The INA2181 is available in 10-pin, VSSOP and WSON packages. The INA4181 is available in a 20-pin, TSSOP package. All device options are specified over the extended operating temperature range of –40°C to +125°C.

Package Information

PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
INA181DBV (SOT-23, 6)2.90 mm × 2.80 mm
DCK (SC70, 6)2.00 mm × 2.10 mm
INA2181DGS (VSSOP, 10)3.00 mm × 4.90 mm
DSQ (WSON, 10)2.00 mm × 2.00 mm
INA4181PW (TSSOP, 20)6.50 mm × 6.40 mm
  • (1) For all available packages, see Section 11.
  • (2) The package size (length × width) is a nominal value and includes pins, where applicable.

Table of Contents

  • 1 Features1 8 Application and Implementation23
  • 2 Applications1 8.1 Application Information 23
  • 3 Description1 8.2 Typical Application 30
  • 4 Device Comparison3 8.3 Power Supply Recommendations31
  • 5 Pin Configuration and Functions4 8.4 Layout 33
  • 6 Specifications 7 9 Device and Documentation Support37
  • 6.1 Absolute Maximum Ratings 7 9.1 Device Support 37
  • 6.2 ESD Ratings 7 9.2 Documentation Support 37
  • 6.3 Recommended Operating Conditions7 9.3 Receiving Notification of Documentation Updates37
  • 6.4 Thermal Information7 9.4 Support Resources 37
  • 6.5 Electrical Characteristics8 9.5 Trademarks37
  • 6.6 Typical Characteristics9 9.6 Electrostatic Discharge Caution37
  • 7 Detailed Description16 9.7 Glossary37
  • 7.1 Overview16 10 Revision History 38
  • 7.2 Functional Block Diagrams 16 11 Mechanical, Packaging, and Orderable
  • 7.3 Feature Description18 Information 39
  • 7.4 Device Functional Modes20

4 Device Comparison

Table 4-1. Device Comparison

PRODUCTNUMBER OF CHANNELSGAIN (V/V)
INA181A1120
INA181A2150
INA181A31100
INA181A41200
INA2181A1220
INA2181A2250
INA2181A32100
INA2181A42200
INA4181A1420
INA4181A2450
INA4181A34100
INA4181A44200

5 Pin Configuration and Functions

Figure 5-1. INA181: DBV Package 6-Pin SOT-23 Top View

Figure 5-2. INA181: DCK Package 6-Pin SC70 Top View

Table 5-1. Pin Functions: INA181 (Single Channel)

NAMEPINTYPEDESCRIPTION
SOT-23SC70
GND22AnalogGround
IN–45Analog inputCurrent-sense amplifier negative input. For high-side applications, connect
to load side of sense resistor. For low-side applications, connect to ground
side of sense resistor.
IN+34Analog inputCurrent-sense amplifier positive input. For high-side applications, connect
to bus-voltage side of sense resistor. For low-side applications, connect to
load
INA2181INA4181
GND416AnalogGround
IN–123Analog inputCurrent-sense amplifier negative input for Channel 1. For high-side applications, connect to load side of Channel 1 sense resistor. For low-side applications, connect to ground side of Channel 1 sense resistor.
IN+134Analog inputCurrent-sense amplifier positive input for Channel 1. For high-side applications, connect to bus-voltage side of Channel 1
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Figure 5-3. INA2181: DGS Package 10-Pin VSSOP Top View

A. Thermal Pad can be left floating or connected to GND.

Figure 5-4. INA2181: DSQ Package 10-Pin WSON Top View

Figure 5-5. INA4181: PW Package 20-Pin TSSOP Top View

Table 5-2. Pin Functions: INA2181 (Dual Channel) and INA4181 (Quad Channel)

NAMEPINTYPEDESCRIPTION
SOT-23SC70
GND22Analog
IN-45Analog input
IN+34Analog input
OUT16Analog output
REF51Analog input
VS63Analog

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Table 5-2. Pin Functions: INA2181 (Dual Channel) and INA4181 (Quad Channel) (continued)

PIN
NAMEINA2181
IN+3
IN–4
IN+4
NC
OUT11
OUT29
OUT3
OUT4
REF15
REF26
REF3
REF4
VS10

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MINMAXUNIT
Supply voltage, VS6V
Analog inputs, IN+, IN– (2)Differential (VIN+) – (VIN–)–2626V
Common-mode (3)GND – 0.326V
Input voltage rangeat REF pinGND – 0.3VS + 0.3V
Output VoltageGND – 0.3VS + 0.3V
Maximum output current, IOUT8mA
Operating free-air temperature, TA–55150°C
Junction temperature, TJ150°C
Storage temperature, Tstg–65150°C
  • (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
  • (2) VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
  • (3) Input voltage at any pin can exceed the voltage shown if the current at that pin is limited to 5 mA.

6.2 ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)±3000V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)±1000

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MINNOMMAXUNIT
VCMCommon-mode input voltage (IN+ and IN–)–0.21226V
VSOperating supply voltage2.755.5V
TAOperating free-air temperature–40125°C

6.4 Thermal Information

INA181INA2181INA4181
THERMAL METRIC (1)DCK (SC70)DBV (SOT-23)DSQ (WSON)DGS (VSSOP)PW (TSSOP)UNIT
6 PINS6 PINS10 PINS10 PINS14 PINS
RθJAJunction-to-ambient thermal resistance188.0198.774.51

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

at TA = 25°C, VS = 5 V, VREF = VS / 2, VIN+ = 12 V, and VSENSE = VIN+ – VIN– (unless otherwise noted)

PARAMETERCONDITIONSMINTYPMAXUNIT
INPUT
CMRRCommon-mode rejection ratio, RTI (1)VIN+ = 0 V to 26 V, VSENSE = 0 mV,
TA = –40°C to +125°C
84100dB
VSENSE = 0 mV, VIN+ = 0 V±25±150μV
VOSOffset voltage, RTIVSENSE = 0 mV±100±500μV
dVOS/dTOffset drift, RTIVSENSE = 0 mV, TA = –40°C to +125°C0.21μV/°C
PSRRRTI vs power supply ratioVS = 2.7 V to 5.5 V, VIN+ = 12 V,
VSENSE = 0 mV
±8±40μV/V
Input bias currentVSENSE = 0 mV, VIN+ = 0 V-6μA
IIBVSENSE = 0 mV75μA
IIOInput offset currentVSENSE = 0 mV±0.05μA
OUTPUTA1 devices
A2 devices
20
50
V/V
V/V
GGainA3 devices
A4 devices
100
200
V/V
V/V
EGGain errorVOUT = 0.5 V to VS – 0.5 V,
TA = –40°C to +125°C
±0.1%±1%
Gain error vs temperature
Nonlinearity error
TA = –40°C to +125°C
VOUT = 0.5 V to VS – 0.5 V
1.5
±0.01%
20ppm/°C
Maximum capacitive load
VOLTAGE OUTPUT (2)
No sustained oscillation1nF
VSPSwing to VS power-supply rail (3)RL = 10 kΩ to GND, TA = –40°C to
+125°C
(VS) – 0.02(VS) – 0.03V
VSNSwing to GND (3)
FREQUENCY RESPONSE
RL = 10 kΩ to GND, TA = –40°C to
+125°C
A1 devices, CLOAD = 10 pF
A2 devices, CLOAD = 10 pF
(VGND) +
0.0005
350
210
(VGND) +
0.005
V
kHz
kHz
BWBandwidthA3 devices, CLOAD = 10 pF
A4 devices, CLOAD = 10 pF
150
105
kHz
kHz
SRSlew rate2V/μs
NOISE, RTI (1)Voltage noise density
POWER SUPPLY
VSENSE = 0 mV40
195
260nV/√Hz
INA181VSENSE = 0 mV, TA = –40°C to +125°C
VSENSE = 0 mV
356300
500
μA
IQQuiescent currentINA2181VSENSE = 0 mV, TA = –40°C to +125°C
VSENSE = 0 mV
690520
900
μA
INA4181VSENSE = 0 mV, TA = –40°C to +125°C1000μA

(1) RTI = referred-to-input.

(2) See Output Voltage Swing vs Output Current

(3) Swing specifications are tested with an overdriven input condition.

6.6 Typical Characteristics

at TA = 25 °C, VS = 5 V, VREF = VS / 2 , and VIN+ = 12 V (unless otherwise noted)

at TA = 25 °C, VS = 5 V, VREF = VS / 2 , and VIN+ = 12 V (unless otherwise noted)

at TA = 25 °C, VS = 5 V, VREF = VS / 2 , and VIN+ = 12 V (unless otherwise noted)

at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)

Product Folder Links: INA181 INA2181 INA4181

at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)

at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)

at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)

Figure 6-38. Channel Separation vs Frequency (INA2181)

7 Detailed Description

7.1 Overview

The INA181, INA2181, and INA4181 (INAx181) are 26-V common-mode, current-sensing amplifiers used in both low-side and high-side configurations. These specially-designed, current-sensing amplifiers accurately measure voltages developed across current-sensing resistors on common-mode voltages that far exceed the supply voltage powering the device. Current can be measured on input voltage rails as high as 26 V, and the devices can be powered from supply voltages as low as 2.7 V.

7.2 Functional Block Diagrams

Figure 7-1. INA181 Functional Block Diagram

Figure 7-2. INA2181 Functional Block Diagram

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Figure 7-3. INA4181 Functional Block Diagram

7.3 Feature Description

7.3.1 High Bandwidth and Slew Rate

The INAx181 support small-signal bandwidths as high as 350 kHz, and large-signal slew rates of 2 V/μs. The ability to detect rapid changes in the sensed current, as well as the ability to quickly slew the output, make the INAx181 a good choice for applications that require a quick response to input current changes. One application that requires high bandwidth and slew rate is low-side motor control, where the ability to follow rapid changing current in the motor allows for more accurate control over a wider operating range. Another application that requires higher bandwidth and slew rates is system fault detection, where the INAx181 are used with an external comparator and a reference to quickly detect when the sensed current is out of range.

7.3.2 Bidirectional Current Monitoring

The INA181 senses current flow through a sense resistor in both directions. The bidirectional current-sensing capability is achieved by applying a voltage at the REF pin to offset the output voltage. A positive differential voltage sensed at the inputs results in an output voltage that is greater than the applied reference voltage; likewise, a negative differential voltage at the inputs results in output voltage that is less than the applied reference voltage. The output voltage of the current-sense amplifier is shown in Equation 1.

$VOUT = (ILOAD × RSENSE × GAIN) + VREF(1)

where

  • ILOAD is the load current to be monitored.
  • RSENSE is the current-sense resistor.
  • GAIN is the gain option of the selected device.
  • VREF is the voltage applied to the REF pin.

7.3.3 Wide Input Common-Mode Voltage Range

The INAx181 support input common-mode voltages from –0.2 V to +26 V. Because of the internal topology, the common-mode range is not restricted by the power-supply voltage (VS) as long as VS stays within the operational range of 2.7 V to 5.5 V. The ability to operate with common-mode voltages greater or less than VS allow the INAx181 to be used in high-side, as well as low-side, current-sensing applications, as shown in Figure 7-4.

Figure 7-4. High-Side and Low-Side Sensing Connections

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7.3.4 Precise Low-Side Current Sensing

When used in low-side current sensing applications the offset voltage of the INAx181 is within ±150 μV. The low offset performance of the INAx181 has several benefits. First, the low offset allows these devices to be used in applications that must measure current over a wide dynamic range. In this case, the low offset improves the accuracy when the sensed currents are on the low end of the measurement range. Another advantage of low offset is the ability to sense lower voltage drop across the sense resistor accurately, thus allowing a lower-value shunt resistor. Lower-value shunt resistors reduce power loss in the current sense circuit, and help improve the power efficiency of the end application.

The gain error of the INAx181 is specified to be within 1% of the actual value. As the sensed voltage becomes much larger than the offset voltage, this voltage becomes the dominant source of error in the current sense measurement.

7.3.5 Rail-to-Rail Output Swing

The INAx181 allow linear current sensing operation with the output close to the supply rail and GND. The maximum specified output swing to the positive rail is 30 mV, and the maximum specified output swing to GND is only 5 mV. To compare the output swing of the INAx181 to an equivalent operational amplifier (op amp), the inputs are overdriven to approximate the open-loop condition specified in operational amplifier data sheets. The current-sense amplifier is a closed-loop system; therefore, the output swing to GND can be limited by the product of the offset voltage and amplifier gain during unidirectional operation (VREF = 0 V).

For devices that have positive offset voltages, the swing to GND is limited by the larger of either the offset voltage multiplied by the gain or the swing to GND specified in the Electrical Characteristics table.

For example, in an application where the INA181A4 (gain = 200 V/V) is used for low-side current sensing and the device has an offset of 40 μV, the product of the device offset and gain results in a value of 8 mV, greater than the specified negative swing value. Therefore, the swing to GND for this example is 8 mV. If the same device has an offset of –40 μV, then the calculated zero differential signal is –8 mV. In this case, the offset helps overdrive the swing in the negative direction, and swing performance is consistent with the value specified in the Electrical Characteristics table.

The offset voltage is a function of the common-mode voltage as determined by the CMRR specification; therefore, the offset voltage increases when higher common-mode voltages are present. The increase in offset voltage limits how low the output voltage can go during a zero-current condition when operating at higher common-mode voltages with VREF = 0 V . The typical limitation of the zero-current output voltage vs commonmode voltage for each gain option is shown in Figure 7-5.

Figure 7-5. Zero-Current Output Voltage vs Common-Mode Voltage

7.4 Device Functional Modes

7.4.1 Normal Mode

The INAx181 are in normal operation when the following conditions are met:

  • The power supply voltage (VS) is between 2.7 V and 5.5 V.
  • The common-mode voltage (VCM) is within the specified range of –0.2 V to +26 V.
  • The maximum differential input signal times gain plus VREF is less than VS minus the output voltage swing to VS.
  • The minimum differential input signal times gain plus VREF is greater than the swing to GND (see the Rail-to-Rail Output Swing section).

During normal operation, these devices produce an output voltage that is the gained-up representation of the difference voltage from IN+ to IN– plus the reference voltage at VREF.

7.4.2 Unidirectional Mode

These devices can be configured to monitor current flowing in one direction (unidirectional) or in both directions (bidirectional) depending on how the REF pin is configured. The most common case is unidirectional where the output is set to ground when no current is flowing by connecting the REF pin to ground, as shown in Figure 7-6. When the current flows from the bus supply to the load, the input signal across IN+ to IN– increases, and causes the output voltage at the OUT pin to increase.

Figure 7-6. Unidirectional Application

The linear range of the output stage is limited by how close the output voltage can approach ground under zero input conditions. In unidirectional applications where measuring very low input currents is desirable, bias the REF pin to a convenient value above 50 mV to get the output into the linear range of the device. To limit common-mode rejection errors, buffer the reference voltage connected to the REF pin.

A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, VS. This method results in the output voltage saturating at 200 mV less than the supply voltage when no differential input signal is present. This method is similar to the output saturated low condition with no input signal when the REF pin is connected to ground. The output voltage in this configuration only responds to negative currents that develop negative differential input voltage relative to the device IN– pin. Under these conditions, when the differential input signal increases negatively, the output voltage moves downward from the saturated supply voltage. The voltage applied to the REF pin must not exceed VS.

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7.4.3 Bidirectional Mode

The INAx181 are bidirectional, current-sense amplifiers capable of measuring currents through a resistive shunt in two directions. This bidirectional monitoring is common in applications that include charging and discharging operations where the current flowing through the resistor can change directions.

Figure 7-7. Bidirectional Application

The ability to measure this current flowing in both directions is enabled by applying a voltage to the REF pin, as shown in Figure 7-7. The voltage applied to REF (VREF) sets the output state that corresponds to the zero-input level state. The output then responds by increasing above VREF for positive differential signals (relative to the IN– pin) and responds by decreasing below VREF for negative differential signals. This reference voltage applied to the REF pin can be set anywhere between 0 V to VS. For bidirectional applications, VREF is typically set at mid-scale for equal signal range in both current directions. In some cases, however, VREF is set at a voltage other than mid-scale when the bidirectional current and corresponding output signal do not need to be symmetrical.

7.4.4 Input Differential Overload

If the differential input voltage (VIN+ – VIN–) multiplied by the gain exceeds the voltage swing specification, the INAx181 drives the output as close as possible to the positive supply or ground, and does not provide accurate measurement of the differential input voltage. If this input overload occurs during normal circuit operation, then reduce the value of the shunt resistor or use a lower-gain version with the chosen sense resistor to avoid this mode of operation. If a differential overload occurs in a fault event, then the output of the INAx181 returns to the expected value approximately 20 μs after the fault condition is removed.

When the INAx181 output is driven to either the supply rail or ground, increasing the differential input voltage does not damage the device as long as the absolute maximum ratings are not surpassed. Following these guidelines, the INAx181 output maintains polarity, and phase reversal does not occur.

7.4.5 Shutdown Mode

Although the INAx181 do not have a shutdown pin, the low power consumption of these devices allows the output of a logic gate or transistor switch to power the INAx181. This gate or switch turns on and off the INAx181 power-supply quiescent current.

However, in current shunt monitoring applications, the amount of current drained from the shunt circuit in shutdown conditions is also a concern. Evaluating this current drain involves considering the simplified schematic of the INAx181 in shutdown mode, as shown in Figure 7-8.

Figure 7-8. Basic Circuit to Shut Down the INA181 With a Grounded Reference

There is typically more than 500 kΩ of impedance (from the combination of 500-kΩ feedback and input gain set resistors) from each input of the INAx181 to the OUT pin and to the REF pin. The amount of current flowing through these pins depends on the voltage at the connection. For example, if the REF pin is grounded, the calculation of the effect of the 500 kΩ impedance from the shunt to ground is straightforward. However, if the reference is powered while the INAx181 is in shutdown mode, the input current will be determined by the 500-kΩ impedance and the voltage difference between the positive input and the voltage applied to the reference voltage.

Regarding the 500-kΩ path to the output pin, the output stage of a disabled INAx181 does constitute a good path to ground. Consequently, this current is directly proportional to a shunt common-mode voltage present across a 500-kΩ resistor.

As long as the shunt common-mode voltage is greater than VS when the device is powered up, there is an additional and well-matched 55-μA typical current that flows in each of the inputs. If less than VS, the common-mode input currents are negligible, and the only current effects are the result of the 500-kΩ resistors.

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8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

8.1 Application Information

The INAx181 amplify the voltage developed across a current-sensing resistor as current flows through the resistor to the load or ground. The ability to drive the reference pin to adjust the functionality of the output signal offers multiple configurations, as discussed in previous sections.

8.1.1 Basic Connections

Figure 8-1 shows the basic connections of the INA181. Connect the input pins (IN+ and IN–) as closely as possible to the shunt resistor to minimize any resistance in series with the shunt resistor.

NOTE: To help eliminate ground offset errors between the device and the analog-to-digital converter (ADC), connect the REF pin to the ADC reference input and then to ground. For best performance, use an RC filter between the output of the INAx181 and the ADC. See Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using ZOUT application note for more details.

Figure 8-1. Basic Connections for the INA181

A power-supply bypass capacitor of at least 0.1 μF is required for proper operation. Applications with noisy or high-impedance power supplies can require additional decoupling capacitors to reject power-supply noise. Connect bypass capacitors close to the device pins.

8.1.2 RSENSE and Device Gain Selection

The accuracy of the INAx181 is maximized by choosing the current-sense resistor to be as large as possible. A large sense resistor maximizes the differential input signal for a given amount of current flow and reduces the error contribution of the offset voltage. However, there are practical limits as to how large the current-sense resistor can be in a given application. The INAx181 have typical input bias currents of 75 μA for each input when operated at a 12-V common-mode voltage input. When large current-sense resistors are used, these bias currents cause increased offset error and reduced common-mode rejection. Therefore, using current-sense resistors larger than a few ohms is generally not recommended for applications that require current-monitoring accuracy. Another common restriction on the value of the current-sense resistor is the maximum allowable power dissipation that is budgeted for the resistor. Equation 2 gives the maximum value for the current sense resistor for a given power dissipation budget:RSENSE < frac{PDMAX}{IMAX2} tag{2}$

where:

  • PDMAX is the maximum allowable power dissipation in RSENSE.
  • IMAX is the maximum current that flows through RSENSE.

An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply voltage, $V_S$ , and device swing to rail limitations. To make sure that the current-sense signal is properly passed to the output, both positive and negative output swing limitations must be examined. Equation 3 provides the maximum values of $R_{SENSE}$ and GAIN to keep the device from hitting the positive swing limitation.

$IMAX × RSENSE × GAIN < VSP - VREF$ (3)

where:

  • IMAX is the maximum current that flows through RSENSE.
  • GAIN is the gain of the current sense-amplifier.
  • VSP is the positive output swing specified in the data sheet.
  • VREF is the externally applied voltage on the REF pin.

To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off between the value of the sense resistor and the gain of the device to consider. If the sense resistor selected for the maximum power dissipation is too large, then selecting a lower-gain device to avoid positive swing limitations is possible.

The negative swing limitation places a limit on how small of a sense resistor can be used in a given application. Equation 4 provides the limit on the minimum size of the sense resistor.

$IMIN × RSENSE × GAIN > VSN - VREF(4)

where:

  • IMIN is the minimum current that flows through RSENSE.
  • · GAIN is the gain of the current sense amplifier.
  • VSN is the negative output swing of the device (see Rail-to-Rail Output Swing).
  • VREF is the externally applied voltage on the REF pin.

In addition to adjusting the offset and gain, the voltage applied to the REF pin can be slightly increased to avoid negative swing limitations.

8.1.3 Signal Filtering

Provided that the INAx181 output is connected to a high-impedance input, the best location to filter is at the device output using a simple RC network from OUT to GND. Filtering at the output attenuates high-frequency disturbances in the common-mode voltage, differential input signal, and INAx181 power-supply voltage. If filtering at the output is not possible, or filtering of only the differential input signal is required, required, then apply a filter at the input pins of the device. Figure 8-2 provides an example of how a filter can be used on the input pins of the device.

Figure 8-2. Filter at Input Pins

The addition of external series resistance creates an additional error in the measurement; therefore, the value of these series resistors must be kept to 10\Omega$ (or less, if possible) to reduce impact to accuracy. The internal bias network shown in Figure 8-2 present at the input pins creates a mismatch in input bias currents when a differential voltage is applied between the input pins. If additional external series filter resistors are added to the circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This mismatch creates a differential error voltage that subtracts from the voltage developed across the shunt resistor. This error results in a voltage at the device input pins that is different than the voltage developed across the shunt resistor. Without the additional series resistance, the mismatch in input bias currents has little effect on device operation. The amount of error these external filter resistors add to the measurement can be calculated using Equation 6, where the gain error factor is calculated using Equation 5.

The amount of variance in the differential voltage present at the device input relative to the voltage developed at the shunt resistor is based both on the external series resistance ( $R_F$ ) value as well as internal input resistor $R_{INT}$ , as shown in Figure 8-2. The reduction of the shunt voltage reaching the device input pins appears as a gain error when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be calculated to determine the amount of gain error that is introduced by the addition of external series resistance. Calculate the expected deviation from the shunt voltage to what is measured at the device input pins is given using Equation 5:

Gain Error Factor = $frac{1250 × RINT}{(1250 × RF) + (1250 × RINT) + (RF × RINT)}(5)

where:

  • RINT is the internal input resistor.
  • RF is the external series resistance.

With the adjustment factor from Equation 5, including the device internal input resistance, this factor varies with each gain version, as shown in Table 8-1. Each individual device gain error factor is shown in Table 8-2.

Table 8-1. Input Resistance

PRODUCTGAINRINT (kΩ)
INAx181A12025
INAx181A25010
INAx181A31005
INAx181A42002.5

Table 8-2. Device Gain Error Factor

PRODUCTSIMPLIFIED GAIN ERROR FACTOR
INAx181A1$\frac{25000}{(21 \times R_F) + 25000}$
INAx181A2$\frac{10000}{(9 \times R_F) + 10000}$
INAx181A3$\frac{1000}{R_F + 1000}$
INAx181A4$\frac{2500}{(3 \times R_F) + 2500}$

Gain Error (%) =100 - (100 × Gain Error Factor)(6)

For example, using an INA181A2 and the corresponding gain error equation from Table 8-2, a series resistance of 10 Ω results in a gain error factor of 0.991. The corresponding gain error is then calculated using Equation 6, resulting in an additional gain error of approximately 0.89% solely because of the external 10-Ω series resistors.

26 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

8.1.4 Summing Multiple Currents

The outputs of the INA2181 are easily summed by connecting the output of one channel to the reference input of a second channel. The circuit configuration shown in Figure 8-3 is an easy method to achieve current summing. To correctly sum multiple output currents, the values for the current sense resistor RSENSE must be the same for all channels.

Figure 8-3. Summing Multiple Currents

Connect the output of one channel of the INA2181 to the reference input of the other channel. Use the reference input of the first circuit to set the reference of the final summed output operating point. The currents sensed at each circuit in the chain are summed at the output of the last device in the chain.

An example output response of a summing configuration is shown in Figure 8-4. The reference pin of the first circuit is connected to ground, and sine waves at different frequencies are applied to the two circuits to produce a summed output as shown. The sine wave voltage input for the first circuit is offset so that the whole wave is above GND.

Figure 8-4. Current Summing Application Output Response (A2 Devices)

8.1.5 Detecting Leakage Currents

Occasionally, the need arises to confirm that the current going into a load is identical to the current coming out of a load; typically, as part of diagnostic testing or fault detection. This situation requires precision current differencing, which is the same as summing, except that the two amplifiers have the inputs connected opposite of each other. To correctly detect leakage currents, the values for the current sense resistor RSENSE must be the same for all channels. Provide an external reference voltage to the REF1 input to allow bidirectional leakage current detection.

If the current into a load is equal to the current out of the load, then the voltage at OUT2 is the same as the applied voltage to REF1. To enable accurate differences between the two currents, a reference voltage must be applied. The reference voltage prevents the output of the device from being driven to ground, and also enables detection if the current into the load is either greater than or less than the current coming out of the load.

For current differencing, the dual-channel INA2181 must have the inputs connected opposite to each other, as shown in Figure 8-5. The reference input of the first channel sets the output quiescent level for all the devices in the string. Connect the output of the first channel to the reference input of the second channel. The reference input of the first channel sets the reference at the output. This circuit example is identical to the current summing example, except that the two shunt inputs are reversed in polarity. Under normal operating conditions, the final output is very close to the reference value and proportional to any current difference. This current differencing circuit is useful in detecting when current into and out of a load do not match.

Figure 8-5. Detecting Leakage Currents

An example output response of a difference configuration is shown in Figure 8-6. The reference pin of the first channel is connected to a reference voltage of 2.048 V. The inputs to each circuit is a 100-Hz sine wave, 180° out-of-phase with each other, resulting in a zero output as shown. The sine wave input to the first circuit is offset so that the input wave is completely above GND.

Figure 8-6. Current Differencing Application Output Response (A2 Devices)

8.2 Typical Application

One application for the INAx181 is to monitor bidirectional currents. Bidirectional currents are present in systems that have to monitor currents in both directions; common examples are monitoring the charging and discharging of batteries and bidirectional current monitoring in motor control. The device configuration for bidirectional current monitoring is shown in Figure 8-7. Applying stable REF pin voltage closer to the middle of device supply voltage allows both positive- and negative-current monitoring, as shown in this configuration. Configure the INAx181 to monitor unidirectional currents by grounding the REF pin.

Figure 8-7. Measuring Bidirectional Current

8.2.1 Design Requirements

The design requirements for the circuit shown in Figure 8-7, are listed in Table 8-3.

DESIGN PARAMETEREXAMPLE VALUE
Power-supply voltage, VS5 V
Bus supply rail, VCM12 V
RSENSE power loss< 450 mW
Maximum sense current, IMAX±20 A
Current sensing errorLess than 3.5% at maximum current, TJ = 25°C
Small-signal bandwidth> 100 kHz

Table 8-3. Design Parameters

8.2.2 Detailed Design Procedure

The maximum value of the current sense resistor is calculated based on the maximum power loss requirement. By applying Equation 2, the maximum value of the current-sense resistor is calculated to be 1.125 mΩ. This is the maximum value for sense resistor RSENSE; therefore, select RSENSE to be 1 mΩ because this value is the closest standard resistor value that meets the power-loss requirement.

The next step is to select the appropriate gain and reduce RSENSE, if needed, to keep the output signal swing within the VS range. The design requirements call for bidirectional current monitoring; therefore, a voltage between 0 and VS must be applied to the REF pin. The bidirectional currents monitored are symmetric around 0 (that is, ±20 A); therefore, the ideal voltage to apply to VREF is VS / 2 or 2.5 V. If the positive current is greater than the negative current, using a lower voltage on VREF has the benefit of maximizing the output swing for the given range of expected currents. Using Equation 3, and given that IMAX = 20 A , RSENSE = 1 mΩ, and VREF = 2.5 V, the maximum current-sense gain calculated to avoid the positive swing-to-rail limitations on the output is 122.5. Likewise, using Equation 4 for the negative-swing limitation results in a maximum gain of 124.75.

30 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

Selecting the gain-of-100 device maximizes the output range while staying within the output swing range. If the maximum calculated gains are slightly less than 100, the value of the current-sense resistor can be reduced to keep the output from hitting the output-swing limitations.

To calculate the accuracy at peak current, the two factors that must be determined are the gain error and the offset error. The gain error of the INAx181 is specified to be a maximum of 1%. The error due to the offset is constant, and is specified to be 500\mu$ V (maximum) for the conditions where $V_{CM}$ = 12 V and $V_{S}$ = 5 V. Using Equation 7, the percentage error contribution of the offset voltage is calculated to be 2.5%, with total offset error = 500 $\mu$ V, $R_{SENSE}$ = 1 $m\Omega$ , and $I_{SENSE}$ = 20 A.

Total Offset Error (%) = $frac{Total Offset Error (V)}{ISENSE × RSENSE} × 100%$ (7)

One method of calculating the total error is to add the gain error to the percentage contribution of the offset error. However, in this case, the gain error and the offset error do not have an influence or correlation to each other. A more statistically-accurate method of calculating the total error is to use the RSS sum of the errors, as shown in Equation 8:

Total Error (%) = $√{Total Gain Error (%)2 + Total Offset Error (%)2}(8)

After applying Equation 8, the total current sense error at maximum current is calculated to be 2.7%, and that is less than the design example requirement of 3.5%.

The INA181A3 (gain = 100) also has a bandwidth of 150 kHz that meets the small-signal bandwidth requirement of 100 kHz. If higher bandwidth is required, lower-gain devices can be used at the expense of either reduced output voltage range or an increased value of RSENSE.

8.2.3 Application Curve

An example output response of a bidirectional configuration is shown in Figure 8-8. With the REF pin connected to a reference voltage (2.5 V in this case), the output voltage is biased upwards by this reference level. The output rises above the reference voltage for positive differential input signals, and falls below the reference voltage for negative differential input signals.

Figure 8-8. Bidirectional Application Output Response

8.3 Power Supply Recommendations

The input circuitry of the INAx181 accurately measures beyond the power-supply voltage,V_S$ . For example, $V_S$ can be 5 V, whereas the bus supply voltage at IN+ and IN- can be as high as 26 V. However, the output voltage range of the OUT pin is limited by the voltages on the VS pin. The INAx181 also withstand the full differential

input signal range up to 26 V at the IN+ and IN- input pins, regardless of whether or not the device has power applied at the VS pin.

8.3.1 Common-Mode Transients Greater Than 26 V

With a small amount of additional circuitry, the INAx181 can be used in circuits that are subjected to transients higher than 26 V, such as automotive applications. Use only Zener diodes or Zener-type transient absorbers (sometimes referred to as transorbs)—any other type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as a working impedance for the Zener diode. See Figure 8-9. Keep these resistors as small as possible; most often, around 10 $\Omega$ . Larger values can be used with an effect on gain that is discussed in the Signal Filtering section. This circuit limits only short-term transients; therefore, many applications are satisfied with a $10-\Omega$ resistor along with conventional Zener diodes of the lowest acceptable power rating. This combination uses the least amount of board space. These diodes can be found in packages as small as SOT-523 or SOD-523.

Figure 8-9. Transient Protection Using Dual Zener Diodes

In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back diodes between the device inputs, as shown in Figure 8-10. The most space-efficient solutions are dual, series-connected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in Figure 8-9 and Figure 8-10, the total board area required by the INAx181 with all protective components is less than that of an SO-8 package, and only slightly greater than that of an MSOP-8 package.

Figure 8-10. Transient Protection Using a Single Transorb and Input Clamps

For more information, see the Current Shunt Monitor With Transient Robustness reference design.

Copyright © 2023 Texas Instruments Incorporated

8.4 Layout

8.4.1 Layout Guidelines

  • Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing of the current-sensing resistor commonly results in additional resistance present between the input pins. Given the very-low ohmic value of the current resistor, any additional high-current carrying impedance can cause significant measurement errors.
  • Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins. The recommended value of this bypass capacitor is 0.1 μF. Additional decoupling capacitance can be added to compensate for noisy or high-impedance power supplies.
  • When routing the connections from the current sense resistor to the device, keep the trace lengths as close as possible to minimize any impedance mismatch..

8.4.2 Layout Example

Figure 8-11. Single-Channel Recommended Layout (SC70)

Figure 8-12. Single-Channel Recommended Layout (SOT-23)

Figure 8-13. Dual-Channel Recommended Layout (VSSOP)

Figure 8-14. Dual-Channel Recommended Layout (WSON)

Figure 8-15. Quad-Channel Recommended Layout

9 Device and Documentation Support

9.1 Device Support

9.1.1 Development Support

• Texas Instruments, Current Shunt Monitor With Transient Robustness reference design

9.2 Documentation Support

9.2.1 Related Documentation

For related documentation see the following:

9.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

9.4 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

9.5 Trademarks

TI E2E™ is a trademark of Texas Instruments.

All trademarks are the property of their respective owners.

9.6 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.7 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

10 Revision History

Changes from Revision G (May 2020) to Revision H (November 2023)Page
Updated the numbering format for tables, figures, and cross-references throughout the document1
Added INA181 6-pin SC70 package to the data sheet
4
Changes from Revision F (March 2019) to Revision G (May 2020)Page
Added INA2181 10-pin WSON package to the data sheet1
Changes from Revision E (July 2018) to Revision F (March 2019)Page
Added new paragraph regarding phase reversal to end of Input Differential Overload section21
Changed Figure 57 to fix pin number typos33
Changed Figure 58 to fix pin number typos33
Changes from Revision D (March 2018) to Revision E (July 2018)Page
Changed instances of INAx180 to INAx181 (typos)1
Changes from Revision C (December 2017) to Revision D (March 2018)Page
Changed INA4181 device from preview to production data (active)1
Added new Figure 25 for INA41819
Added new Figure 28 for INA41819
Added "other" to first sentence after Figure 49 to clarify channel connection in Summing Multiple Currents
section27
Changes from Revision B (November 2017) to Revision C (December 2017)Page
Changed INA2181 device from preview to production data (active)1
Added "Both Inputs" to Figure 21 title9
Added new Figure 24 for INA21819
Added new Figure 25 placeholder for INA41819
Added new Figure 27 for INA21819
Added new Figure 28 placeholder for INA41819
Changed Figure 29 and added "(A3 Devices)" to end of title9
Added new Figure 38 for INA21819
Changed "less than 150 μV" to "within ±150 μV" regarding offset voltage in Precise Low-Side Current
Sensing section19
Added text regarding RC filter and reference to application report to note at the bottom of Figure 4523
Deleted VS
from Equation 324
Added equation and curve for f-3dB to Figure 4825
Added new content to Summing Multiple Currents section and moved to Application Information section27
Added new content to Detecting Leakage Currents section and moved to Application Information section28
Added new bullet to Layout Guidelines section33
Changes from Revision A (August 2017) to Revision B (November 2017)Page
Added INA4181 preview device and associated content to data sheet1
Changed design parameter name in Table 3 from "Accuracy" to "Current sensing error" for clarity30
Changed "RMS" to "RSS" in reference to equation 730
Changes from Revision * (April 2017) to Revision A (August 2017)Page
Added INA2181 preview device and associated content to data sheet1

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 39

www.ti.com 5-Mar-2026

PACKAGING INFORMATION

Orderable part numberStatus
(1)
Material type
(2)
Package PinsPackage qty CarrierRoHS
(3)
Lead finish/
Ball material
(4)
MSL rating/
Peak reflow
(5)
Op temp (°C)Part marking
(6)
INA181A1IDBVRActiveProductionSOT-23 (DBV) 63000 LARGE T&RYesSNLevel-1-260C-UNLIM-40 to 12518JD
INA181A1IDBVR.BActiveProductionSOT-23 (DBV) 63000 LARGE T&RYesSNLevel-1-260C-UNLIM-40 to 12518JD
INA181A1IDBVTActiveProductionSOT-23 (DBV) 6250 SMALL T&RYesNIPDAU SNLevel-1-260C-UNLIM-40 to 12518JD
INA181A1IDBVT.BActiveProductionSOT-23 (DBV) 6250 SMALL T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12518JD
INA181A1IDCKRActiveProductionSC70 (DCK) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251P8
INA181A1IDCKR.BActiveProductionSC70 (DCK) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251P8
INA181A2IDBVRActiveProductionSOT-23 (DBV) 63000 LARGE T&RYesSNLevel-1-260C-UNLIM-40 to 1251AED
INA181A2IDBVR.BActiveProductionSOT-23 (DBV) 63000 LARGE T&RYesSNLevel-1-260C-UNLIM-40 to 1251AED
INA181A2IDBVTActiveProductionSOT-23 (DBV) 6250 SMALL T&RYesNIPDAU SNLevel-1-260C-UNLIM-40 to 1251AED
INA181A2IDBVT.BActiveProductionSOT-23 (DBV) 6250 SMALL T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251AED
INA181A2IDCKRActiveProductionSC70 (DCK) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251PE
INA181A2IDCKR.BActiveProductionSC70 (DCK) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251PE
INA181A3IDBVRActiveProductionSOT-23 (DBV) 63000 LARGE T&RYesSNLevel-1-260C-UNLIM-40 to 1251AFD
INA181A3IDBVR.BActiveProductionSOT-23 (DBV) 63000 LARGE T&RYesSNLevel-1-260C-UNLIM-40 to 1251AFD
INA181A3IDBVTActiveProductionSOT-23 (DBV) 6250 SMALL T&RYesSNLevel-1-260C-UNLIM-40 to 1251AFD
INA181A3IDBVT.BActiveProductionSOT-23 (DBV) 6250 SMALL T&RYesSNLevel-1-260C-UNLIM-40 to 1251AFD
INA181A3IDCKRActiveProductionSC70 (DCK) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251PF
INA181A3IDCKR.BActiveProductionSC70 (DCK) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251PF
INA181A4IDBVRActiveProductionSOT-23 (DBV) 63000 LARGE T&RYesNIPDAU SNLevel-1-260C-UNLIM-40 to 1251AGD
INA181A4IDBVR.BActiveProductionSOT-23 (DBV) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251AGD
INA181A4IDBVTObsoleteProductionSOT-23 (DBV) 6--Call TICall TI-40 to 1251AGD
INA181A4IDCKRActiveProductionSC70 (DCK) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251PG
INA181A4IDCKR.BActiveProductionSC70 (DCK) 63000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 1251PG
INA2181A1IDGSRActiveProductionVSSOP (DGS) 102500 LARGE T&RYesNIPDAUAG SNLevel-2-260C-1 YEAR-40 to 1251CW6
INA2181A1IDGSR.BActiveProductionVSSOP (DGS) 102500 LARGE T&RYesSNLevel-2-260C-1 YEAR-40 to 1251CW6
INA2181A1IDGSTObsoleteProductionVSSOP (DGS) 10--Call TICall TI-40 to 1251CW6
INA2181A1IDSQRActiveProductionWSON (DSQ) 103000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12525IY
INA2181A1IDSQR.BActiveProductionWSON (DSQ) 103000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12525IY
INA2181A1IDSQTObsoleteProductionWSON (DSQ) 10--Call TICall TI-40 to 12525IY

www.ti.com 5-Mar-2026

Orderable part numberStatus
(1)
Material type
(2)
Package PinsPackage qty CarrierRoHS
(3)
Lead finish/
Ball material
(4)
MSL rating/
Peak reflow
(5)
Op temp (°C)Part marking
(6)
INA2181A2IDGSRActiveProductionVSSOP (DGS) 102500 LARGE T&RYesNIPDAUAG SNLevel-2-260C-1 YEAR-40 to 1251DR6
INA2181A2IDGSR.BActiveProductionVSSOP (DGS) 102500 LARGE T&RYesSNLevel-2-260C-1 YEAR-40 to 1251DR6
INA2181A2IDGSTObsoleteProductionVSSOP (DGS) 10--Call TICall TI-40 to 1251DR6
INA2181A2IDSQRActiveProductionWSON (DSQ) 103000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12525JY
INA2181A2IDSQR.BActiveProductionWSON (DSQ) 103000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12525JY
INA2181A2IDSQTObsoleteProductionWSON (DSQ) 10--Call TICall TI-40 to 12525JY
INA2181A3IDGSRActiveProductionVSSOP (DGS) 102500 LARGE T&RYesNIPDAUAG SNLevel-2-260C-1 YEAR-40 to 1251DS6
INA2181A3IDGSR.BActiveProductionVSSOP (DGS) 102500 LARGE T&RYesSNLevel-2-260C-1 YEAR-40 to 1251DS6
INA2181A3IDGSTObsoleteProductionVSSOP (DGS) 10--Call TICall TI-40 to 1251DS6
INA2181A3IDSQRActiveProductionWSON (DSQ) 103000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12525KY
INA2181A3IDSQR.BActiveProductionWSON (DSQ) 103000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12525KY
INA2181A3IDSQTObsoleteProductionWSON (DSQ) 10--Call TICall TI-40 to 12525KY
INA2181A4IDGSRActiveProductionVSSOP (DGS) 102500 LARGE T&RYesNIPDAUAG SNLevel-2-260C-1 YEAR-40 to 1251DT6
INA2181A4IDGSR.BActiveProductionVSSOP (DGS) 102500 LARGE T&RYesSNLevel-2-260C-1 YEAR-40 to 1251DT6
INA2181A4IDGSTObsoleteProductionVSSOP (DGS) 10--Call TICall TI-40 to 1251DT6
INA2181A4IDSQRActiveProductionWSON (DSQ) 103000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12525LY
INA2181A4IDSQR.BActiveProductionWSON (DSQ) 103000 LARGE T&RYesNIPDAULevel-1-260C-UNLIM-40 to 12525LY
INA2181A4IDSQTObsoleteProductionWSON (DSQ) 10--Call TICall TI-40 to 12525LY
INA4181A1IPWRActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A1
INA4181A1IPWR.BActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A1
INA4181A2IPWRActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A2
INA4181A2IPWR.BActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A2
INA4181A2IPWRG4ActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A2
INA4181A2IPWRG4.BActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A2
INA4181A3IPWRActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A3
INA4181A3IPWR.BActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A3
INA4181A4IPWRActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A4
INA4181A4IPWR.BActiveProductionTSSOP (PW) 202000 LARGE T&RYesNIPDAULevel-2-260C-1 YEAR-40 to 1254181A4

(1) Status: For more details on status, see our product life cycle.

Pin Configuration

Figure 5-1. INA181: DBV Package 6-Pin SOT-23 Top View

Figure 5-2. INA181: DCK Package 6-Pin SC70 Top View

Table 5-1. Pin Functions: INA181 (Single Channel)

NAMEPINTYPEDESCRIPTION
SOT-23SC70
GND22AnalogGround
IN–45Analog inputCurrent-sense amplifier negative input. For high-side applications, connect
to load side of sense resistor. For low-side applications, connect to ground
side of sense resistor.
IN+34Analog inputCurrent-sense amplifier positive input. For high-side applications, connect
to bus-voltage side of sense resistor. For low-side applications, connect to
load
INA2181INA4181
GND416AnalogGround
IN–123Analog inputCurrent-sense amplifier negative input for Channel 1. For high-side applications, connect to load side of Channel 1 sense resistor. For low-side applications, connect to ground side of Channel 1 sense resistor.
IN+134Analog inputCurrent-sense amplifier positive input for Channel 1. For high-side applications, connect to bus-voltage side of Channel 1
4 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

Figure 5-3. INA2181: DGS Package 10-Pin VSSOP Top View

A. Thermal Pad can be left floating or connected to GND.

Figure 5-4. INA2181: DSQ Package 10-Pin WSON Top View

Figure 5-5. INA4181: PW Package 20-Pin TSSOP Top View

Table 5-2. Pin Functions: INA2181 (Dual Channel) and INA4181 (Quad Channel)

NAMEPINTYPEDESCRIPTION
SOT-23SC70
GND22Analog
IN-45Analog input
IN+34Analog input
OUT16Analog output
REF51Analog input
VS63Analog

Copyright © 2023 Texas Instruments Incorporated

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Table 5-2. Pin Functions: INA2181 (Dual Channel) and INA4181 (Quad Channel) (continued)

PIN
NAMEINA2181
IN+3
IN–4
IN+4
NC
OUT11
OUT29
OUT3
OUT4
REF15
REF26
REF3
REF4
VS10

Electrical Characteristics

at TA = 25°C, VS = 5 V, VREF = VS / 2, VIN+ = 12 V, and VSENSE = VIN+ – VIN– (unless otherwise noted)

PARAMETERCONDITIONSMINTYPMAXUNIT
INPUT
CMRRCommon-mode rejection ratio, RTI (1)VIN+ = 0 V to 26 V, VSENSE = 0 mV,
TA = –40°C to +125°C
84100dB
VSENSE = 0 mV, VIN+ = 0 V±25±150μV
VOSOffset voltage, RTIVSENSE = 0 mV±100±500μV
dVOS/dTOffset drift, RTIVSENSE = 0 mV, TA = –40°C to +125°C0.21μV/°C
PSRRRTI vs power supply ratioVS = 2.7 V to 5.5 V, VIN+ = 12 V,
VSENSE = 0 mV
±8±40μV/V
Input bias currentVSENSE = 0 mV, VIN+ = 0 V-6μA
IIBVSENSE = 0 mV75μA
IIOInput offset currentVSENSE = 0 mV±0.05μA
OUTPUTA1 devices
A2 devices
20
50
V/V
V/V
GGainA3 devices
A4 devices
100
200
V/V
V/V
EGGain errorVOUT = 0.5 V to VS – 0.5 V,
TA = –40°C to +125°C
±0.1%±1%
Gain error vs temperature
Nonlinearity error
TA = –40°C to +125°C
VOUT = 0.5 V to VS – 0.5 V
1.5
±0.01%
20ppm/°C
Maximum capacitive load
VOLTAGE OUTPUT (2)
No sustained oscillation1nF
VSPSwing to VS power-supply rail (3)RL = 10 kΩ to GND, TA = –40°C to
+125°C
(VS) – 0.02(VS) – 0.03V
VSNSwing to GND (3)
FREQUENCY RESPONSE
RL = 10 kΩ to GND, TA = –40°C to
+125°C
A1 devices, CLOAD = 10 pF
A2 devices, CLOAD = 10 pF
(VGND) +
0.0005
350
210
(VGND) +
0.005
V
kHz
kHz
BWBandwidthA3 devices, CLOAD = 10 pF
A4 devices, CLOAD = 10 pF
150
105
kHz
kHz
SRSlew rate2V/μs
NOISE, RTI (1)Voltage noise density
POWER SUPPLY
VSENSE = 0 mV40
195
260nV/√Hz
INA181VSENSE = 0 mV, TA = –40°C to +125°C
VSENSE = 0 mV
356300
500
μA
IQQuiescent currentINA2181VSENSE = 0 mV, TA = –40°C to +125°C
VSENSE = 0 mV
690520
900
μA
INA4181VSENSE = 0 mV, TA = –40°C to +125°C1000μA

(1) RTI = referred-to-input.

(2) See Output Voltage Swing vs Output Current

(3) Swing specifications are tested with an overdriven input condition.

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MINMAXUNIT
Supply voltage, VS6V
Analog inputs, IN+, IN– (2)Differential (VIN+) – (VIN–)–2626V
Common-mode (3)GND – 0.326V
Input voltage rangeat REF pinGND – 0.3VS + 0.3V
Output VoltageGND – 0.3VS + 0.3V
Maximum output current, IOUT8mA
Operating free-air temperature, TA–55150°C
Junction temperature, TJ150°C
Storage temperature, Tstg–65150°C
  • (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
  • (2) VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
  • (3) Input voltage at any pin can exceed the voltage shown if the current at that pin is limited to 5 mA.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MINNOMMAXUNIT
VCMCommon-mode input voltage (IN+ and IN–)–0.21226V
VSOperating supply voltage2.755.5V
TAOperating free-air temperature–40125°C

Thermal Information

INA181INA2181INA4181
THERMAL METRIC (1)DCK (SC70)DBV (SOT-23)DSQ (WSON)DGS (VSSOP)PW (TSSOP)UNIT
6 PINS6 PINS10 PINS10 PINS14 PINS
RθJAJunction-to-ambient thermal resistance188.0198.774.51

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Typical Application

The INAx181 amplify the voltage developed across a current-sensing resistor as current flows through the resistor to the load or ground. The ability to drive the reference pin to adjust the functionality of the output signal offers multiple configurations, as discussed in previous sections.

Package Information

PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
INA181DBV (SOT-23, 6)2.90 mm × 2.80 mm
DCK (SC70, 6)2.00 mm × 2.10 mm
INA2181DGS (VSSOP, 10)3.00 mm × 4.90 mm
DSQ (WSON, 10)2.00 mm × 2.00 mm
INA4181PW (TSSOP, 20)6.50 mm × 6.40 mm
  • (1) For all available packages, see Section 11.
  • (2) The package size (length × width) is a nominal value and includes pins, where applicable.

Related Variants

The following components are covered by the same datasheet.

Part NumberManufacturerPackage
INA181Texas InstrumentsDBV (SOT-23, 6)
INA181-Q1Texas Instruments
INA181A1Texas Instruments
INA181A2Texas Instruments
INA181A3Texas Instruments
INA181A4Texas Instruments
INA2181A1Texas Instruments
INA2181A2Texas Instruments
INA2181A4Texas Instruments
INA4181A1Texas Instruments
INA4181A2Texas Instruments
INA4181A3Texas Instruments
INA4181A4Texas Instruments
INAX181Texas Instruments
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