ILI9488
a-Si TFT LCD Single Chip DriverThe ILI9488 is a a-si tft lcd single chip driver from ILI TECHNOLOGY CORP.. View the full ILI9488 datasheet below including key specifications, pinout, electrical characteristics, absolute maximum ratings.
Manufacturer
ILI TECHNOLOGY CORP.
Category
a-Si TFT LCD Single Chip Driver
Package
Bare Die (Pad/Bump Arrangement)
Key Specifications
| Parameter | Value |
|---|---|
| Resolution | 320(RGB) x 480 |
| Color Depth | 16.7M-color (supports 3-bit, 16-bit, 18-bit, 24-bit pixel formats) |
| Internal Memory | GRAM |
| Communication Interfaces | DBI Type B Parallel, DBI Type C Serial (SPI), DPI Parallel (RGB), MIPI-DSI |
Overview
Part: ILI9488 — ILI TECHNOLOGY CORP.
Type: a-Si TFT LCD Single Chip Driver
Description: 320(RGB) x 480 resolution, 16.7M-color TFT LCD single chip driver with internal GRAM.
Features
- /rhombus4 Display resolution: 320 (RGB) (H) x 480 (V)
- /rhombus4 Display color modes:
- /head2right Full color modes:
16.7M colors with dithering function (24-bit data, R: 8-bit, G: 8-bit, B: 8-bit)
262K colors (18-bit data, R: 6-bit, G: 6-bit, B: 6-bit)
- /head2right Reduced color modes:
- /rhombus4 Display module:
- /head2right On-chip Frame Memory size 345,600 bytes, 320 (RGB) (H) x 480 (V) x 18 bits
- /head2right Supports 960 source channel outputs
- /head2right Supports up to a maximum of 480 gate lines
- /head2right Supports 24-bits input image function
- /head2right Supports column/1-/2-dot inversion
- /head2right On-module DC VCOM control (-2 to 0V common electrode output voltage range)
- /head2right Source/VCOM/Gate power supply voltage
- DDVDH - GND = 4.5 to 6V
- DDVDL - GND = -6 to -4.5V
- VCL - GND = -3 to -2V
- DC VCOM - GND = -2 to 0V, a step = 16mV
- VREG1OUT - GND = 3.625 to 5.5 V
- VREG2OUT - GND = -5.5 to -3.625V
- VGH - GND = 10 to 20V
- VGL - GND = -15 to -5V
- /rhombus4 Display Interface types:
- /head2right MIPI-DBI (Display Bus Interface)
- Type B (i-80 system), 8-/9-/16-/18-/24-bit bus
- Type C (Serial data transfer interface, 3/4-line SPI)
- /head2right MIPI-DPI (Display Pixel Interface)
- Supports 24 bit/pixel (R: 8-bit, G: 8-bit, B: 8-bit)
- Supports 18 bit/pixel (R: 6-bit, G: 6-bit, B: 6-bit)
- Supports 16 bit/pixel (R: 5-bit, G: 6-bit, B: 5-bit)
- /head2right MIPI-DSI (Display Serial Interface)
- Supports one data lane/maximum speed 500Mbps
- Supports DSI version 1.01
- Supports D-PHY version 1.00
- /rhombus4 Input power
- /head2right Low operating power supplies
- IOVCC = 1.65 to 3.3V (Interface I/O)
- VCI = 2.5 to 3.3V (Analog)
- OTP programming voltage (DDVDH) = 7V
- /rhombus4 Power saving modes:
- /head2right Deep-standby mode
- /head2right Sleep mode
65K colors (16-bit data, R: 5-bit, G: 6-bit, B: 5-bit) 8 colors (3-bit data, R: 1-bit, G: 1-bit, B: 1-bit)
-
/rhombus4 Other on-chip functions/Miscellaneous
-
/head2right Supports partial display mode
-
/head2right Supports inversion mode
-
/head2right Oscillator for display clock generation
-
/head2right LVD function (GAS bit) prevents image sticking for abnormal power off
-
/head2right Supports DC VCOM driving
-
/head2right DC VCOM voltage generator and adjustment
-
/head2right OTP memory store initialization register settings (MATCDL, VRH1, VRH2 and BT)
-
/head2right MTP (provides 4 times OTP to store DC VCOM setting, ID1/ID2/ID3 setting)
-
/head2right Supports CABC function
-
/head2right Supports 3-Gamma DGC function
-
/head2right Supports dither function. ( The dither function is only available in Bypass mode of DPI 24-bit and MIPI-DSI. )
-
/head2right Supports color enhancement function
-
/rhombus4 Operate temperature range: -40 to 85
-
/rhombus6 CABC: Content Adaptive Brightness Control
-
/rhombus6 DGC: Digital Gamma Correction
-
/rhombus6 LVD: Low Voltage Detection
-
/rhombus6 MTP: Multiple Time Programming
°C
- /rhombus6 OTP: One Time Programming
°C
Pin Configuration
ILI9488 Pinout – Bare Die (Pad/Bump Arrangement)
Note: The attached image shows only the ILI9488 part number label, not a detailed pin diagram with numbered pads. The datasheet section provided lists pin names and functions but does not include a pad numbering scheme or coordinate map for the bare die. Without a detailed pad diagram showing pad numbers or coordinates, individual pad positions cannot be reliably extracted.
Pin Descriptions by Functional Group
Bus Interface Pins
| Pin Name | I/O | Type | Description |
|---|---|---|---|
| IM2, IM1, IM0 | I | Digital Input | Interface mode selection (MIPI-DBI Type B 24/18/16/9/8-bit, MIPI-DBI Type C 3-line/4-line SPI, MIPI DSI) |
| RESX | I | Digital Input | Reset input signal; initialize chip with low input after power-on |
| CSX | I | Digital Input | DBI Type B chip select (Low: selected; High: not selected); fix to IOVCC or DGND when not in use |
| D/CX | I | Digital Input | DBI Type B data/command selection (Low: command; High: parameter); fix to IOVCC or DGND when not in use |
| WRX/SCL | I | Digital Input | DBI Type B write signal or DBI Type C serial clock; fix to IOVCC or DGND when not in use |
| RDX | I | Digital Input | DBI Type B read signal; fix to IOVCC or DGND when not in use |
| SDA | I/O | Digital I/O | DBI Type C serial data input/output (bidirectional); fix to IOVCC or DGND when not in use |
| SDO | O | Digital Output | DBI Type C serial data output; leave open when not in use |
LCD Control Signals
| Pin Name | I/O | Type | Description |
|---|---|---|---|
| TE | O | Digital Output | Tearing effect output signal; leave open when not in use |
| CABC_PWM | O | Digital Output | PWM frequency output for LED driver control; leave open when not in use |
| VSYNC | I | Digital Input | DPI frame synchronizing signal; fix to DGND when not in use |
| HSYNC | I | Digital Input | DPI line synchronizing signal; fix to DGND when not in use |
| ENABLE | I | Digital Input | DPI data enable input signal; fix to DGND when not in use |
| DOTCLK | I | Digital Input | DPI dot clock signal; fix to IOVCC when not in use |
Data Bus Pins
| Pin Name | I/O | Type | Description |
|---|---|---|---|
| DB[23:0] | I/O | Digital I/O | Data pins (usage depends on interface mode: 24-bit, 18-bit, 16-bit, 9-bit, or 8-bit) |
MIPI-DSI Pins
| Pin Name | I/O | Type | Description |
|---|---|---|---|
| MIPI_CLOCK_P | I | MIPI-DSI Input | DSI positive polarity low-voltage differential clock signal; leave open when not in use |
| MIPI_CLOCK_N | I | MIPI-DSI Input | DSI negative polarity low-voltage differential clock signal; leave open when not in use |
| MIPI_DATA_P | I/O | MIPI-DSI I/O | DSI positive polarity low-voltage differential data signal; leave open when not in use |
| MIPI_DATA_N | I/O | MIPI-DSI I/O | DSI negative polarity low-voltage differential data signal; leave open when not in use |
| MIPI_LDO | O | LDO Output | MIPI DSI core power pad; connect stabilizing capacitor to GND when using MIPI DSI, leave open otherwise |
LCD Driving Signals
| Pin Name | I/O | Type | Description |
|---|---|---|---|
| S960~S1 | O | Source Output | Source output voltage signals to liquid crystal; leave open when not in use |
| G480~G1 | O | Gate Output | Gate driver output pins (VGH for selected gate lines, VGL for non-selected); leave open when not in use |
| VCOM | O | LCD Output | Common voltage for DC VCOM driving (range: -2V to 0V) |
| VGS | I | Power GND | Reference level for grayscale generating circuit; fix to GND |
Charge-Pump and Regulator Circuit
| Pin Name | I/O | Type | Description |
|---|---|---|---|
| DDVDH | O | Charge Pump Output | Power supply for source and VCOM drivers (4.5–6V input); connect stabilizing capacitor to GND |
| DDVDL | O | Charge Pump Output | Power supply for source and VCOM drivers (-6 to -4.5V input); connect stabilizing capacitor to GND |
| VGH | O | Charge Pump Output | Power supply for gate driver; connect stabilizing capacitor to GND |
| VGL | O | Charge Pump Output | Power supply for gate driver; connect stabilizing capacitor to GND |
| VCL | O | Charge Pump Output | VCL = -VCI ~ -2V; connect stabilizing capacitor to GND |
| C52A, C52B | O | Analog Output | Capacitor connection pins for step-up circuit 1; connect capacitor between C52A and C52B |
| C51A, C51B | O | Analog Output | Capacitor connection pins for step-up circuit 1; connect capacitor between C51A and C51B |
| C41A, C41B | O | Analog Output | Capacitor connection pins for step-up circuit 1; connect capacitor between C41A and C41B |
| C11A, C11B | O | Analog Output | Capacitor connection pins for step-up circuit 1; connect capacitor between C11A and C11B |
| C12A, C12B | O | Analog Output | Capacitor connection pins for step-up circuit 1; connect capacitor between C12A and C12B |
| C21A, C21B | O | Analog Output | Capacitor connection pins for step-up circuit 2; connect capacitor between C21A and C21B |
Power Pads
| Pin Name | I/O | Type | Description |
|---|---|---|---|
| VCI | P | Power Supply | Analog circuit supply voltage (2.5–3.3V); connect stabilizing capacitor to GND |
| IOVCC | P | Power Supply | Digital circuit supply voltage (1.65–3.3V) |
| VDD (VCORE) | O | Power Supply | Internal logic voltage output; connect stabilizing capacitor to GND |
| DGND | P | Power GND | Ground for internal logic (0V); connect to GND on FPC to prevent noise |
| AGND | P | Power GND | Analog ground (0V); connect to GND on FPC to prevent noise |
Test Pads
| Pin Name | I/O | Type | Description |
|---|---|---|---|
| DUMMY | - | - | Dummy pad; leave open when not in use |
| TS[2:0] | I | - | Test pins with internal weak pull-low; leave open when not in use |
| TESTP | I | Power GND | Test pin; fix to GND level |
Notes
- Bare Die Package: Pin numbers/pad coordinates are not provided in the source material. The datasheet lists functional pin names but does not include a detailed pad map with numerical or coordinate designations.
- Interface Mode Selection: The IM2, IM1, IM0 pins determine the communication protocol (MIPI-DBI Type B parallel, MIPI-DBI Type C SPI, or MIPI DSI).
- Data Bus Width: DB[23:0] usage varies by interface mode (8-bit to 24-bit).
- Unused Pins: Most control and output pins should be fixed to IOVCC, DGND, or left open as specified to prevent noise and undefined behavior.
- Power Supply Decoupling: All power pins (VCI, IOVCC, VDD) require stabilizing capacitors to GND for stable operation.
Electrical Characteristics
| Item | Symbol | Condition | Min. | Typ. | Max. | Unit | Note |
|---|---|---|---|---|---|---|---|
| Power & Operation Voltage | Power & Operation Voltage | Power & Operation Voltage | Power & Operation Voltage | Power & Operation Voltage | Power & Operation Voltage | Power & Operation Voltage | Power & Operation Voltage |
| Analog operating voltage | VCI | - | 2.5 | 2.8 | 3.3 | V | |
| Logic operating voltage | IOVCC | - | 1.65 | 1.8 | 3.3 | V | Note 1, 2 |
| OTP Supply voltage | DDVDH | - | - | 7 | - | V | Note 1 |
| Logic High level input voltage | VIH | - | 0.7*IOVCC | IOVCC | V | Note 1 | |
| Logic Low level input voltage | VIL | - | -0.3 | 0.3*IOVCC | V | Note 1 | |
| Logic High level output voltage TE, SDO (SDA) , CABC_PWM_OUT | VOH | IOH = -1.0mA | 0.8*IOVCC | IOVCC | V | Note 1 | |
| Logic Low level output voltage TE, SDO (SDA) , CABC_PWM_OUT | VOL | IOL = +1.0mA | 0 | 0.2*IOVCC | V | Note 1 | |
| Gate Driver High Voltage | VGH | - | 10.0 | - | 20 | V | |
| Gate Driver Low Voltage | VGL | - | -15.0 | - | -6.0 | V | |
| Driver Supply Voltage | - | \ | VGH-VGL\ | 16 | - | 32 | |
| Input and Output | Input and Output | Input and Output | Input and Output | Input and Output | Input and Output | Input and Output | Input and Output |
| Logic High Level Input Voltage | VIH | - | 0.7*IOVCC | - | IOVCC | V | |
| Logic Low Level Input Voltage | VIL | - | DGND | - | 0.3*IOVCC | V | |
| VCOM Operation | VCOM Operation | VCOM Operation | VCOM Operation | VCOM Operation | VCOM Operation | VCOM Operation | VCOM Operation |
| DC VCOM Amplitude Voltage | VCOM | - | -2.0 | - | -0.06 | V | Note 3 |
| Source Driver | Source Driver | Source Driver | Source Driver | Source Driver | Source Driver | Source Driver | Source Driver |
| Source Output Range | VSOUT | - | 0.1 | - | VREG1OUT-0.1 | V | Note 4 |
| Positive Gamma Reference Voltage | VREG1OUT | - | 3.625 | - | 5.5 | V | |
| Negative Gamma Reference Voltage | VREG2OUT | - | -5.5 | - | -3.625 | V | |
| Source Output Setting Time | Tr | Below with 99% precision | - | 10 | - | uS | Note 3. 4 |
| Output Deviation Voltage | Vdev | Sout>=4.2V Sout<=0.8V | - | - | 20 | mV | Note 3 |
| (Source Output channel) | 4.2V>Sout>0.8V | - | - | 15 | mV | - | |
| Output Offset Voltage | VOFFSET | - | - | - | 35 | mV | Note 3 |
| Booster Operation | Booster Operation | Booster Operation | Booster Operation | Booster Operation | Booster Operation | Booster Operation | Booster Operation |
| Booster (VCIx2) Voltage | DDVDH | - | 6 | V | |||
| Booster (VCIx2) Voltage | DDVDL | - | -6 | V | |||
| Booster (VCIx2 Drop Voltage) | VCI1x2 drop | loading=1mA | - | - | 5 | % | |
| Gate Driver High Voltage | VGH | - | 10.0 | - | 20 | V | |
| Gate Driver Low Voltage | VGL | - | -15.0 | - | -6.0 | V | |
| Standby mode current consumption (Ta = 25° C, Interface: DBI and DPI) | Standby mode current consumption (Ta = 25° C, Interface: DBI and DPI) | Standby mode current consumption (Ta = 25° C, Interface: DBI and DPI) | Standby mode current consumption (Ta = 25° C, Interface: DBI and DPI) | Standby mode current consumption (Ta = 25° C, Interface: DBI and DPI) | Standby mode current consumption (Ta = 25° C, Interface: DBI and DPI) | Standby mode current consumption (Ta = 25° C, Interface: DBI and DPI) | Standby mode current consumption (Ta = 25° C, Interface: DBI and DPI) |
| Sleep in mode | VCI | VCI=2.8V | - | 100 | - | μA | |
| Deep Standby mode | VCI | IOVCC=1.8V | - | 1 | - | μA |
Ω
°C
Absolute Maximum Ratings
The absolute maximum ratings are listed in Table 41. When the ILI9488 is used beyond the absolute maximum ratings, it may be permanently damaged. Using the ILI9488 within the following limits of electrical characteristics is strongly recommended for normal operation. If these electrical characteristic conditions are exceeded during normal operation, the ILI9488 will malfunction and cause poor reliability.
Table 41: Absolute maximum Ratings
| Item | Symbol | Unit | Value |
|---|---|---|---|
| Supply voltage(Analog) | VCI ~ DGND | V | -0.3 ~ +3.3 |
| Supply voltage (I/O) | IOVCC ~ DGND | V | -0.3 ~ +3.3 |
| OTP Supply voltage | DDVDH ~ DGND | V | -0.3 ~ +7.0 |
| Supply voltage | DDVDH ~ DGND | V | -0.3 ~ +6.0 |
| Supply voltage | DDVDL ~ DGND | V | 0.3 ~ -6.0 |
| Supply voltage | VGH ~ DGND | V | -0.3 ~ +25 |
| Supply voltage | VGL ~ DGND | V | 0.3 ~ -16 |
| Driver supply voltage | VCI - VCL | V | 6.0V |
| Driver supply voltage | VGH-VGL | V | 32.0V |
| Input voltage | VIN | V | -0.3 ~ IOVCC + 0.3 |
| HS Input voltage | VHSIN | V | -0.3 ~ + 1.65 |
| Operating temperature | Topr | -30 ~ +70 | |
| Storage temperature | Tstg | -55 ~ +110 |
Supply voltage Driver supply voltage ≦ Driver supply voltage ≦ Input voltage HS Input voltage Operating temperature °C Storage temperature °C Note: Even if the absolute maximum rating of one of the above parameters is exceeded only for a short while, the quality of the product may be degraded. Therefore, be sure to use the product within the range of the absolute maximum ratings.
Table 41: Absolute maximum Ratings
Typical Application
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Ordering Information
| MPN | Package | Temperature Range | Packing |
|---|
Get structured datasheet data via API
Get started free