ILI9341
a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K color
Manufacturer
ILI TECHNOLOGY CORP.
Overview
Part: ILI9341 from ILI TECHNOLOGY CORP.
Type: a-Si TFT LCD Single Chip Driver
Key Specs:
- Resolution: 240RGBx320
- Color Depth: 262K colors
Features:
Applications:
Package:
Features
- Display resolution: 240xRGB x 320(V)
- Output:
- -720 source outputs
- -320 gate outputs
- -Common electrode output (VCOM)
- a-TFT LCD driver with on-chip full display RAM: 172,800 bytes
- System Interface
- -8-bits, 9-bits, 16-bits, 18-bits interface with 8080-Ⅰ/8080- Ⅱ series MCU
- -6-bits, 16-bits, 18-bits RGB interface with graphic controller
- -3-line / 4-line serial interface
- Display mode:
- -Full color mode (Idle mode OFF): 262K-color (selectable color depth mode by software)
- -Reduce color mode (Idle mode ON): 8-color
- Power saving mode:
- -Sleep mode
- On chip functions:
- -VCOM generator and adjustment
- -Timing generator
- -Oscillator
- -DC/DC converter
- -Line/frame inversion
- -1 preset Gamma curve with separate RGB Gamma correction
- Content Adaptive Brightness Control
- MTP (3 times):
- -8-bits for ID1, ID2, ID3
- -7-bits for VCOM adjustment
- Low -power consumption architecture
-
- Low operating power supplies:
- VDDI = 1.65V ~ 3.3V (logic)
- VCI = 2.5V ~ 3.3V (analog)
- Low operating power supplies:
-
- LCD Voltage drive:
-
- Source/VCOM power supply voltage
- DDVDH GND = 4.5V ~ 5.8V
- VCL GND = -1.5V ~ -2.5V
- Source/VCOM power supply voltage
-
- Gate driver output voltage
- VGH GND = 10.0V ~ 18.0V
- VGL GND = -5.0V ~ -10.0V
- VGH VGL ≦ 28V
- Gate driver output voltage
-
- VCOM driver output voltage
- VCOMH = 3.0V ~ (DDVDH 0.2)V
- VCOML = (VCL+0.2)V ~ 0V
- VCOMH VCOML ≦ 6.0V
- VCOM driver output voltage
-
- Operate temperature range: -40°C to 85°C
- a-Si TFT LCD storage capacitor : Cst on Common structure only
Pin Configuration
- Pin Name
- VDDI
- VDDI_LED
- VCI
- Vcore
- VSS3
- VSS
- VSSA
- VSSC
- Interface Logic Signals
- Pin Name
| I | This signal will reset the device and must be applied to properly | ||
|---|---|---|---|
| RESX | MCU (VDDI/VSS) | initialize the chip. Signal is active low. | |
| EXTC | I | MCU (VDDI/VSS) | Extended command set enable. Low: extended command set is discarded. High: extended command set is accepted. Please connect EXTC to VDDI to read/write extended registers (RB0h |
| CSX | I | MCU (VDDI/VSS) | Chip select input pin ("Low" enable). This pin can be permanently fixed "Low" in MPU interface mode only. * note1,2 This pin is used to select "Data or Command" in the parallel interface or 4-wire 8-bit serial data interface. When DCX = '1', data is selected. |
| D/CX (SCL) | I | MCU (VDDI/VSS) | When DCX = '0', command is selected. This pin is used serial interface clock in 3-wire 9-bit / 4-wire 8-bit serial data interface. If not used, this pin should be connected to VDDI or VSS. |
| RDX | I | MCU (VDDI/VSS) | /8080 Ⅰ -Ⅱ system (RDX): Serves as a read signal and MCU 8080- read data at the rising edge. Fix to VDDI level when not in use. |
| WRX (D/CX) | I | MCU (VDDI/VSS) | /8080 Ⅰ -Ⅱ system (WRX): Serves as a write signal and - 8080- writes data at the rising edge. - 4-line system (D/CX): Serves as command or parameter select. Fix to VDDI level when not in use. |
| D[17:0] | I/O | MCU (VDDI/VSS) | 18-bit parallel bi-directional data bus for MCU system and RGB interface mode Fix to VSS level when not in use When IM[3] : Low, Serial in/out signal. |
| MCU | When IM[3] : High, Serial input signal. | ||
| SDI/SDA | I/O | (VDDI/VSS) | The data is applied on the rising edge of the SCL signal. If not used, fix this pin at VDDI or VSS. Serial output signal. |
| SDO | O | MCU (VDDI/VSS) | The data is outputted on the falling edge of the SCL signal. If not used, open this pin Tearing effect output pin to synchronize MPU to frame writing, |
| TE | O | MCU | activated by S/W command. When this pin is not activated, this pin is |
| (VDDI/VSS) | low. | ||
| MCU | If not used, open this pin. Dot clock signal for RGB interface operation. | ||
| DOTCLK | I | (VDDI/VSS) | Fix to VDDI or VSS level when not in use. |
| VSYNC | I | MCU (VDDI/VSS) | Frame synchronizing signal for RGB interface operation. Fix to VDDI or VSS level when not in use. |
| HSYNC | I | MCU (VDDI/VSS) | Line synchronizing signal for RGB interface operation. Fix to VDDI or VSS level when not in use. |
| DE | I | MCU (VDDI/VSS) | Data enable signal for RGB interface operation. Fix to VDDI or VSS level when not in use. |
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Note.
-
If CSX is connected to VSS in Parallel interface mode, there will be no abnormal visible effect to the display module. Also there will be no restriction on using the Parallel Read/Write protocols, Power On/Off Sequences or other functions. Furthermore there will be no influence to the Power Consumption of the display module.
-
When CSX='1', there is no influence to the parallel and serial interface.
- Pin Name
- S720~S1
- G320~G1
- DDVDH
- VGH
- VGL
- VCL
- C11P, C11M
C12P, C12M - C21P, C21M
C22P, C22M - GVDD
- VCOM
- LEDPWM
- LEDON
- Test Pins
- Pin Name
- DUMMY
- INT_TEST1
INT_TEST2
Liquid crystal power supply specifications Table
| No. | Item | Description | |
|---|---|---|---|
| 1 | TFT Source Driver | 720 pins (240 x RGB) | |
| 2 | TFT Gate Driver | 320 pins | |
| 3 | TFT Display's Capacitor Structure | Cst structure only (Cs on Common) | |
| 4 | Liquid Crystal Drive Output | S1 ~ S720 | V0 ~ V63 grayscales |
| G1 ~ G320 | VGH - VGL | ||
| VCOM | VCOMH - VCOML: Amplitude = electronic volumes | ||
| VDDI | 1.65V ~ 3.30V | ||
| 5 | Input Voltage | VCI | 2.50V ~ 3.30V |
| DDVDH | 4.5V ~ 5.8V | ||
| VGH | 10.0V ~ 18.0V | ||
| 6 | Liquid Crystal Drive Voltages | VGL | -5.0V ~ -10.0V |
| VCL | -1.5V ~ -2.5V | ||
| VGH - VGL | Max. 28.0V | ||
| DDVDH | VCI x2, | ||
| VGH | VCI x6, x7 | ||
| 7 | Internal Step-up Circuits | VGL | VCI x-3, x-4, |
| VCL | VCI x-1 |
Electrical Characteristics
18.1 Absolute Maximum Ratings
The absolute maximum rating is listed on following table. When ILI9341 is used out of the absolute maximum ratings, ILI9341 may be permanently damaged. To use ILI9341 within the following electrical characteristics limitation is strongly recommended for normal operation. If these electrical characteristic conditions are exceeded during normal operation, ILI9341 will malfunction and cause poor reliability.
| Item | Symbol | Unit | Value |
|---|---|---|---|
| Supply voltage | VCI | V | -0.3 ~ +4.6 |
| Supply voltage (Logic) | VDDI | V | -0.3 ~ +4.6 |
| Supply voltage (Digital) | VCORE | V | -0.3 ~ +2.0 |
| Driver supply voltage | VGH-VGL | V | -0.3 ~ +28.0 |
| Logic input voltage range | VIN | V | -0.3 ~ VDDI + 0.3 |
| Logic output voltage range | VO | V | -0.3 ~ VDDI + 0.3 |
| Operating temperature | Topr | °C | -40 ~ +85 |
| Storage temperature | Tstg | °C | -55 ~ +110 |
Note: If the absolute maximum rating of even is one of the above parameters is exceeded even momentarily, the quality of the product may be degraded. Absolute maximum ratings, therefore, specify the values exceeding which the product may be physically damaged. Be sure to use the product within the range of the absolute maximum ratings.
18.2 DC Characteristics
18.2.1 General DC Characteristics
| Item | Symbol | Unit | Condition | Min. | Typ. | Max. | Note |
|---|---|---|---|---|---|---|---|
| Power and Operation Voltage | |||||||
| Analog Operating Voltage | VCI | V | Operating voltage | 2.5 | 2.8 | 3.3 | Note2 |
| Logic Operating Voltage | VDDI | V | I/O supply voltage | 1.65 | 2.8 | 3.3 | Note2 |
| Digital Operating voltage | VCORE | V | Digital supply voltage | - | 1.5 | - | Note2 |
| Gate Driver High Voltage | VGH | V | - | 10.0 | - | 18.0 | Note3 |
| Gate Driver Low Voltage | VGL | V | - | -10.0 | - | -5.0 | Note3 |
| Driver Supply Voltage | - | V | VGH-VGL | 15 | - | 28 | Note3 |
| Current consumption during standby mode | IST | μA | VCI=2.8V , Ta=25 °C | - | - | 100 | - |
| Input and Output | |||||||
| Logic High Level Input Voltage | VIH | V | - | 0.7*VDDI | - | VDDI | Note1,2,3 |
| Logic Low Level Input Voltage | VIL | V | - | VSS | - | 0.3*VDDI | Note1,2,3 |
| Logic High Level Output Voltage | VOH | V | IOL=-1.0mA | 0.8*VDDI | - | VDDI | Note1,2,3 |
| Logic Low Level Output Voltage | VOL | V | IOL=1.0mA | VSS | - | 0.2*VDDI | Note1,2,3 |
| Logic High Level Input Current | IIH | uA | - | - | - | 1 | Note1,2,3 |
| Logic Low Level input Current | IIL | uA | - | -1 | - | - | Note1,2,3 |
| Logic Input Leakage Current | ILEA | uA | VIN=VDDI or VSS | -0.1 | - | +0.1 | Note1,2,3 |
| VCOM Operation | |||||||
| VCOM High Voltage | VCOMH | V | Ccom=12nF | 2.5 | - | 5.0 | Note3 |
| VCOM Low Voltage | VCOML | V | Ccom=12nF | -2.5 | - | 0.0 | Note3 |
| VCOM Amplitude Voltage | VCOMA | V | VCOMH-VCOML | 4.0 | - | 5.5 | Note3 |
| Source Driver | |||||||
| Source Output Range | Vsout | V | - | 0.1 | - | DDVDH-0.1 | Note4 |
| Gamma Reference Voltage | GVDD | V | - | 3.0 | - | 5.0 | Note3 |
| Output Deviation Voltage (Source | Vdev | mV | Sout>=4.2V Sout<=0.8V | - | - | 20 | Note4 |
| Output channel) | 4.2V>Sout>0.8V | - | - | 15 | - | ||
| Output Offset Voltage | VOFSET | mV | - | - | - | 35 | Note7 |
| Booster Operation | |||||||
| st Booster (VCIx2) 1 | DDVDH | V | - | 4.95 | - | 5.8 | Note3 |
| Voltage | (Note 5) | (Note 6) | |||||
| st Booster (VCIx2 1 Drop Voltage | VCIx2 drop | % | loading=1mA | - | - | 5 | Note3 |
| Liner Range | Vliner | V | - | 0.2 | - | DDVDH-0.2 |
- Note 1: VDDI=1.65 to 3.3V, VCI=2.5 to 3.3V, AGND=VSS=0V, Ta=-30 to 70 (to +85 no damage) °C.
- Note2: Please supply digital VDDI voltage equal or less than analog VCI voltage.
- Note3: CSX, RDX, WRX, D[17:0], D/CX, RESX, TE, DOTCLK, VSYNC, HSYNC, DE, SDA, SCL, IM3, IM2, IM1, IM0, and Test pins.
- Note4: When the measurements are performed with LCD module. Measurement Points are like Note3.
- Note5: VCI=2.6V
- Note6: VCI=3.3V
- Note7: The Max. Value is between with Note 4 measure point and Gamma setting value
D[8:0], D[7:0]
For minimum CL=8pF
18.3 AC Characteristics
**18.3.1 Display Parallel 18/16/9/8-bit Interface Timing Characteristics (8080-**Ⅰ system)
Note: Ta = -30 to 70 °C, VDDI=1.65V to 3.3V, VCI=2.5V to 3.3V, VSS=0V
tratfm Read access time - 340 ns trod Read output disable time 20 80 ns
CSX timings :
Note: Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.
Write to read or read to write timings:
Note: Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.
18.3.2 Display Parallel 18/16/9/8-bit Interface Timing Characteristics(8080-**Ⅱ **system)
Note: Ta = -30 to 70 °C, VDDI=1.65V to 3.3V, VCI=2.5V to 3.3V, VSS=0V.
CSX timings :
Note: Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.
Write to read or read to write timings:
Note: Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.
18.3.3 Display Serial Interface Timing Characteristics (3-line SPI system)
| Signal | Symbol | Parameter | min | max | Unit | Description |
|---|---|---|---|---|---|---|
| tscycw | Serial Clock Cycle (Write) | 100 | - | ns | ||
| tshw | SCL "H" Pulse Width (Write) | 40 | - | ns | ||
| tslw | SCL "L" Pulse Width (Write) | 40 | - | ns | ||
| SCL | tscycr | Serial Clock Cycle (Read) | 150 | - | ns | |
| tshr | SCL "H" Pulse Width (Read) | 60 | - | ns | ||
| tslr | SCL "L" Pulse Width (Read) | 60 | - | ns | ||
| tsds SDA / SDI | Data setup time (Write) | 30 | - | ns | ||
| (Input) | tsdh | Data hold time (Write) | 30 | - | ns | |
| SDA / SDO | tacc | Access time (Read) | 10 | - | ns | |
| (Output) | toh | Output disable time (Read) | 10 | 50 | ns | |
| CSX | tscc | SCL-CSX | 20 | - | ns | |
| tchw | CSX "H" Pulse Width | 40 | - | ns | ||
| tcss | 60 | - | ns | |||
| tcsh | CSX-SCL Time | 65 | - | ns |
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
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18.3.4 Display Serial Interface Timing Characteristics (4-line SPI system)
| Signal | Symbol | Parameter | min | max | Unit | Description |
|---|---|---|---|---|---|---|
| tcss CSX tcsh | Chip select time (Write) | 40 | - | ns | ||
| Chip select hold time (Read) | 40 | - | ns | |||
| twc | Serial clock cycle (Write) | 100 | - | ns | ||
| twrh | SCL "H" pulse width (Write) | 40 | - | ns | ||
| twrl | SCL "L" pulse width (Write) | 40 | - | ns | ||
| SCL trc | Serial clock cycle (Read) | 150 | - | ns | ||
| trdh | SCL "H" pulse width (Read) | 60 | - | ns | ||
| trdl | SCL "L" pulse width (Read) | 60 | - | ns | ||
| tas | D/CX setup time | 10 | - | |||
| D/CX tah | D/CX hold time (Write / Read) | 10 | - | |||
| SDA / SDI | tds | Data setup time (Write) | 30 | - | ns | |
| (Input) tdh | Data hold time (Write) | 30 | - | ns | ||
| SDA / SDO | tacc | Access time (Read) 10 - ns | For maximum CL=30pF | |||
| (Output) | tod | Output disable time (Read) 10 | 50 | ns | For minimum CL=8pF |
Note: Ta = 25 °C, VDDI=1.65V to 3.3V, VCI=2.5V to 3.3V, AGND=VSS=0V
18.3.5 Parallel 18/16/6-bit RGB Interface Timing Characteristics
| Signal | Symbol | Parameter | min max | Description | ||
|---|---|---|---|---|---|---|
| VSYNC / | tSYNCS | VSYNC/HSYNC setup time | 15 - ns | |||
| HSYNC | tSYNCH | VSYNC/HSYNC hold time | 15 | - | ns | |
| tENS | DE setup time | 15 | - | ns | 18/16-bit bus RGB | |
| DE | tENH | DE hold time | 15 | - | ns | |
| tPOS | Data setup time | 15 | - | ns | ||
| D[17:0] | tPDH | Data hold time | 15 | - | ns | interface mode |
| PWDH | DOTCLK high-level period | 15 | - | ns | ||
| PWDL | DOTCLK low-level period | 15 | - | ns | ||
| DOTCLK | tCYCD | DOTCLK cycle time | 100 | - | ns | |
| trgbr , trgbf | DOTCLK,HSYNC,VSYNC rise/fall time | - | 15 | ns | ||
| VSYNC / | tSYNCS | VSYNC/HSYNC setup time | 15 | - | ns | |
| HSYNC | tSYNCH | VSYNC/HSYNC hold time | 15 | - | ns | |
| tENS | DE setup time | 15 | - | ns | ||
| DE tENH | DE hold time | 15 | - | ns | ||
| tPOS | Data setup time | 15 | - | ns | 6-bit bus RGB | |
| D[17:0] | tPDH | Data hold time | 15 | - | ns | interface mode |
| PWDH | DOTCLK high-level pulse period | 15 | - | ns | ||
| PWDL | DOTCLK low-level pulse period | 15 | - | ns | ||
| DOTCLK | tCYCD | DOTCLK cycle time | 100 | - | ns | |
| trgbr , trgbf | DOTCLK,HSYNC,VSYNC rise/fall time | - | 15 | ns |
19 Revision History
| Version No. | Date | Page | Description |
|---|---|---|---|
| V1.00 | 2010/10/12 | All | New Created. |
| V1.01 | 2010/10/12 | 179 | Update charge pump ratio |
| V1.02 | 2010/12/17 | 35,195~200 | Add description of extend register command |
| V1.03 | 2010/12/20 | 196 | Modify description of pumping |
| V1.04 | 2010/12/24 | All | Update extend register and OTP flow |
| V1.05 | 2011/01/05 | All | Update extend register |
| V1.06 | 2011/01/20 | 16,230 | No.75 pad location, DC Characteristics |
| V1.07 | 2011/02/24 | 199,226,227 | Modify register, external element. |
| V1.08 | 2011/03/04 | 179,196,227,228 | Analog supply voltage naming, external element, DDVDH Max, Modify C1h,CFh default setting |
| V1.09 | 2011/03/15 | 9,159,197,199,226 | Update clock timing, IC Configuration, E8h, EDh |
| V1.10 | 2011/04/15 | 226 | Update for general FPC application |
| V1.11 | 2011/06/10 | 13 | Rename pad 231, 232 as INT_TEST1 and INT_TEST2 (please leave these pins as open) |
| 15 | Modify chip size 15860u x 650u | ||
| 166 | Modify SM bit gate arrangement | ||
| V1.12 | 2011/07/15 | 8,14, 230, 231 | Modify VGH from 16V to 18V |
| V1.13 | 2011/07/20 | 183, 185, 196, | Add OTP: ID and VMF x 3 times |
| 198, 219-222 | Add "E9h register, Add power on sequence flow chart Add CFH, Bit[5], Bit[6] and all 3rd parameter description |
Absolute Maximum Ratings
The absolute maximum rating is listed on following table. When ILI9341 is used out of the absolute maximum ratings, ILI9341 may be permanently damaged. To use ILI9341 within the following electrical characteristics limitation is strongly recommended for normal operation. If these electrical characteristic conditions are exceeded during normal operation, ILI9341 will malfunction and cause poor reliability.
| Item | Symbol | Unit | Value |
|---|---|---|---|
| Supply voltage | VCI | V | -0.3 ~ +4.6 |
| Supply voltage (Logic) | VDDI | V | -0.3 ~ +4.6 |
| Supply voltage (Digital) | VCORE | V | -0.3 ~ +2.0 |
| Driver supply voltage | VGH-VGL | V | -0.3 ~ +28.0 |
| Logic input voltage range | VIN | V | -0.3 ~ VDDI + 0.3 |
| Logic output voltage range | VO | V | -0.3 ~ VDDI + 0.3 |
| Operating temperature | Topr | °C | -40 ~ +85 |
| Storage temperature | Tstg | °C | -55 ~ +110 |
Note: If the absolute maximum rating of even is one of the above parameters is exceeded even momentarily, the quality of the product may be degraded. Absolute maximum ratings, therefore, specify the values exceeding which the product may be physically damaged. Be sure to use the product within the range of the absolute maximum ratings.
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