EFR32MG21A010F1024IM32

Part: EFR32MG21A010F1024IM32-B — Silicon Labs

Type: Multiprotocol Wireless SoC

Description: 80 MHz ARM Cortex-M33 MCU with up to 1024 kB Flash, 96 kB RAM, and a 2.4 GHz radio supporting Bluetooth 5.1, Zigbee, and Thread, with up to 20 dBm TX power.

Operating Conditions:

• Supply voltage: 1.71 to 3.8 V
• Operating temperature: -40 to 125 °C
• Max operating frequency: 80 MHz

Absolute Maximum Ratings:

• Max supply voltage: 3.8 V
• Max junction/storage temperature: 150 °C

Key Specs:

• CPU: ARM Cortex-M33 with DSP and FPU
• Max CPU frequency: 80 MHz
• Flash memory: Up to 1024 kB
• RAM memory: Up to 96 kB
• 2.4 GHz TX power: Up to 20 dBm
• RX current (1 Mbps GFSK): 8.8 mA
• TX current (0 dBm): 9.3 mA
• EM2 DeepSleep current (96 kB RAM retention): 5.0 μA
• ADC: 12-bit, 1 Msps SAR

Features:

• 12-channel Peripheral Reflex System
• Hardware Cryptographic Acceleration (AES128/256, SHA-1, SHA-2, ECC, ECDSA, ECDH, J-Pake)
• True Random Number Generator (TRNG)
• ARM TrustZone
• Secure Boot with Root of Trust and Secure Loader (RTSL)
• Up to 20 General Purpose I/O pins
• 3x Universal Synchronous/Asynchronous Receiver/Transmitter (UART/SPI/SmartCard/IrDA/I2S)
• 2x I2C interface with SMBus support

Applications:

• IoT Multi-Protocol Devices
• Lighting
• Connected Home
• Gateways and Digital Assistants
• Building Automation and Security

Package:

• QFN32 4x4 mm (0.4 mm pitch)

• 32-bit ARM® Cortex®-M33 core with 80 MHz maximum operating frequency
• Up to 1024 kB of flash and 96 kB of RAM
• 12-channel Peripheral Reflex System enabling autonomous interaction of MCU peripherals
• Integrated PA with up to 20 dBm (2.4 GHz) TX power
• Robust peripheral set and up to 20 GPIO in a 4x4 QFN package

EFR32MG21A010F1024IM32 — QFN32 Pinout

Notes

• Pin 0 (center of die) is VSS (ground reference), shown in the diagram but not a package pin.
• All GPIO pins (PC00–PC05, PA00–PA06, PB00–PB01, PD00–PD04) support alternate functions; refer to section 6.2 for detailed alternate function assignments.
• RF pins (RF2G4_IO1, RF2G4_IO2) are differential RF input/output for the 2.4 GHz transceiver.
• Power pins (RFVDD, PAVDD, DVDD, AVDD, IOVDD) require appropriate decoupling and bulk capacitance per the power distribution guidelines.
• DECOUPLE pin (24) requires an external capacitor for the on-chip voltage regulator.

All electrical parameters in all tables are specified under the following conditions, unless stated otherwise:

• Typical values are based on T A =25 °C and all supplies at 3.0 V, by production test and/or technology characterization.
• Radio performance numbers are measured in conducted mode, based on Silicon Laboratories reference designs using output power-specific external RF impedance-matching networks for interfacing to a 50 Ω antenna.
• Minimum and maximum values represent the worst conditions across supply voltage, process variation, and operating temperature, unless stated otherwise.

Stresses above those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and reliability data, see the Quality and Reliability Monitor Report at http://www.silabs.com/support/quality/pages/default.aspx.

Table 4.1. Absolute Maximum Ratings

Table 4.3. Thermal Characteristics

1. Measured according to JEDEC standard JESD51-2A. Integrated Circuit Thermal Test Method Environmental Conditions - Natural Convection (Still Air).

Figure 7.1. QFN32 Package Drawing

Table 7.1. QFN32 Package Dimensions

1. All dimensions shown are in millimeters (mm) unless otherwise noted.

2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.

3. This drawing conforms to the JEDEC Solid State Outline MO-220, Variation VKKD-4.

4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.